Stuff Threshold Modulation Research Articles

Comparison of various threshold modulation techniques used in pulse stuffing synchronizers

It is shown that the technique of pulse stuffing in synchronizers and the method of data compression in sigma–delta modulators ( Σ – Δ ) are very similar in operation. In particular, it is identified that the conventional stuff threshold modulation and adaptive threshold modulation schemes used in digital communications are as same as the dithering and multi-loop architectures of sigma–delta modulators. Using the similarity between pulse stuffing synchronizers and Σ – Δ modulators, various alternative circuits that are suitable for jitter reduction in pulse stuffing synchronizers are proposed in the paper. The performances of these circuits, i.e. the use of multi-loop Σ – Δ modulators, higher-order Σ – Δ modulators, look ahead decision feedback (LADF) and multi-stage (MASH) Σ – Δ modulators are compared. It is shown that the performances of proposed alternative synchronizer circuits surpasses the performance of the conventional threshold modulation type jitter reduction techniques currently used in pulse stuffing synchronizers.

SRTS 지터와 포인터 조정 지터의 감소 방식에 관한 연구

SRTS 지터와 포인터 조정 지터의 감소 방식에 대하여 연구하였다. 스타핑 지터를 감소시키기 위하여 여러 연구들에서 제시되었던 비트 리킹, 판별 경계치 변조 그리고 시그마-델타 변조 방식들을 실제 SRTS 및 포인터 조정 장치에 적용하여 발생되는 지터의 성질을 컴퓨터 시뮬레이션에 의한 방법으로 분석하였다. 위 방식들을 적용한 장치에서 발생되는 포인터 조정 지터는 기존의 지터보다 그 크기가 절반 이하로 감소되며, SRTS 지터는 시스템 파라미터에 따라서 기존의 지터보다 그 크기가 증가 또는 감소하는 것이 밝혀졌다. Techniques for the reduction of SRTS jitter and pointer adjustment jitter are studied. To reduce the stuffing jitter several methods have been proposed, such as bit leaking, stuff threshold modulation and sigma delta modulation. The characteristics of jitter generated in SRTS and pointer adjustment systen implementing these reduction techniques is analyzed with computer simulation. The results show that ms jitter value decreases to less than 50% as compared to a conventional pointer adjustment system. The amplitude of SRTS jitter using new techniques decreases or Increases dependent on system parameter.

Optimum stuff threshold modulation sequences for pulse stuffing

Clock rate adaptation circuits of network synchronizers work by controlling the output data rate by pulse stuffing. The technique of Stuff Threshold Modulation (ST-Mod) is usually used to reduce the waiting time jitter resulting due to pulse stuffing. In this paper, a detailed study of the technique of Stuff Threshold Modulation is provided. A method of determining an optimum ST-Mod scheme for an arbitrary phase-locked loop characteristic and a specified range of synchronizer clock frequency offsets is formulated in the paper. It is shown that if the ST-Mod sequence is selected as a saw-tooth sequence then it is possible to choose a dither sequence which is optimum for a given synchronizer–desynchronizer operating condition. It is demonstrated that using a combination of random sequence and modified wave sequence it is possible to obtain near-optimal filtered jitter for given synchronizer–desynchronizer characteristics.

A comprehensive analysis of stuff threshold modulation used in clock-rate adaptation schemes

Clock-rate adaptation circuits of network synchronizers work by controlling the output data rate by pulse stuffing. The technique of stuff threshold modulation (ST-Mod) is one method used to reduce the waiting time jitter produced by pulse stuffing. An expression for the filtered waiting time jitter in the presence of an ST-Mod sequence is present and the selection of a suitable ST-Mod dither sequence for a given set of data transmission conditions is investigated. It is shown that by using either a random ST-Mod sequence or a modified-wave ST-Mod sequence, it is possible to obtain minimal filtered jitter for given synchronizer-desynchronizer characteristics.

Sigma–delta architectures for pulse-stuffing synchronizers

The technique of pulse stuffing is widely used in synchronous digital communication networks. The similarity of pulse-stuffing synchronizers and sigma–delta modulators is identified in this paper. In particular it is shown that the popular stuff threshold modulation and adaptive threshold modulation schemes used in digital communications are essentially the same as the dithering and multiloop architectures of sigma–delta (ΣΔ) modulators. Using the similarity between pulse-stuffing synchronizers and ΣΔ modulators, two alternative circuits that are suitable for jitter reduction in pulse-stuffing synchronizers are proposed in the paper. For this purpose the look-ahead decision feedback (LADF) and multistage (MASH) architectures of ΣΔ modulators are modified such that they are suitable for use as pulse-stuffing synchronizers. It is shown that the performance of the proposed alternative synchronizer circuits surpasses the performances of the jitter reduction techniques currently used in the synchronizers, such as adaptive threshold modulation and stuff threshold modulation. © 1997 by John Wiley & Sons, Ltd.

Analysis of techniques for the reduction of jitter caused by SONET pointer adjustments

Fixed rate, variable rate, and feed forward pointer spreading as well as stuff threshold modulation (STM) are analyzed as methods for reducing jitter caused by SONET pointer adjustments. Each method of jitter reduction is described, theoretical analysis is developed to predict RMS jitter performance, and simulation results are presented to illustrate RMS and peak-to-peak jitter performance. A new method of implementing feed forward pointer spreading is described in which STM is used to transmit the synchronizer elastic store phase information.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Waiting time jitter results for a reduced complexity SONET interface circuit

An alternative stuff threshold modulation (STM) synchroniser implementation for SONET interfaces is described. Experimental waiting time jitter measurements are reported for DS-1 which verify the feasibility of the modified design in terms of maintaining jitter generation requirements. This implementation involves less circuit complexity than conventional STM synchronisers and is applicable to all interface designs requiring STM.

Spectral analysis of waiting time jitter in the presence of stuff threshold modulation

The Fourier transform of waiting time jitter in the presence of stuff threshold modulation is derived. Comparisons are made between power spectral densities and RMS jitter obtained analytically and by simulation. The Fourier transform enables the jitter performance to be evaluated in the presence of alternative stuff threshold modulation waveforms, required for example, in some SONET applications.

Measured pulse-stuffing jitter in asynchronous ds-1/sonet multiplexing with and without stuff-threshold modulation circuit

The letter reports the measurement of pulse-stuffing jitter levels up to 0.2UIrms when an asynchronous DS-1 is transported in the current draft-standard SONET format. We then describe a new circuit technique for jitter suppression which does not require format alteration, and report measured jitter reductions of ll–16dB for asynchronous DS-1/ SONET multiplexing. We offer an explanation as to why jitter is not significantly reduced by recent SONET format rearrangements, and show illustrative jitter spectra demonstrating the operative principle of our jitter reduction circuit.