Random Bit Stream Research Articles

An Improved DCM-Based Tunable True Random Number Generator for Xilinx FPGA

True random number generators (TRNGs) play a very important role in modern cryptographic systems. Field-programmable gate arrays (FPGAs) form an ideal platform for hardware implementations of many of these security algorithms. In this brief, we present a highly efficient and tunable TRNG based on the principle of beat frequency detection , specifically for Xilinx -FPGA-based applications. The main advantages of the proposed TRNG are its on-the-fly tunability through dynamic partial reconfiguration to improve randomness qualities. We describe the mathematical model of the TRNG operations and experimental results for the circuit implemented on a Xilinx Virtex-V FPGA. The proposed TRNG has low hardware footprint and built-in bias elimination capabilities. The random bitstreams generated from it pass all tests in the NIST statistical testsuite.

Exploration of Benes Network in Cryptographic Processors: A Random Infection Countermeasure for Block Ciphers Against Fault Attacks

Traditional detection countermeasures against fault attacks have been criticized as insecure because of the fragile comparison operation that can be maliciously bypassed. In order to avoid the comparison, infection countermeasures have been designed to confuse the faulty ciphertexts so that the output cannot be further explored. This paper presents an infection method that resists fault attacks using the existing Benes network module in high-performance crypto processors. The Benes network is originally used to accelerate permutation operations in block ciphers. The hamming weight of the differential results is balanced by modifying specific network switches, without changing the network topology. A further confusion is performed to destroy the determinacy by configuring part of the network with a random bit-stream. Furthermore, a statistical evaluation method is presented to quantitatively verify the proposed countermeasure in addition to a formal proof of security. This also provides a new concept for the evaluation of future random-enhanced infection methods. Experiments are carried out using Advanced Encryption Standard (AES), triple Data Encryption Standard (DES), and Camellia as examples. Under statistical evaluation, the results show that the proposed countermeasure improves the fault resistance by over four orders of magnitude compared with the unprotected case. Also, the performance and the area overhead are within 10% compared with the original Benes network.

Images from Bits: Non-Iterative Image Reconstruction for Quanta Image Sensors.

A quanta image sensor (QIS) is a class of single-photon imaging devices that measure light intensity using oversampled binary observations. Because of the stochastic nature of the photon arrivals, data acquired by QIS is a massive stream of random binary bits. The goal of image reconstruction is to recover the underlying image from these bits. In this paper, we present a non-iterative image reconstruction algorithm for QIS. Unlike existing reconstruction methods that formulate the problem from an optimization perspective, the new algorithm directly recovers the images through a pair of nonlinear transformations and an off-the-shelf image denoising algorithm. By skipping the usual optimization procedure, we achieve orders of magnitude improvement in speed and even better image reconstruction quality. We validate the new algorithm on synthetic datasets, as well as real videos collected by one-bit single-photon avalanche diode (SPAD) cameras.

Implementation of a secure TLS coprocessor on an FPGA

In this paper we present a secure implementation architecture of a coprocessor for the TLSv1.2 protocol, on an FPGA. Techniques were used that increase the resistance of the design to side channel attacks, and also protect the private key data from software based attacks. The processor was implemented with a secure true random number generator which incorporates failure detection and thorough post-processing of the random bitstream. The design also includes hardware for signature generation and verification; based on elliptic curve algorithms. The algorithms used for performing the elliptic curve arithmetic were chosen to provide resistance against SPA and DPA attacks. Implementations of the AES and SHA256 algorithms are also included in order to provide full hardware acceleration for a specific suite of the TLSv1.2 protocol. The design is analysed for area and speed on a Virtex 5 FPGA.

PUFKEY: a high-security and high-throughput hardware true random number generator for sensor networks.

Random number generators (RNG) play an important role in many sensor network systems and applications, such as those requiring secure and robust communications. In this paper, we develop a high-security and high-throughput hardware true random number generator, called PUFKEY, which consists of two kinds of physical unclonable function (PUF) elements. Combined with a conditioning algorithm, true random seeds are extracted from the noise on the start-up pattern of SRAM memories. These true random seeds contain full entropy. Then, the true random seeds are used as the input for a non-deterministic hardware RNG to generate a stream of true random bits with a throughput as high as 803 Mbps. The experimental results show that the bitstream generated by the proposed PUFKEY can pass all standard national institute of standards and technology (NIST) randomness tests and is resilient to a wide range of security attacks.

A Monolithic Silicon Quantum Random Number Generator Based on Measurement of Photon Detection Time

In this paper, a nondeterministic random number generator based on detection of the single photons emitted by an Si-CMOS-LED light source integrated for the first time on the detector chip is presented and experimentally demonstrated. We use a ring-shaped single-photon avalanche diode (SPAD) around the Si-CMOS-LED fabricated in 0.35-μm HV-CMOS technology to generate random events. The time intervals between single-photon events are independent quantum random variables. A field-programmable gate array (FPGA) digitizes the time variables to the stream of random bits. Bias in the raw data due to the nonuniform distribution of the time intervals is removed by postprocessing in a special configuration of xor gates to improve the randomness of the generated random bits. The quantum random numbers in 1-Gb streams with bit generation rate of 1 Mb/s were directly delivered to a personal computer (PC) and passed all statistical tests from ENT, STS, and DIEHARD, as well as for more accuracy correlation and bias tests applied on these streams.

Audio security through compressive sampling and cellular automata

In this paper, a new approach for scrambling the compressive sensed (CS) audio data using two dimensional cellular automata is presented. In order to improve the security, linear feedback shift register (LFSR) based secure measurement matrix for compressive sensing is used. The basic idea is to select the different states of LFSR as the entries of a random matrix and orthonormalize these values to generate a Gaussian random measurement matrix. It is proposed to generate the initial state matrix of cellular automata using an LFSR based random bitstream generator. In order to improve the security and key space of the proposed cryptosystem, piecewise linear chaotic map (PWLCM) based initial seeds generation for LFSRs is used. In the proposed approach, the initial value, parameter value and the number of iterations of PWLCM are kept as secret to provide security. The proposed audio encryption method for CS audio data is validated with different compressive sensing reconstruction approaches. Experimental and analytical verification shows that the proposed encryption system gives good reconstruction performance, robustness to noise, high level of scrambling and good security against several forms of attack. Moreover, since the measurement matrix used for CS operation and the initial state matrix used for 2D cellular automata are generated using the secret key, the storage/transmission requirement of the same can be avoided.

基于单光子探测机理的伪随机码测距性能研究

基于单光子探测机理的伪随机码测距性能研究

Fast random bits generation based on a single chaotic semiconductor ring laser

The use of the postprocessing method consisting of bitwise Exclusive-OR and least significant bits extraction to generate random bit sequences typically requires two distinct chaotic outputs. While the two signals are, in general, generated using two separated devices, e.g. two Fabry-Perot lasers, a single semiconductor ring laser can be used as an alternative due to its circular symmetry which facilitates lasing in two counterpropagating mode directions. We consider a chaotic semiconductor ring laser and investigate both numerically and experimentally its characteristics for fast random bit generation. In particular, we show that by sampling each directional mode's output signal using a 8-bit analog-digital converter and through Exclusive-OR operation applied to the two resulting signals (after throwing away 4 most significant bits), we can achieve fast random bit-streams with a bit rate 4 × 10 = 40 Gbit/s, passing the statistical randomness tests. To optimize the system performance, we also study the dependence of randomness on the main system parameters and on noise.

The Statistical Properties of Random Bitstreams and the Sampling Distribution of Cosine Similarity

We summarize the statistical properties of statistics computed from independent random bitstreams including the commonly discussed support and cosine similarity. We derive the moments of the asymptotically normal approximation to the sampling distribution of the cosine similarity of independent random bitstreams and compare those computed moments to those measured by Monte-Carlo simulation. We find agreement for bitstreams of internet scale in length (i.e. of order 10,000 bits) and much smaller (100 and 10 bits) and demonstrate that the expected value of the cosine similarity of independent bitstreams might very significantly distant from zero. To compensate for this bias we propose a new statistic Support Adjusted Cosine Similarity or SACS.

Scalable parallel physical random number generator based on a superluminescent LED

We describe an optoelectronic system for simultaneously generating parallel, independent streams of random bits using spectrally separated noise signals obtained from a single optical source. Using a pair of nonoverlapping spectral filters and a fiber-coupled superluminescent LED (SLED), we produced two independent 10 Gb/s random bit streams, for a cumulative generation rate of 20 Gb/s. The system relies principally on chip-based optoelectronic components that could be integrated in a compact, economical package.

Fast physical random number generator using amplified spontaneous emission

We report a 12.5 Gb/s physical random number generator (RNG) that uses high-speed threshold detection of the spectrally-sliced incoherent light produced by a fiber amplifier. The system generates a large-amplitude, easily measured, fluctuating signal with bandwidth that is constrained only by the optical filter and electrical detector used. The underlying physical process (spontaneous emission) is inherently quantum mechanical in origin, and therefore cannot be described deterministically. Unlike competing optical RNG approaches that require photon counting electronics, chaotic laser cavities, or state-of-the-art analog-to-digital converters, the system employs only commonly available telecommunications-grade fiber optic components and can be scaled to higher speeds or multiplexed into parallel channels. The quality of the resulting random bitstream is verified using industry-standard statistical tests.

True Random Number Generator With a Metastability-Based Quality Control

We present a metastability-based true random number generator that achieves high entropy and passes NIST randomness tests. The generator grades the probability of randomness regardless of the output bit value by measuring the metastable resolution time. The system determines the original random noise level at the time of metastability and tunes itself to achieve a high probability of randomness. Dynamic control enables the system to respond to deterministic noise and a qualifier module grades the individual metastable events to produce a high-entropy random bit-stream. The grading module allows the user to trade off output bit-rate with the quality of the bit-stream. A fully integrated true random number generator was fabricated in a 0.13 mum bulk CMOS technology with an area of 0.145 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .

New Perceptron Model Using Random Bitstreams

A very high precision is needed to implement the adder using stochastic computation (or pulse arithmetic) in modern VLSI technology. In this paper we propose a new model of perceptron using random bitstreams that alleviates this problem.