Stream Cipher Algorithm Research Articles

An Improved Stream Cipher Algorithm Based on NFLSR

To overcome defects of traditional stream cryptographic algorithms based on XOR operation, this paper proposes a new stream cipher algorithm with higher security and suitability for encrypting short information, which is based upon traversal operation and zipper-like random dynamic hash mapping, has the same time and space complexity as the traditional one. It generates the key stream through an application of Nonlinear Feedback Shift Register (NLFSR) and Bits Scrambling.

An Encryption Method Based on “Zipper” Stochastic Dynamic Hashing

This paper studies the theoretical problems and implementation methods of stream ciphers, discusses some deficiencies of conventional stream cipher algorithms, designs methods and rules for random Dynamic Hash Mapping and Bits Scrambling, applies nonlinear feedback shift register (NLFSR) technology, and a new stream cipher method with higher security strength and suitable for encryption of short information is proposed. The purpose is to apply the proposed new method of stream cipher to obtain higher encryption strength and code uniformity, and make some theories and algorithms in the research results have beneficial effects on information security in the era of big data.

A stream cipher algorithm based on 2D coupled map lattice and partitioned cellular automata

The two-dimensional coupled map lattice (2D CML) is a spatiotemporal chaotic model with complex dynamic behavior and has high potential for designing stream cipher. We propose an offset 2D CML model by adding different offsets for each lattice. The offset 2D CML model has better chaotic properties, such as larger Lyapunov exponent (LE) and more uniform chaotic sequences, than the original 2D CML model, which provides a good basis for constructing stream cipher. We combine the offset 2D CML model with the partitioned cellular automata (PCA) and propose a stream cipher algorithm. In our algorithm, the PCA is used to control the extraction of pseudo-random number from the offset 2D CML model, which effectively hides the orbit information of system and enhances the difficulty of attacking chaotic sequences. Moreover, some fast nonlinear transform operations are specially introduced into our algorithm to further improve the complexity and the running speed. Theory analysis and simulation test both confirm that the proposed stream cipher algorithm has excellent statistical performance, high security and computational efficiency. It has great potential for guaranteeing data security in the Internet.

Design and implementation of a system that preserves the confidentiality of stream cipher in non-linear flow coding

In this paper, implementation of stream cipher algorithm based on nonlinear combination generator for any given sequences is introduced. The main contribution of this work is to enhance the security of this generator and level of complexity is added using logic functions. The proposed scheme was measured through a series of randomness tests.

Triple layer image security using bit-shift, chaos, and stream encryption

One popular image security technique is image encryption. This research proposes an image encryption technique that consists of three encryption layers, i.e. bit-shift encryption, chaos-based encryption, and stream encryption. The chaos algorithm used is Arnold's chaotic map, while the stream cipher algorithm used is RC4. Each layer has different cryptology characteristics in order to obtain safer image encryption. The characteristics of cryptology are permutation, confusion, diffusion, and substitution. The combination of the proposed encryption method aims to secure images against various attacks, especially attacks on statistics and differentials. The encryption method testing is done by various measuring instruments such as statistical analysis, i.e. entropy information, avalanche effect, and histogram, differential analysis, i.e. UACI and NPCR, visual analysis using PSNR and SSIM, and bit error ratio. Based on the results of experiments that the encryption method that we propose can work excellently based on various measurement instruments. The decryption process can also work perfectly this is evidenced by the ∞ value based on PSNR, and zero value based on SSIM and BER.

Image encryption using a combination of Grain‐128a algorithm and Zaslavsky chaotic map

Encryption is a very important way to secure data in storage and communication, and it is a process of encoding messages or information in such a manner that only authorised persons can access it. Different techniques are used to protect confidential image data against illicit access. In image encryption using chaotic systems, most authors use or design algorithms to generate the initial parameters' values from the secret key. However, as the key size depends on the number of these parameters, the used algorithms show little sensitivity to small changes in the key. To enhance both security and sensitivity in the choice of the initial parameters, this work combines the use of the Grain-128a stream cipher algorithm with two-dimensional Zaslavsky chaotic map. Firstly, the Grain-128a algorithm is applied to generate the required parameters of Zaslavsky's chaotic map from a fixed length 256-bit secret key. Secondly, the sequences generated by the chaotic map are used to encrypt the image using a bit confusion and diffusion process. The simulation results on greyscale, colour, binary, indexed, and medical images together with the scores obtained in the evaluation of the algorithm show that the proposed method is very sure and effective in encrypting images of any size and any type.

Design and Virtex-7-Based Implementation of Video Chaotic Secure Communications

In this paper, a Virtex-7-based video chaotic secure communication scheme is investigated. First, the network sending and receiving controller Intellectual Property (IP) cores are designed. Next, the chaotic encryption and decryption IP cores are implemented using fixed-point algorithm, pipeline operation, and state machine control. Thus, video capturing, video displaying, network sending, network receiving, chaotic encrypting, and chaotic decrypting can be achieved via IP core integration design. An improved 7D chaotic stream cipher algorithm for resisting divide-and-conquer attack is then designed and realized on a Virtex-7 high-end FPGA platform. Hardware experimental results are also given to verify the feasibility of the scheme.

Salsa20 based lightweight security scheme for smart meter communication in smart grid

The traditional power gird is altering dramatically to a smart power grid with the escalating development of information and communication technology (ICT). Among thousands of electronic devices connected to the grid through communication network, smart meter (SM) is the core networking device. The consolidation of ICT to the electronic devices centered on SM open loophole for the adversaries to launch cyber-attack. Therefore, for protecting the network from the adversaries it is required to design lightweight security mechanism for SM, as conventional cryptography schemes poses extensive computational cost, processing delay and overhead which is not suitable to be used in SM. In this paper, we have proposed a security mechanism consolidating elliptic curve cryptography (ECC) and Salsa20 stream cipher algorithm to ensure security of the network as well as addressing the problem of energy efficiency and lightweight security solution. We have numerically analyzed the performance of our proposed scheme in case of energy efficiency and processing time which reveals that the suggested mechanism is suitable to be used in SM as it consumes less power and requires less processing time to encrypt or decrypt.

CASC 3N vs. 4N: Effect of Increasing Cellular Automata Neighborhood Size on Cryptographic Strength

Stream ciphers are symmetric cryptosystems that rely on pseudorandom number generators (PRNGs) as a primary building block to generate a keystream. Stream ciphers have been extensively studied and many designs were proposed throughout the years. One of the popular designs used is the combination of linear feedback shift registers (LFSRs) and nonlinear feedback shift registers (NFSRs). Although this design is suitable for both software and hardware implementation and provides a good randomness behavior, it is still subject to attacks such as fault attacks and correlations attacks. Cellular automata (CAs) based stream ciphers are another design class that has been proposed. CAs display good cryptographic properties as well as a good randomness behavior, also high computational speed and a higher level of security. The use of CAs as cryptographic primitives is not recent and has been thoroughly investigated, especially the use of three-neighborhood one-dimensional cellular automata. In this article, the authors investigate the impact of increasing the neighborhood size of CAs on the security level and the cryptographic properties provided. Thereafter, four-neighborhood one-dimensional CAs are studied and a stream cipher algorithm is proposed. The security of the proposed algorithm is demonstrated by using the results of standard tests (i.e. NIST Test Suite and Dieharder Battery of Tests), particularly by computing the cryptographic properties of the used CAs and by showing the resistance of the suggested algorithm to mostly known attacks.

基于拉丁方与时变符号混沌系统的流密码算法设计

基于拉丁方与时变符号混沌系统的流密码算法设计

基于拉丁方的流密码算法设计与仿真

基于拉丁方的流密码算法设计与仿真

Modification of variably modified permutation composition (vmpc) algorithm genetic key algorithm for data security

Cryptography is the study of mathematical techniques related to information security aspects such as validity, data integrity, and data authentication. In this study, Variably Modified Permutation Composition (VMPC) algorithm is modified by adding complementary methods to the encryption and decryption process. Keys that are generated randomly will be optimized using Genetic Algorithm. The Variably Modified Permutation Composition (VMPC) algorithm is a symmetrical stream cipher algorithm similar to the RC4 cipher designed by Bartosz Zoltak. The Variably Modified Permutation Composition (VMPC) algorithm is an extension of the one-way function VMPC that was developed into a byte-based encryption algorithm. In its use the VMPC is generated by an 8-bit stream of 256 element permutations. The initial state of the permutation is calculated in VMPC Key Scheduling. The Genetic Algorithm produces a unique intermediate key for each algorithm run. The intermediary key is combined with the Ciphertext in the first level which produces the second level Ciphertext, up to the third level Ciphertext. Attackers will not be able to carry out attacks such as brute force, differential attacks or statistical attacks without having knowledge of the key. From the results of the tests carried out, the more characters that are encrypted and decrypted, the longer it will take. On testing the avalanche effect produces an average value of 51.25% for keys without optimization while 53.42% for keys optimized. The effect of key optimization using Genetic Algorithm has increased the value of the avalanche effect and has an effect on the results of changing bits in the ciphertext.

Enhancement of OTP stream cipher algorithm based on bit separation

Along with the increasing development of cryptography and computer science, It is appropriate that we try to prepare and improve the ability of cryptographic algorithms To counteract and prevent threats. Generally This algorithm encrypt the text with combined using key. The original message must be the same length of the key used. Actually in this study, a new method for improve OTP was successfully carried out. first, key will be generated using PRNG algorithm then bits of Plaintext will be separate each into 2 bits then rotating it key using matrix table, further key will be inserted into separated Plaintext and re-separate each it into 1 byte, hereinafter the new Plaintext will be XORed with a rotated key. To produce more advanced cipher.

Cryptographic Algorithms in Wearable Communications: An Empirical Analysis

In this letter, we assess the practical impact of lightweight block and stream cipher algorithms on power consumption and hardware resources for wearable devices that own low computational resources. Differently from the literature, we present an empirical and hardware-driven evaluation of the most representative encryption algorithms with regard to the requirements of wearable networks. We design and implement a cryptography library useful for wearable devices. Results confirm a strong correlation between the amount of logic/arithmetic operations, assembly instructions and power consumption for the two evaluated platforms, and they highlight the need to design encryption algorithms for wearable devices with high energy consumption efficiency, but strong security level similar to AES.

Design of an area efficient crypto processor for 3GPP-LTE NB-IoT devices

Providing information security is crucial for the Internet of Things (IoT) devices, platforms in which the available power budget is very limited. This paper tackles this challenge and presents a cryptographic processor compliant with the security algorithms specified by the 3rd Generation Partnership Project (3GPP) Long Term Evolution (LTE) NarrowBand IoT (NB-IoT) standard. The proposed processor has been optimized to the needs of the low end portfolio technologies that compose the IoT market, which addresses low-area, low-cost and low-data rate applications. Operation analysis at the algorithm-level and hardware sharing at the architecture-level have enabled extensive area reduction. The cryptographic processor has been described using the High-Level Synthesis (HLS) design flow and integrated with a general purpose processor in a cycle accurate virtual platform. The design achieves a reduction of area ranging from 5% to 42% in comparison to similar work. Synthesis results using a 65-nm CMOS technology show that the processor has a hardware cost of 53.6 kGE, and is capable of performing at 52.4 Mbps for the block cipher and 800 Mbps for the stream cipher algorithms at a 100 MHz clock.

Reversible Data Hiding in Encrypted Images Using Public Cloud and Cellular Automata

Reversible data hiding in encrypted images using reversible cellular automata is proposed in this article where the content owner encrypts an image using a stream cipher algorithm with an encryption key and uploads the encrypted image into the server. Later, the server embeds additional messages into the encrypted image using a three-stage selection method with an embedding key. On the user side, using both keys, an original image can be recovered. The proposed method has been observed to perform better in embedding payloads with lower computation complexity and higher security in comparison with the existing methods.

A High Capacity Multi-Level Approach for Reversible Data Hiding in Encrypted Images

This paper proposes a novel method of reversible data hiding in encrypted images (RDH-EI). We first provide an RDH-EI approach using single-level embedding, in which three parties are involved, including an image owner, a data hider, and a recipient. The image owner encrypts an original image into a ciphertext image. After dividing the original image into blocks, the owner pseudo-randomly permutes all blocks by a permutation key. With an encryption key, the image owner further encrypts the contents of all blocks using a stream cipher algorithm, during which pixels inside each block share the same stream bytes. Once the encrypted image is uploaded onto the server, a data hider embeds additional messages into the ciphertext. The data hider divides the encrypted image into blocks and selects peak pixels from each block using an embedding key. With the peak pixels, the data hider embeds an additional message using histogram shifting inside each block. On the receiver side, a recipient extracts the hidden message using the embedding key, and losslessly recover the original image with the permutation key and the encryption key. Based on the single-level algorithm, we further construct a multi-level approach. The embedding process is iteratively used to generate the marked encrypted images. Compared with state-of-the-art works, the proposed method achieves a better embedding efficiency and an error-free recovery.

A VLIW architecture stream cryptographic processor for information security

As an important branch of information security algorithms, the efficient and flexible implementation of stream ciphers is vital. Existing implementation methods, such as FPGA, GPP and ASIC, provide a good support, but they could not achieve a better tradeoff between high speed processing and high flexibility. ASIC has fast processing speed, but its flexibility is poor, GPP has high flexibility, but the processing speed is slow, FPGA has high flexibility and processing speed, but the resource utilization is very low. This paper studies a stream cryptographic processor which can efficiently and flexibly implement a variety of stream cipher algorithms. By analyzing the structure model, processing characteristics and storage characteristics of stream ciphers, a reconfigurable stream cryptographic processor with special instructions based on VLIW is presented, which has separate/cluster storage structure and is oriented to stream cipher operations. The proposed instruction structure can effectively support stream cipher processing with multiple data bit widths, parallelism among stream cipher processing with different data bit widths, and parallelism among branch control and stream cipher processing with high instruction level parallelism; the designed separate/clustered special bit registers and general register heaps, key register heaps can satisfy cryptographic requirements. So the proposed processor not only flexibly accomplishes the combination of multiple basic stream cipher operations to finish stream cipher algorithms. It has been implemented with 0.18μm CMOS technology, the test results show that the frequency can reach 200MHz, and power consumption is 310mw. Ten kinds of stream ciphers were realized in the processor. The key stream generation throughput of Grain-80, W7, MICKEY, ACHTERBAHN and Shrink algorithm is 100Mbps, 66.67Mbps, 66.67Mbps, 50 Mbps and 800Mbps, respectively. The test result shows that the processor presented can achieve good tradeoff between high performance and flexibility of stream ciphers.

Collaboration of RSA Algorithm Using EM2B Key with Word Auto Key Encryption Cryptography Method in Encryption of SQL Plaintext Database

RSA algorithm is a modern cryptographic algorithm and is often used for data security, and until now no one has been able to solve it. This algorithm uses two keys, public key and private key, the degree of difficulty of this algorithm lies in the factorization of large prime numbers. EM2B key algorithm function is to change the primary key become a new key into ASCII characters. This algorithm has the increament key algorithm function to change the length of the key characters are same as the plaintext. The Wake method is a stream cipher algorithm uses a 128 bit key and a 256 X 32 bit table. The strength of the RSA algorithm is the bit length used, and the strength of the WAKE method also lies in the bit length used and many rotation that occur. While the strength of the EM2B key algorithm lies in the increament key. After testing, the combination of three alogritmas consists of the RSA algorithm using the EM2B key and WAKE method and a combination of two algorithms with WAKE method using the EM2B key, the encryption results are better and safer than using only one WAKE algorithm.

A VLIW architecture stream cryptographic processor for information security

As an important branch of information security algorithms, the efficient and flexible implementation of stream ciphers is vital. Existing implementation methods, such as FPGA, GPP and ASIC, provide a good support, but they could not achieve a better tradeoff between high speed processing and high flexibility. ASIC has fast processing speed, but its flexibility is poor, GPP has high flexibility, but the processing speed is slow, FPGA has high flexibility and processing speed, but the resource utilization is very low. This paper studies a stream cryptographic processor which can efficiently and flexibly implement a variety of stream cipher algorithms. By analyzing the structure model, processing characteristics and storage characteristics of stream ciphers, a reconfigurable stream cryptographic processor with special instructions based on VLIW is presented, which has separate/cluster storage structure and is oriented to stream cipher operations. The proposed instruction structure can effectively support stream cipher processing with multiple data bit widths, parallelism among stream cipher processing with different data bit widths, and parallelism among branch control and stream cipher processing with high instruction level parallelism; the designed separate/clustered special bit registers and general register heaps, key register heaps can satisfy cryptographic requirements. So the proposed processor not only flexibly accomplishes the combination of multiple basic stream cipher operations to finish stream cipher algorithms. It has been implemented with 0.18μm CMOS technology, the test results show that the frequency can reach 200MHz, and power consumption is 310mw. Ten kinds of stream ciphers were realized in the processor. The key stream generation throughput of Grain-80, W7, MICKEY, ACHTERBAHN and Shrink algorithm is 100Mbps, 66.67Mbps, 66.67Mbps, 50 Mbps and 800Mbps, respectively. The test result shows that the processor presented can achieve good tradeoff between high performance and flexibility of stream ciphers.