Stochastic Multiplier Research Articles

Stochastic matrix multiplier using superconductor single-flux-quantum circuit

Abstract A superconducting single-flux-quantum (SFQ) circuit is suitable for stochastic computation that represents information in terms of the probability of “1”s in a finite-bit-length number train, due to its high-speed operation. In this paper, we demonstrate a matrix multiplier based on the SFQ logic circuits and superconductive random number generators (SRNGs). The stochastic multiplier required for the matrix product calculation is implemented using an AND gate. The stochastic adder is implemented by a multiplexer where the random number train generated by the SRNG is utilized as a control signal. We implemented 2 × 2 matrix multiplier targeting a frequency of 50 GHz, using the 10 kA/cm^2 Nb 4-layer superconductor circuit fabrication process.

An Energy-Efficient Binary-Interfaced Stochastic Multiplier Using Parallel Datapaths

Stochastic computing (SC) typically requires a low design complexity compared with weighted binary computing, so it has been successfully applied in neural networks (NNs). Usually, SC utilizes random bitstreams as its medium, which makes it suffer from a long delay that offsets its advantages. This drawback can be alleviated by utilizing parallel datapaths, which, however, will significantly increase the hardware cost due to the requirement of multiple parallel computing units. In this article, a hybrid bit-splitting generator (HBSG) is proposed to efficiently produce parallel bitstreams in a single clock cycle to reduce delay. The HBSG uniformly splits binary numbers into <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$R$</tex-math> </inline-formula> segments, each of which is encoded in parallel by using hardwired connections according to the weight of each bit. A binary-interfaced parallel stochastic multiplier (BipSMul) using the HBSG is then proposed to accelerate the multiplication in SC. Experimental results show that the BipSMul is more energy efficient than the state-of-the-art parallel and serial stochastic designs, as well as their binary and Booth counterparts, in delay, power-delay product (PDP), and area-delay product (ADP).

Implementation of Izhikevich neuron based on stochastic computing using a novel inspired Omega‐Flip stochastic number generator

AbstractThis paper presents an optimized stochastic multiplier to implement Izhikevich spiking neuron model. A novel stochastic number generator is used as the main block for stochastic computing to design a stochastic multiplier. The designed multiplier was used to describe and implement Izhikevich neuron model equation which is capable to produce variant responses of spiking neurons. To the best of the author's knowledge, this work is the pioneer using a designed multiplier for computing all of the multiplication expressions in spiking neuron equation. The effect of increasing number of bit streams on the accuracy of stochastic computing is studied. Furthermore, some numerical intervals that are more prone to the error are found and illustrated upon stochastic computing usage, and a method is proposed to improve the error prone numerical intervals. In addition, the response accuracy is optimized by changing time step parameter in solving ordinary differential Izhikevich neuron model equation using Euler's method. Hence, a 13‐bit stochastic multiplier is designed. It is found that variations in parameters a and b have a profound effect on the accuracy of recovery variable u and, consequently, on the responses. Out of 20 responses of Izhikevich neuron model, 11 responses are generated using the proposed stochastic computing method and compared with piecewise linear method and some previous architectures of Izhikevich neuron model implementations.

Stochastic Computing Implemented by Skyrmionic Logic Devices

Magnetic skyrmion, topologically non-trivial spin texture, has been considered as promising information carrier in future electronic devices because of its nanoscale size, low depinning current density and high motion velocity. Despite the broad interests in skyrmion racetrack memory, researchers have been recently exploiting logic functions enabled by using the particle-like behaviors of skyrmions. These functions can be applied to unconventional computing, such as stochastic computing (SC), which treats data as probabilities and is superior to binary computing due to its simplicity of logic operation. In this work, we demonstrate SC implemented by skyrmionic logic devices. We propose a skyrmionic AND-OR logic device as a multiplier in the stochastic domain and two skyrmionic multiplexer (MUX) logic devices as stochastic adders. With the assist of voltage controlled magnetic anisotropy (VCMA), the precise control of skyrmions collision is not required in the skyrmionic AND-OR logic device, thus improving the operation robustness. In the two MUX logic devices, skyrmions can be driven by Zhang-Li torque or spin orbit torque (SOT). Particularly, we can flexibly regulate the skyrmion motion by VCMA or voltage controlled Dzyaloshinskii-Moriya Interaction (VCDMI) in the SOT case. Furthermore, 3-bit stochastic multiplier and adder are demonstrated by micromagnetic simulations. In addition, simulations in synthetic antiferromagnets (SAF) show that the performance of our skyrmionic logic gates can be optimized through advanced materials. Our work opens up perspective to implement SC using skyrmionic logic devices.

Low-Cost Stochastic Hybrid Multiplier for Quantized Neural Networks

With increased interests of neural networks, hardware implementations of neural networks have been investigated. Researchers pursue low hardware cost by using different technologies such as stochastic computing (SC) and quantization. More specifically, the quantization is able to reduce total number of trained weights and results in low hardware cost. SC aims to lower hardware costs substantially by using simple gates instead of complex arithmetic operations. However, the advantages of both quantization and SC in neural networks are not well investigated. In this article, we propose a new stochastic multiplier with simple CMOS transistors called the stochastic hybrid multiplier for quantized neural networks. The new design uses the characteristic of quantized weights and tremendously reduces the hardware cost of neural networks. Experimental results indicate that our stochastic design achieves about 7.7x energy reduction compared to its counterpart binary implementation while maintaining slightly higher recognition error rates than the binary implementation. Compared to previous stochastic neural network implementations, our work derives at least 4x, 9x, and 10x reduction in terms of area, power, and energy, respectively.

Neural Network Classifiers Using a Hardware-Based Approximate Activation Function with a Hybrid Stochastic Multiplier

Neural networks are becoming prevalent in many areas, such as pattern recognition and medical diagnosis. Stochastic computing is one potential solution for neural networks implemented in low-power back-end devices such as solar-powered devices and Internet of Things (IoT) devices. In this article, we investigate a new architecture of stochastic neural networks with a hardware-oriented approximate activation function. The newly proposed approximate activation function can be hidden in the proposed architecture and thus reduce the whole hardware cost. Additionally, to further reduce the hardware cost of the stochastic implementation, a new hybrid stochastic multiplier is proposed. It contains OR gates and a binary parallel counter, which aims to reduce the number of inputs of the binary parallel counter. The experimental results indicate the newly proposed approximate architecture without hybrid stochastic multipliers achieves more than 25%, 60%, and 3x reduction compared to previous stochastic neural networks, and more than 30x, 30x, and 52% reduction compared to conventional binary neural networks, in terms of area, power, and energy, respectively, while maintaining the similar error rates compared to the conventional neural networks. Furthermore, the stochastic implementation with hybrid stochastic multipliers further reduces area about 18% to 80%, power from 15% to 113.1%, and energy about 15% to 131%, respectively.

HARA utility maximization in a Markov-switching bond–stock market

We present a flexible multidimensional bond–stock model incorporating regime switching, a stochastic short rate and further stochastic factors, such as stochastic asset covariance. In this framework we consider an investor whose risk preferences are characterized by the hyperbolic absolute risk-aversion utility function and solve the problem of optimizing the expected utility from her terminal wealth. For the optimal portfolio we obtain a constant-proportion portfolio insurance-type strategy with a Markov-switching stochastic multiplier and prove that it assures a lower bound on the terminal wealth. Explicit and easy-to-use verification theorems are proven. Furthermore, we apply the results to a specific model. We estimate the model parameters and test the performance of the derived optimal strategy using real data. The influence of the investor’s risk preferences and the model parameters on the portfolio is studied in detail. A comparison to the results with the power utility function is also provided.

Hardware and Energy-Efficient Stochastic LU Decomposition Scheme for MIMO Receivers

In this paper, we design a hardware and energy-efficient stochastic lower–upper decomposition (LUD) scheme for multiple-input multiple-output receivers. By employing stochastic computation, the complex arithmetic operations in LUD can be performed with simple logic gates. With proposed dual partition computation method, the stochastic multiplier and divider exhibit high computation accuracy with relative short length stochastic stream. We have designed and synthesized the stochastic LUD with CMOS 130-nm technology. According to the postlayout report, the hardware efficiency of the stochastic LUD is as high as $1.5\times $ compared with the exiting LUD methods, and the energy efficiency is also higher than the state-of-the-art LUD when the matrix dimension is $8\times 8$ and larger.

The Delay Effect in a Stochastic Multiplier–Accelerator Model

Abstract This paper extends the classical Samuelson multiplier–accelerator model for national economy. Actually, this new modeling structure removes the basic shortcoming of the original model producing stable business cycles when realistic values of the parameters (multiplier, accelerator) are entered into the system of equations. Under this new approach, we introduce some kind of randomness and memory into the system. We assume that consumption, private investment and governmental expenditure depend upon the national income values of the last n ( n &gt; 1 ) years and further assume that multiplier and accelerator factors are stochastic variables. Then stochastic delayed difference equations of higher order are employed to describe the model, while the respective solutions of higher order polynomials for the expectation of national income variables correspond to the typical observed business cycles of real economy. Stability and controllability conditions are investigated while numerical examples provide further insight and better understanding as regards the control actions, system design, and produced business cycles.

Policy Multipliers Under an Interest Rate Peg of Deterministic Versus Stochastic Duration

This paper revisits the size of the fiscal multiplier. The experiment is a fiscal expansion under the assumption of a pegged nominal rate of interest in linearised sticky price model. We demonstrate that a quantitatively important issue is the articulation of the exit from the policy experiment. If the monetary-fiscal expansion is stochastic with a mean duration of T periods, the fiscal multiplier can be unboundedly large. However, if the monetary-fiscal expansion is for fixed T periods, the multiplier is much smaller. Our explanation rests on a Jensen’s inequality-type argument: the deterministic multiplier is convex in duration, and the stochastic multiplier is a weighted average of the deterministic multipliers. The quantitative difference in the two multipliers also arises in a model with capital, and in the baseline non-linear model. However, the difference between the two is less pronounced in the non-linear models. The errors from a linear approximation are much larger for the stochastic exit model than for the deterministic exit model. Thus, we conclude that the deterministic exit model should be preferred.

Fiscal Multipliers under an Interest Rate Peg of Deterministic versus Stochastic Duration

This paper revisits the size of the fiscal multiplier. The experiment is a fiscal expansion under the assumption of a pegged nominal rate of interest. We demonstrate that a quantitatively important issue is the articulation of the exit from the policy experiment. If the monetary‐fiscal expansion is stochastic with a mean duration of T periods, the fiscal multiplier can be unboundedly large. However, if the monetary‐fiscal expansion is for a fixed T periods, the multiplier is much smaller. Our explanation rests on a Jensen's inequality type argument: the deterministic multiplier is convex in duration, and the stochastic multiplier is a weighted average of the deterministic multipliers. The quantitative difference in the two multipliers also arises in a model with capital, and in the baseline nonlinear model. However, the differences between the two are less pronounced in the nonlinear models. The errors from a linear approximation are much larger for the stochastic exit model then for the deterministic exit model.

Multiplier Models in Stochastic DEA

Data Envelopment Analysis (DEA) is a data-oriented performance evaluation method which has treated data as being deterministic. Throughout applications managers may encounter the data which are not recognized deterministically. In this paper a deterministic version of stochastic CCR multiplier model based on chance constrained programming approach is presented. The advantage of this method is that the stochastic essence of input-output variables has been taken into account. Using numerical example, we will demonstrate how this method works.

A Model of Chinese National Income Determination

A model consisting of a consumption function and an investment function is used to explain Chinese annual data in constant prices from 1953 to 1982. The data confirm Robert Hall's version of the permanent income hypothesis and the accelerations principle. Deviations of the observations from predictions of this model are attributed to political factors, including the Great Leap Forward in 195962, the Cultural Revolution in 1967-68, and the special government policies in 1978 and 1981.

Averaging Encoder for Pollution Monitoring and Control Sytems

The development of an averaging encoder interfacing pollution data to monitoring and control systems is discussed. A hard-wired logical circuit which makes the hit or miss Monte Carlo comparisons possible is presented. It performs the averaging of data for a definite time and the encoding simultaneously.Combined use of the Monte Carlo integration and the stochastic multiplier gives a unique encoder which can average the product of two variables so that total or average effluent mass of polluted material can be interfaced. The particular problems which occur with the use of weighted maximum sequence as random references are examined.