Standard Ball Grid Array Research Articles

High Frequency Base Materials: Laser-Material Interaction for HDI/ICP Applications

Abstract High frequency (HF) applications are nothing new. Nor are the multitudes of materials and processes in electronics dedicated to such applications. But with the rising applications and production volumes associated with 5G, IoT (Internet of Things), autonomous driving, and the like, a whole new emphasis is needed to characterize expected base material performance in terms of its processability. Laser-based manufacturing, and in particular laser via drilling, plays a large role in the interconnect and packaging concepts needed for the typically miniaturized design rules, but given the diversity of materials and laser types that can potentially be employed, some clear results-driven guidelines would be beneficial to manufacturers looking to optimize a cost/quality/throughput balance. In this paper we explore laser-based via drilling applications with base materials intended for use in high frequency end applications. There are several HF base material sets employed in HDI (High Density Interconnect)/ICP (Integrated Circuit Packaging) manufacturing, each with their own range of bandwidth and applicable dielectric constant. However, agnostic of the particular material application specifications, the aim of this analysis is to explore potential manufacturing benefits and/or trade-offs for diverse laser/material interactions, while focusing on via-drilling for the HDI and ICP industries in particular. Benefits and trade-offs are characterized by practical and quantifiable elements, precisely: throughput (vias per second), quality (roundness, burr, dimensional integrity, etc). In combination with various laser types, in particular UV (nanosecond), CO2 (microsecond) and green (femtosecond) wavelengths, we analyze the fundamental interaction with materials common to high frequency applications, namely LCP (Liquid Crystal Polymer), PTFE (Polytetrafluoroethylene), HF FR4, and PI (Polyimide) in an effort to attain practical guidelines for quality and manufacturability. Thus, evidence is provided to potentially increase manufacturing yield with a typically cost-inhibitive material set. Given the, as yet, novel usage of such materials for broadband HDI/ICP applications, this work aims to explore new or re-affirmed baselines suitable to the existing production landscape. Given the broad scope of potential DoE parameters, this work focuses on target via size (75um) applicable to multiple industrial applications, including but not exclusive to, handheld communications, automotive and IoT. Furthermore, the materials is clad with a 12um Cu foil to offer insight into ablation capabilities of each laser type. As a test vehicle default, the vias are drilled in a standard BGA (Ball Grid Array) grid with a pitch of 0.6mm. The results of this work offer-a scored matrix breakdown of our predetermined criteria (throughput, quality) to the laser-material subset analyzed. Given the non-exhaustive nature of this study, the conclusions do not aim to resolve laser-material dilemmas for all forms and factors of high frequency applications and material configurations, but rather offer conclusive evidence that a) high-frequency materials typically require special attention when processing with laser, b) not every laser type works at the same rate of efficiency and efficacy for each of the chosen HF materials and c) a cost/quality balance can be sought by cross referencing results from various laser sources for the intended application.

Experimental Study on 28nm Chip/Package Interactions in eWLB (Embedded Wafer Level BGA) Fan-Out Wafer Level Packages

To meet the continued demand for form factor reduction and functional integration of electronic devices, WLP (Wafer Level Packaging) is an attractive packaging solution with many advantages in comparison with standard BGA (Ball Grid Array) packages. The advancement of fan-out WLP has made it a more promising solution as compared with fan-in WLP, because it can offer greater flexibility in enabling more IO's, multi-chips, heterogeneous integration and 3D SiP. In particular, eWLB (Embedded Wafer Level BGA) is a fan-out WLP solution which can enable applications that require higher I/O density, smaller form factor, excellent heat dissipation, and thin package profile, and it has the potential to evolve in various configurations with proven integration flexibility, process robustness, manufacturing capacity and production yield. It also facilitates integration of multiple dies vertically and horizontally in a single package without using substrates. For eWLB fan-out WLP, the structural design as well as selection of materials is very important in determining the process yield and long term reliability. Therefore it is necessary to investigate the key design factors affecting the reliability comprehensively. This work is focused on an experimental study on the chip-package interactions in eWLB fan-out WLP with multilayer RDL's. Standard JEDEC component and board level tests were carried out to investigate reliability, and both destructive and non-destructive analyses were performed to investigate potential structural defects. Warpage, die cracking and other failures were characterized through metrology measurements and electrical tests. Board assembly processes (including SMT, underfill, etc.) were also studied. The influence of materials and structural design on the package reliability will be demonstrated. Thermal characterization and thermo-mechanical simulation results will also be discussed.

Emerging Flux Challenges for BGA Packages

The formation of a Ball Grid Array (BGA) solder joint is critical for a BGA package where typically a flux deposition process is used. Reflowing solder spheres to solderable pads on the bottom of substrates in standard BGA, FCBGA, CSP, and similar packages is considered to be a trivial step: a specialized BGA flux is usually pin-transferred onto the pads, followed by balldrop onto the substrate. However, with the increasing complexity and number of assembly processes taken prior to this final step, the formation of a reliable final joint is far from certain. In order to eliminate variability, many OSATs and ODMs use the so-called “two step” (double fluxing) approach, which is comprised of the non-value-added extra processes of prefluxing, reflowing, cleaning, and drying substrates immediately prior to the final flux-based ball-attach process. This paper details the sequence of processes seen in typical FCBGA assembly, and examines the effects of each set of prior processes on the solderability of the final pad. The introduction of a “one-step” pin-transfer ball-attach flux is shown to be a means of reducing both process cost and time, and also reducing the risk of increased warpage in the finished package. The paper also investigates the solderable surface and metallurgy of the substrate pad. The variety of new and emerging failure modes for the BGA process as well as the different testing methods for the materials will also be discussed.

Bonding Wire Loop Antenna in Standard Ball Grid Array Package for 60-GHz Short-Range Wireless Communication

High-speed short-range wireless communication systems are expected to utilize the 60-GHz band. This paper presents a bonding wire loop antenna in a standard ball grid array (BGA) package for 60-GHz short-range wireless communication. The proposed antenna has a loop shape and consists of two bonding wires connecting to a complementary metal-oxide-semiconductor (CMOS) chip and a metal plate on an interposer in a BGA package. The antenna can be fabricated at low cost by a conventional BGA package fabrication process. The BGA package is mounted on a printed circuit board (PCB) that consists of resin substrate, such as FR-4. The broadband impedance characteristic is achieved by adjusting the position of the metal pad for wire bonding. The antenna gain is improved by forming cranked ledges and notches in the metal patterns of the PCB, and the wide-angle radiation characteristic is realized. The sizes of the fabricated antenna and BGA package are approximately 0.6 mm × 1.0 mm × 0.3 mm and 9.0 mm × 9.0 mm × 0.9 mm, respectively. Performing measurements, the antenna gain with the PCB is from - 2.4 to 4.9 dBi over the 57- to 65-GHz frequency range and over an angular range of 60 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> in the horizontal plane.

Robust Reliability Performance of Large size eWLB (Fan-out WLP)

With reducing form-factor and functional integration of mobile devices, Wafer Level Packaging (WLP) is attractive packaging technology with many advantages in comparison to standard Ball Grid Array (BGA) packages. With the advancement of various fan-out WLP, it is more optimal and promising solution compared to fan-in WLP, because it can offer greater flexibility in design of more IOs, multi-chips, heterogeneous integration and 3D SiP. eWLB (embedded wafer level packaging) is a type of fan-out WLP enabling applications that require smaller form-factor, excellent heat dissipations, thin package profile as it has the potential to evolve in various configurations with proven manufacturing capacity and production yield. This paper discusses the recent advancements of robust reliability performance of large size eWLB. It will also highlight the recent achievement of enhanced component level reliability with advanced dielectric materials. After a parametric study and mechanical simulations, new advanced materials were selected and applied to eWLB. Standard JEDEC tests were carried out to investigate component level reliability of large size (9x9~14x14mm2) test vehicles and both destructive/non-destructive analysis were performed to investigate potential structural defects. Daisychain test vehicles were also tested for drop and TCoB (Temperature Cycle on Board) reliability performance in industry standard test conditions. Besides, this paper will also present a study of package level warpage behaviour with Thermo-Moire measurement.

Novel LTCC/BGA modules for highly integrated millimeter-wave transceivers

Advanced packaging concepts for highly integrated encapsulated millimeter-wave modules are demonstrated. Millimeter-wave monolithic integrated circuits (MMICs) are flip-chip mounted on top of a low-temperature co-fired ceramic (LTCC) package. This type of "smart package" can integrate various passive functions as well as compact interconnections between MMIC and vertical feedthroughs. The bottom side of this package is connected via a standard ball grid array (BGA) to a low-cost laminate printed circuit board serving as a motherboard for multiple LTCC modules. Fabricated passive LTCC test structures fully validate the approach for millimeter-wave applications. LTCC-/BGA-based packages feature good performance up to approximately 30 GHz. Alternatively to BGA technology, anisotropic conductive pastes are applied as well. They have proven to be suitable at least up to 40 GHz.

Lead-free ceramic ball grid array: Thermomechanical fatigue reliability

Flip-chip carriers have become the preferred solution for high-performance, application-specific integrated circuit and microprocessor devices. Typically, these are packaged in organic or ceramic ball grid array (BGA) packages, which cover a wide range of package input/output (I/O) capabilities required for high-performance devices, typically, between 300 to more than 1,600 I/O. Recently, there has been a move toward Pb-free solders as replacement alloys for standard, eutectic Sn/Pb and other Pb-based BGAs. The leading solder that has emerged from various Pb-free solder evaluations by industry and academic consortia is the Sn/Ag/Cu (SAC) alloy. One of the primary issues with changing solders is the reliability of the joints when these are subjected to thermomechanical fatigue (TMF). This evaluation has previously been conducted on SAC ceramic ball grid array (CBGA) assemblies in a 1.27-mm pitch.1 However, with the need to shrink the I/O pitch to accommodate higher wiring density, it has become increasingly important to conduct TMF reliability assessments in a 1-mm pitch format. This paper describes such an evaluation conducted using SAC BGA assemblies. The results show that, for a 1-mm pitch, the Pb-free SAC CBGA solution provides superior reliability as compared to the standard Sn/Pb CBGA solutions. This finding is an added incentive for a new CBGA offering employing the new Pb-free, SAC, single-alloy, self-aligning system.

Lead-free ball-grid array balls: Production method and properties

Production method and properties of lead-free ball-grid array (BGA) balls in comparison to standard BGA balls with the eutectic Sn-Pb composition are presented. Lead-free BGA balls can also be produced by an innovative process that allows the production of solder balls directly from the melt. In contrast to Sn-Pb solder balls, the surface of lead-free balls is not perfectly shiny but appears partly rough. This is caused by a different solidification behavior. The stability of Sn-based solder balls against darkening caused by oxidation effects during movement is far more pronounced than for Sn-Pb balls. The patent situation concerning Sn-based soft solders is not critical any more because of an existing “older” patent that covers comparable alloy types.