Stand-alone Hardware Research Articles

Real-Time Optimization of RISC-V Processors Based on Branch Prediction and Division Data Dependency

Whether a processor can meet the real-time requirements of a system is a crucial factor affecting the security of real-time systems. Currently, the methods for evaluating hardware real-time performance and the quality of real-time performance are not comprehensive. To address these issues, a “Hardware Real-Time Parameter (Hrtp)” is proposed, which integrates the concepts of “whether it meets real-time system requirements”, “execution speed”, and “operational stability”. This parameter is used to evaluate the real-time performance of RISC-V processors before and after optimization. The processor is optimized for real-time performance using a “simplified local history branch predictor” and a “division data dependency module”. Experimental results show that the processor’s branch prediction accuracy and division calculation speed have both improved. When running the CoreMark benchmark program and the division test program, the test results improved, indicating an enhanced “real-time” performance of the hardware. The changes in the “Standalone Hardware Real-Time Performance Parameter (Hrtp)” data are consistent with theoretical analysis, and it can meet the evaluation needs for “hardware real-time performance”.

Towards high-performance deep learning architecture and hardware accelerator design for robust analysis in diffuse correlation spectroscopy

This study proposes a compact deep learning (DL) architecture and a highly parallelized computing hardware platform to reconstruct the blood flow index (BFi) in diffuse correlation spectroscopy (DCS). We leveraged a rigorous analytical model to generate autocorrelation functions (ACFs) to train the DL network. We assessed the accuracy of the proposed DL using simulated and milk phantom data. Compared to convolutional neural networks (CNN), our lightweight DL architecture achieves 66.7% and 18.5% improvement in MSE for BFi and the coherence factor β, using synthetic data evaluation. The accuracy of rBFi over different algorithms was also investigated. We further simplified the DL computing primitives using subtraction for feature extraction, considering further hardware implementation. We extensively explored computing parallelism and fixed-point quantization within the DL architecture. With the DL model's compact size, we employed unrolling and pipelining optimizations for computation-intensive for-loops in the DL model while storing all learned parameters in on-chip BRAMs. We also achieved pixel-wise parallelism, enabling simultaneous, real-time processing of 10 and 15 autocorrelation functions on Zynq-7000 and Zynq-UltraScale+ field programmable gate array (FPGA), respectively. Unlike existing FPGA accelerators that produce BFi and the β from autocorrelation functions on standalone hardware, our approach is an encapsulated, end-to-end on-chip conversion process from intensity photon data to the temporal intensity ACF and subsequently reconstructing BFi and β. This hardware platform achieves an on-chip solution to replace post-processing and miniaturize modern DCS systems that use single-photon cameras. We also comprehensively compared the computational efficiency of our FPGA accelerator to CPU and GPU solutions.

Smart Voice Based Medical Chatbot for Disease Prediction

The global shortage of medical resources has intensified in recent years, exacerbated by a growing and aging population, particularly following the pandemic. However, advancements in robotics and artificial intelligence have empowered healthcare professionals to address these challenges. Intelligent Speech Technology (IST) is one such innovation that has helped doctors and patients enhance medical efficiency and reduce cumbersome tasks. Despite this, complex hospital environments with background noise and variations in patient pronunciation have limited IST's broader application. Yet, as machine learning technologies rapidly advance intelligent speech recognition capabilities, these obstacles are expected to be overcome in the near future. This project focuses on the concept of an AI-based voice- assisted chatbot for medical disease prediction. Deployed on a Raspberry Pi as a standalone hardware device, it utilizes natural language processing (NLP) and machine learning (ML) techniques to detect diseases by interacting with users through a series of questions. A groundbreaking innovation, the Speech-Assisted Chatbot for Medical Infectious Disease Prediction, promises to transform healthcare delivery. By leveraging AI-driven algorithms and natural language processing, it facilitates quick diagnosis and prescription generation through spoken interactions with patients. This simplifies and accelerates procedures, reduces error risks, improves patient care standards, saves valuable time for healthcare professionals, and enhances service availability, all contributing to better outcomes and more efficient healthcare processes.. Key Words: chatbot, NLP, Machine learning, Medical diagnosis, Speech, Artificial Intelligence etc.

Scalable Incident Reporting Framework: A Sensor and IoT Research

The Internet of Things (IoT) is one of the most rapidly emerging technologies. It is observed that while many devices/machines get connected in an application, it is a challenge for the IoT application designer to keep the application scalable. Scalability is the ability of a device/application to adapt to the changes in the environment and meet the changing needs in the future. The paper presents a layered IoT architecture and discusses issues related to the scalability of each layer. The best open-source technologies are explored. A novel system architecture of a scalable IoT framework is conceptualized in this paper. An application covering vehicle accident reporting is designed with the proposed framework. The application is tested in real-time using the standalone hardware and its ability to report the incidents is confirmed. The scalability metrics of the proposed framework are evaluated and the results are reported.

Design of programmable hardware security modules for enhancing blockchain based security framework

Globalization of the chip design and manufacturing industry has imposed significant threats to the hardware security of integrated circuits (ICs). It has made ICs more susceptible to various hardware attacks. Blockchain provides a trustworthy and distributed platform to store immutable records related to the evidence of intellectual property (IP) creation, authentication of provenance, and confidential data storage. However, blockchain encounters major security challenges due to its decentralized nature of ledgers that contain sensitive data. The research objective is to design a dedicated programmable hardware security modules scheme to safeguard and maintain sensitive information contained in the blockchain networks in the context of the IC supply chain. Thus, the blockchain framework could rely on the proposed hardware security modules and separate the entire cryptographic operations within the system as stand-alone hardware units. This work put forth a novel approach that could be considered and utilized to enhance blockchain security in real-time. The critical cryptographic components in blockchain secure hash algorithm-256 (SHA-256) and the elliptic curve digital signature algorithm are designed as separate entities to enhance the security of the blockchain framework. Physical unclonable functions are adopted to perform authentication of transactions in the blockchain. Relative comparison of designed modules with existing works clearly depicts the upper hand of the former in terms of performance parameters.

An Acoustic Fault Detection and Isolation System for Multirotor UAV

With the rising popularity of unmanned aerial vehicles (UAVs) and increasing variety of their applications, the task of providing reliable and robust control systems becomes significant. An active fault-tolerant control (FTC) scheme requires an effective fault detection and isolation (FDI) algorithm to provide information about the fault’s occurrence and its location. This work aims to present a prototype of a diagnostic system intended to recognize and identify broken blades of rotary wing UAVs. The solution is based on an analysis of acoustic emission recorded with an onboard microphone array paired with a lightweight yet powerful single-board computer. The standalone hardware of the FDI system was utilized to collect a wide and publicly available dataset of recordings in real-world experiments. The detection algorithm itself is a data-driven approach that makes use of an artificial neural network to classify characteristic features of acoustic signals. Fault signature is based on Mel Frequency Spectrum Coefficients. Furthermore, in the paper an extensive evaluation of the model’s parameters was performed. As a result, a highly accurate fault classifier was developed. The best models allow not only a detection of fault occurrence, but thanks to multichannel data provided with a microphone array, the location of the impaired rotor is reported, as well.

Real-time mental stress detection technique using neural networks towards a wearable health monitor

In recent times, detection of mental stress using physiological signals has received widespread attention from technology researchers. Although many interesting research works have been reported in this area, evidence of hardware implementation is occasional. The main challenge in stress detection research is use of the optimum number of physiological signals and real-time detection with low-complexity algorithms. In this work, a real-time stress detection technique is presented which utilizes only a photoplethysmogram (PPG) signal to achieve improved accuracy over multi-signal-based mental stress detection techniques. A short 5 s segment of a PPG signal was used for feature extraction with an autoencoder (AE), and features were minimized using recursive feature elimination (RFE) integrated with a multi-class support vector machine (SVM) classifier. The proposed AE-RFE-SVM-based mental stress detection technique was tested with the WeSAD dataset to detect four levels of mental state, namely baseline, amusement, meditation and stress, and achieved an overall accuracy, F1 score and sensitivity of 99%, 0.99 and 98%, respectively, for 5 s PPG data. The technique provided improved performance over discrete wavelet transformation-based feature extraction followed by classification with either of the five types of classifiers, namely SVM, random forest, k-nearest neighbor, linear regression and decision tree. The technique was translated into quad-core-based standalone hardware (1.2 GHz, 1 GB RAM). The resultant hardware prototype achieved low latency (∼0.4 s) and had a low memory requirement (∼1.7 MB). The present technique can be extended to develop a remote healthcare system using wearable sensors.

Horizontal Side-Channel Vulnerabilities of Post-Quantum Key Exchange and Encapsulation Protocols

Key exchange protocols and key encapsulation mechanisms establish secret keys to communicate digital information confidentially over public channels. Lattice-based cryptography variants of these protocols are promising alternatives given their quantum-cryptanalysis resistance and implementation efficiency. Although lattice cryptosystems can be mathematically secure, their implementations have shown side-channel vulnerabilities. But such attacks largely presume collecting multiple measurements under a fixed key, leaving the more dangerous single-trace attacks unexplored. This article demonstrates successful single-trace power side-channel attacks on lattice-based key exchange and encapsulation protocols. Our attack targets both hardware and software implementations of matrix multiplications used in lattice cryptosystems. The crux of our idea is to apply a horizontal attack that makes hypotheses on several intermediate values within a single execution all relating to the same secret, and to combine their correlations for accurately estimating the secret key. We illustrate that the design of protocols combined with the nature of lattice arithmetic enables our attack. Since a straightforward attack suffers from false positives, we demonstrate a novel extend-and-prune procedure to recover the key by following the sequence of intermediate updates during multiplication. We analyzed two protocols, Frodo and FrodoKEM , and reveal that they are vulnerable to our attack. We implement both stand-alone hardware and RISC-V based software realizations and test the effectiveness of the proposed attack by using concrete parameters of these protocols on physical platforms with real measurements. We show that the proposed attack can estimate secret keys from a single power measurement with over 99% success rate.

A Compact Hardware Implementation of CCA-Secure Key Exchange Mechanism CRYSTALS-KYBER on FPGA

Post-quantum cryptosystems should be prepared before the advent of powerful quantum computers to ensure information secure in our daily life. In 2016 a post-quantum standardization contest was launched by National Institute of Standards and Technology (NIST), and there have been lots of works concentrating on evaluation of these candidate protocols, mainly in pure software or through hardware-software co-design methodology on different platforms. As the contest progresses to third round in July 2020 with only 7 finalists and 8 alternate candidates remained, more dedicated and specific hardware designs should be considered to illustrate the intrinsic property of a certain protocol and achieve better performance. To this end, we present a standalone hardware design of CRYSTALS-KYBER, amodule learning-with-errors (MLWE) based key exchange mechanism (KEM) protocol within the 7 finalists on FPGA platform. Through elaborate scheduling of sampling and number theoretic transform (NTT) related calculations, decent performance is achieved with limited hardware resources. The way that Encode/Decode and the tweaked Fujisaki-Okamoto transform are implemented is demonstrated in detail. Analysis about minimizing memory footprint is also given out. In summary, we realize the adaptive chosen ciphertext attack (CCA) secure Kyber with all selectable module dimension k on the smallest Xilinx Artix-7 device. Our design computes key-generation, encapsulation (encryption) and decapsulation (decryption and reencryption) phase in 3768/5079/6668 cycles when k = 2, 6316/7925/10049 cycles when k = 3, and 9380/11321/13908 cycles when k = 4, consuming 7412/6785 LUTs, 4644/3981 FFs, 2126/1899 slices, 2/2 DSPs and 3/3 BRAMs in server/client with 6.2/6.0 ns critical path delay, outperforming corresponding high level synthesis (HLS) based designs or hardware-software co-designs to a large extent.

Analysis of Optimal Machine Learning Approach for Battery Life Estimation of Li-Ion Cell

State of health (SOH) and remaining useful life (RUL) are two major key parameters which plays a major role in battery management system. In recent years, various machine learning approaches have been proposed to estimate SOH and RUL effectively for establishing the battery conditions. In the proposed work establishes an effective method to predict the battery aging process with accurate battery health estimation with real time simulations and hardware approach. This paper effectively exhibits a process to estimate SOH and RUL of a Li-Ion 18650 cell which are based on various factors like state of charge, discharge voltage transfers characteristics, internal resistance and capacity. To identify an optimal SOH and RUL machine learning based estimation approach, various battery’s statistical models are developed and implemented on a standalone hardware platform. The experimental results in this real time application shows that SOH is predicted by deep neural network approach which are found to be within the accepted error rate of ±5% and long short time memory neural network model estimates a battery’s RUL effectively with an accuracy of ±10 cycles. This approach exhibits various machine learning models in an realistic hardware platform which establishes optimal battery life.

Real-time Fuzzy Image Processing Method for Visual feedback of a Follower Robot

In this paper, an adaptive visual feedback system and controller has been designed and implemented in real-time to control the movements of a line follower robot to be smoother and faster. The robot consists of a couple of motorized wheels, the real-time controller and a CMOS camera as the only sensor for detecting line and feedback. The measurement based on real-time image processing and motor drive feedback used in this robot makes it robust to the obstacles and surface disturbances that may deviate robot. The image processing algorithm is adaptive to the line’s color and width too. Image processing techniques have been implemented in real-time to detect the line in the image frame and extract the necessary information (like line’s edge, coordinates and angle). A NI myRIO module is used as a stand-alone hardware unit and RT (Real-Time) target for implementation of controllers and image processing in LabVIEW environment. Both results of real-time and non-real-time implementation of controllers have been compared. To show the performance of real-time image processing in the control of this robot, three types of controllers (i.e. P, PI and Fuzzy controllers) have been implemented for line following tests and the results have been compared. At the end, it was found that the fuzzy controller controls the robot movements smoother, faster, with less errors and quicker response time compare to the other controllers

SST: Software Sonic Thermometer on Acoustic-Enabled IoT Devices

Temperature is an important data source for weather forecasting, agriculture irrigation, anomaly detection, etc. While temperature measurement can be achieved via low-cost yet standalone hardware with reasonable accuracy, integrating thermal sensing into ubiquitous computing devices is highly non-trivial due to the design requirement for specific heat isolation and proper device layout. In this paper, we present the first integrated thermometer using commercial-off-the-shelf acoustic-enabled devices. Our software sonic thermometer (SST) utilizes on-board dual microphones on commodity mobile devices to estimate sound speed, which has a known relation with temperature. To precisely measure temperature via sound speed, we propose a chirp mixing approach to circumvent low sampling rates on commodity hardware and design a pipeline of signal processing blocks to handle channel distortions. SST, for the first time, empowers ubiquitous computing devices with thermal sensing capability. It is portable and cost-effective, making it competitive with current thermometers using dedicated hardware. SST is potential to facilitate many interesting applications such as large-scale distributed thermal sensing, yielding high temporal/spatial resolutions with unimaginable low costs. We implement SST on a commodity platform and results show that SST achieves a median accuracy of <inline-formula><tex-math notation="LaTeX">${0.5^\circ \mathrm{C}}$</tex-math></inline-formula> even at varying humidity levels.

Results of the Fast-Music Project—Five Contributions to the Domain of Distributed Music

Due to the conventional “best-effort” approach that had no guarantee of packet delivery, the Internet was not initially developed for the purpose of sending real-time traffic. However, within the last 20 years and as part of the evolving trend of globalization along with distributed work processes, IP-based telecommunication has become a widely accepted and commonly used service. In that context a number of researchers have been investigating how far distributed communication on the Internet can be applied in terms of artistic music performances. Such a scenario exhibits signal delay boundaries tenfold less than the common video conferencing thresholds of 250 ms or more. Several successful results and actual implementations exist. However, apart from minor details, all of them share the same or at least similar approaches. In that context we established the fast-music research project in order to identify and develop novel approaches within this domain. In this paper we will present the final results of this project, which took place from 2016 to 2019. The target of fast-music was divided into five main goals: With respect to audio, we aimed for the development of a versatile streaming solution, the creation of a synchronizable standalone hardware and the installation of a server-based streaming solution. In terms of video, a latency-optimized capture/display component and an alternative IR-tracking based technology with 3D support was developed.

Detection and mitigation of attacks on transportation networks as a multi-stage security game

In recent years, state-of-the-art traffic-control devices have evolved from standalone hardware to networked smart devices. Smart traffic control enables operators to decrease traffic congestion and environmental impact by acquiring real-time traffic data and changing traffic signals from fixed to adaptive schedules. However, these capabilities have inadvertently exposed traffic control to a wide range of cyber-attacks, which adversaries can easily mount through wireless networks or even through the Internet. Indeed, recent studies have found that a large number of traffic signals that are deployed in practice suffer from exploitable vulnerabilities, which adversaries may use to take control of the devices. Thanks to the hardware-based failsafes that most devices employ, adversaries cannot cause traffic accidents directly by setting compromised signals to dangerous configurations. Nonetheless, an adversary could cause disastrous traffic congestion by changing the schedule of compromised traffic signals, thereby effectively crippling the transportation network. To provide theoretical foundations for the protection of transportation networks from these attacks, we introduce a game-theoretic model of launching, detecting, and mitigating attacks that tamper with traffic-signal schedules. We show that finding optimal strategies is a computationally challenging problem, and we propose efficient heuristic algorithms for finding near optimal strategies. We also introduce a Gaussian-process based anomaly detector, which can alert operators to ongoing attacks. Finally, we evaluate our algorithms and the proposed detector using numerical experiments based on the SUMO traffic simulator.

A biomorphic neuron model and principles of designing a neural network with memristor synapses for a biomorphic neuroprocessor

This paper presents an original biomorphic neuron model, which differs from common IT models by a more complex synapse structure and from biological models by replacement of differential equations that describe the change in potential over time with explicit recurrence expressions by approximation of experimental data in the cortical neuron, and therefore, by transition from the spiking information coding to the coding using the average frequency of action potentials per a simulation step. This approach ensures sufficiently simple and efficient calculation of an ultra-large neural network in the stand-alone hardware with limited computing resources. The model consists of three separate functional parts: dendrites, soma, and axon, which allows implementing any connections between functional parts of different neurons, thus making the neural network architecture more flexible. To perform functional testing of the neuron model, the test neural network performing simple association and constructed as a consequent stack of functional blocks with primary connections organized using experimental neurophysiological data was simulated. It is shown that encoding of the information transmitted by the impulses, similar to biological ones, allows using memristors for calculating recurrence expressions that describe the change in the quantity of neurotransmitter receptors of the dendrite membrane. The elaborated biomorphic neuron model, defined conceptual principles of a neural network construction based on it, as well as replacement of synapses in the neural network with memristors will allow building an ultra-large biomorphic neural network that simulates the functioning of a separate brain cortical column in the stand-alone hardware—a biomorphic neuroprocessor.

The ToolDAQ DAQ Software Framework &amp; Its Use In The Hyper-K &amp; ANNIE Detectors

DAQ software is often a little-considered part of an experiment, with many experiments either using a rigid, heavily convoluted multi experiment framework or custom built software that lacks features and is fragmented. Equally these solutions tend not to be fault tolerant, scalable, distributed, dynamic to hardware changes or easy to produce. Presented here is ToolDAQ a C++ DAQ framework which has been designed to be easy and fast to develop for in a modular and simple way. It has many features such as in-built service discovery, dynamic reconfiguration, remote control/monitoring via web and terminal interfaces and a highly scalable fault-tolerant network communication infrastructure provided by ZeroMQ (ZMQ) built in. It is also compatible with newer and older hardware, both being very lightweight and with low dependencies. The framework is currently in use on the Accelerator Neutrino Neutron Interaction Experiment (ANNIE) in Fermilab and has been used to develop the DAQ for Hyper Kamiokande (Hyper-K) , whose implementations and use cases we will discuss, as well as many other places like stand-alone hardware and the intermediate water Cherenkov detector (E61) at J-PARC.

Intrusion Detection and Prevention Systems as a Service in Could-based Environment

Intrusion Detection and Prevention Systems (IDPSs) are standalone complex hardware, expensive to purchase, change and manage. The emergence of Network Function Virtualization (NFV) and Software Defined Networking (SDN) mitigates these challenges and delivers middlebox functions as virtual instances. Moreover, cloud computing has become a very cost-effective model for sharing large-scale services in recent years. Features such as portability, isolation, live migration, and customizabil-ity of virtual machines for high-performance computing have attracted enterprise customers to move their in-house IT data center to the cloud. In this paper, we formulate the placement of Intrusion Detection and Prevention Systems (IDPS) and introduce a model called Incremental Mobile Facility Location Problem (IMFLP) to study the IDPP problem. Moreover, we propose a novel and efficient solution called Adaptive Facility Location (AFL) to efficiently solve the optimization problem introduced in the IMFLP model. The effectiveness of our solution is evaluated through realistic simulation studies compared with other popular online facility location algorithms.

Run-time reconfigurable instruments for advanced board-level testing

The last decade has seen increasingly rapid growth in the prevalence of FPGA devices. Today, FPGAs are extensively used in all commercial sectors, like communications, consumer, military and industry. Test engineers also recognized a great potential of FPGAs for test and measurement (T&M) purposes. The main benefit of FPGA devices is a possibility for hardware reconfiguration. This feature turns FPGAs into a flexible hardware base for T&M instrumentation. Multiple different instruments can be implemented and executed on the same FPGA device, thus significantly reducing the expense of purchasing stand-alone hardware instruments. At the same time, FPGAs being integrated to the system can also be exploited as a platform for embedded instrumentation (EI) [1]. In this work, we consider an approach that temporarily reuses an existing on-board FPGA resource to carry out necessary manufacturing tests. As the allocated FPGA logic is reclaimed for functional use after the test is finished, the presented technique does not require hardware changes and thus does not introduce additional costs.

Hardware implementation of electrical resistance tomography for damage detection of carbon fibre–reinforced polymer composites

The growing use of carbon fibre–reinforced polymer materials in aerospace and industrial applications requires the deployment of appropriate tools for detecting the occurrence and development of damage as well as for monitoring the durability of conductive composite structures. Electrical resistance tomography is a promising method in this field, since many types of fibre composite defects cause changes in the spatial distribution of conductivity. In comparison with other methods in the field of structural health monitoring, electrical resistance tomography has, at first glance, modest requirements for sensors, and thus appears to be a useful instrument in this field. Most of the previously conducted experiments in this field relied on the stand-alone hardware thereby did not contribute to a technological readiness level of the electrical resistance tomography. The article describes an experiment conducted on a carbon fibre–reinforced polymer composite specimen in laboratory conditions nevertheless with minimum usage of stand-alone equipment. Attention is focused on the first steps in the development of hardware, namely on the instrumental amplifier with active shielding and the voltage controlled current source. Experimental verification of usability of these components along with observed common mode voltage error and dynamic range is useful for next development of more complicated device such as a multiplexer. Greater attention is also paid to the implementation of electrodes, as these are a key part. The main contributions of proposed work lie in the usability verification of the key hardware components with the help of basic image reconstruction of the real damage.

Minimising latency of pitch detection algorithms for live vocals on low-cost hardware

A pitch estimation device was proposed for live vocals to output appropriate pitch data through the musical instrument digital interface (MIDI). The intention was to ideally achieve unnoticeable latency while maintaining estimation accuracy. The projected target platform was low-cost, standalone hardware based around a microcontroller such as the Microchip PIC series. This study investigated, optimised and compared the performance of suitable algorithms for this application. Performance was determined by two key factors: accuracy and latency. Many papers have been published over the past six decades assessing and comparing the accuracy of pitch detection algorithms on various signals, including vocals. However, very little information is available concerning the latency of pitch detection algorithms and methods with which this can be minimised. Real-time audio introduces a further latency challenge that is sparsely studied, minimising the length of sampled audio required by the algorithms in order to reduce overall total latency. Thorough testing was undertaken in order to determine the best-performing algorithm and optimal parameter combination. Software modifications were implemented to facilitate accurate, repeatable, automated testing in order to build a comprehensive set of results encompassing a wide range of test conditions. The results revealed that the infinite-peak-clipping autocorrelation function (IACF) performed better than the other autocorrelation functions tested and also identified ideal parameter values or value ranges to provide the optimal latency/accuracy balance. Although the results were encouraging, testing highlighted some fundamental issues with vocal pitch detection. Potential solutions are proposed for further development.