Stacking Faults In Silicon Research Articles

Preoxidation gettering of oxidation-induced stacking faults in silicon by the phosphorus diffusion process : Jhy-Horng Chen and Mao-Chieh Chen. Int. J. Electron.47, (6) 555 (1979)

Preoxidation gettering of oxidation-induced stacking faults in silicon by the phosphorus diffusion process : Jhy-Horng Chen and Mao-Chieh Chen. Int. J. Electron.47, (6) 555 (1979)

Preoxidation gettering of oxidation-induced stacking faults in silicon by the phosphorus diffusion process

Preoxidation gettering of oxidation-induced stacking faults (OSF) in a silicon wafer by the reverse side phosphorus diffusion-induced misfit dislocations has boon studied. This gettering scheme either prevents the formation of OSF during the thermal oxidation of silicon or deactivates the electrical activity of those OSF having heen formed. The get taring action takes place by removing or isolating the impurities from being precipitated at the OSF nueleation sites and confines them to the misfit dislocations al the reverse.side of the wafer. It is expected that the misfit dislocations continue to act as sinks of impurities during the subsequent high-temperature oxidation process and results in a great improvement of device yield and performance.

The influence of annealing ambient on the shrinkage kinetics of oxidation-induced stacking faults in silicon

The shrinkage behavior of oxidation-induced stacking faults (OSF’s) during an annealing in nitrogen, argon, and hydrogen is studied as a function of both annealing temperature and time. Independent of the used gas atmosphere, the OSF shrinkage rate is characterized by an activation energy of 4.9 eV. To explain the different experimental results, an interstitial model for the stacking fault shrinkage is proposed.

Oxygen partial pressure dependence of the fixed surface-state charge QSS due to thermal oxidation of n- (100) silicon

The fixed surface-state charge QSS has been determined for (100) n-type silicon oxidized in different partial pressures of oxygen (pO2). It has been found that the QSS is directly proportional to pO2 and is given by QSS×10−10= (14.1±12.7) pO2+(5.44±0.78) in the pO2 range 0.1–1.0 where pO2 is the partial pressure of oxygen in the oxygen-nitrogen mixture. The results are discussed in view of the concentration of the excess silicon present in silicon near the oxide-silicon interface and its assumed relationship to the length of oxidation-induced stacking faults in silicon.

Control of Oxidation-Induced Stacking Faults in Silicon by Chlorine Implantation

Stacking faults in thermally-oxidized silicon wafers were shrunk by chlorine implantation into the SiO2 layer and subsequent annealing in dry O2. By assuming that the shrinkage of stacking faults was due to vacancy diffusion into them, the vacancy concentration near the Si–SiO2 interface was estimated from the observed shrinkage rates. The increase in vacancy concentration due to chlorine was expressed as κCn at 1100°–1200°C, where κ is a factor dependent on the Cl content, and Cn is the vacancy concentration in equilibrium with the oxidizing interface of non-implanted wafers. Chlorine showed no effect on fault shrinkage during annealing in dry N2. Chlorine implantation into the substrates of oxidized wafers and into bare Si wafers caused unfaulting reaction of stacking faults, suppression of fault generation, and generation of secondary defects during subsequent annealing in dry O2.

Erratum: Role of point defects in the growth of the oxidation-induced stacking faults in silicon

Erratum: Role of point defects in the growth of the oxidation-induced stacking faults in silicon

Study of single-electron excitations by electron microscopy I. Image contrast from delocalized excitations

Abstract The inelastic scattering of fast electrons by the excitation of L-shell electrons at a stacking fault in silicon has been studied with a scanning transmission electron microscope. It was found that the bright-field stacking fault contrast is preserved in the filtered L-shell-loss signal at 100 eV. This result is discussed in terms of the delocalization of the excitation mechanism. It is concluded that localization effects will typically become significant only for energy transfers greater than 1 keV from a fast electron of energy 80 keV.

The core structure of extrinsic stacking faults in silicon

The core structure of oxidation-induced extrinsic stacking faults in silicon has been studied by high-resolution transmission electron microscopy. The stacking faults were viewed edge-on in thin (011) crystals so that two sets of (111) lattice planes were imaged simultaneously. The images confirm the stacking sequence A‖aCcB‖b (vertical bars denote twinning planes) that was predicted by Hornstra for the stacking-fault core.

Role of point defects in the growth of the oxidation-induced stacking faults in silicon

A new mechanism, describing the growth of the oxidation-induced stacking faults (OISF) in silicon has been formulated. This mechanism predicts the temperature, time, and oxygen-pressure dependences of the length of the faults in agreement with experimental measurements. The formulation of the mechanism and the derivation of an equation for the length is based on the following assumptions. (a) The growth of the stacking faults at the heterogeneous nucleation sites is analogous to the crystalline growth at the surface kinks. (b) There is an excess of silicon atoms at the Si${\mathrm{O}}_{2}$-Si interface. The concentration of the excess silicon atoms depends on the partial pressure of oxygen during oxidation and on the concentration of the charged vacancies in the adjacent bulk of the silicon. (c) The self-diffusion in silicon occurs by the formation and migration of the charged vacancies. The resultant derivation and comparison with experiment strongly support the new mechanism. (i) The equation describing the length of OISF has been derived to be $L={K}^{\ensuremath{'}}{P}_{{\mathrm{O}}_{2}}^{m}{t}^{n}\mathrm{exp}(\ensuremath{-}\frac{Q}{\mathrm{kT}})$, which is exactly the same as borne out of experimental findings reported earlier. (ii) Values of $m$ and $n$ have been derived and were found to be in good agreement with previously measured values. (iii) Expressions for ${K}^{\ensuremath{'}}$ and $Q$ have been obtained. Using these expressions and available data from literature, ${K}^{\ensuremath{'}}$ and $Q$ were calculated and were found to be in excellent agreement with experiment. (iv) Two different sets of values of $m$, ${K}^{\ensuremath{'}}$ and $Q$ for lower and higher temperature ranges have been obtained. This is in agreement with experimental observation which clearly indicated existence of two temperature ranges (one \ensuremath{\le} 1150\ifmmode^\circ\else\textdegree\fi{}C and the other \ensuremath{\ge} 1200\ifmmode^\circ\else\textdegree\fi{}C).

Reflection X-ray topography of oxidation-induced stacking faults in silicon

Reflection X-ray topography of oxidation-induced stacking faults in silicon

Shrinkage and annihilation of stacking faults in silicon

Shrinkage and annihilation of oxidation‐induced stacking faults in silicon have been investigated by means of combined methods of successive annealing in nitrogen atmosphere and etching technique. The shrinkage rates were measured and the activation energies for shrinkage were determined to be 4.1 and 4.9 eV for (111) and (100) surfaces, respectively. Experimental results are interpreted in terms of climbing of a Frank loop, indicating that the shrinkage process is governed by a mechanism in connection with the self‐diffusion of silicon. A novel gettering technique is proposed.

Annihilation of Stacking Faults in Silicon by Impurity Diffusion

The stacking faults grown into silicon during thermal oxidation were shrunk by high temperature heat‐treatment in a nitrogen atmosphere. The activation energy for fault shrinkage was 5.2 eV, and nearly equal to that of silicon self‐diffusion, 5.13 eV. The shrinkage phenomenon is due to the removal of silicon atoms, which form the stacking faults of extrinsic type, by diffusion via vacancies. Therefore the shrinkage rate depends on the vacancy concentration in silicon. The high concentration diffusion of boron, phosphorus, and arsenic in silicon generates the excess vacancies induced by donor doping, or by the stress due to solute lattice contraction of the impurity. The shrinkage of stacking faults by these excess vacancies was investigated. The faults shrank rapidly and disappeared for a short time in comparison with simple heat‐treatment. The annihilation of stacking faults in silicon was also influenced by the coulomb interaction or the complex formation between the negatively charged vacancy and impurity.

Weak Beam Imaging and Diffraction Studies of Stacking Faults in Silicon

In studying ion implanted semiconductors and fast neutron irradiated metals, the need for characterizing small dislocation loops having diameters of a few hundred angstrom units usually arises. The weak beam imaging method is a powerful technique for analyzing these loops. Because of the large reduction in stacking fault (SF) fringe spacing at large sg, this method allows for a rapid determination of whether the loop is faulted, and, hence, whether it is a perfect or a Frank partial loop. This method was first used by Bicknell to image small faulted loops in boron implanted silicon. He explained the fringe spacing by kinematical theory, i.e., ≃l/(Sg) in the fault fringe in depth oscillation. The fault image contrast formation mechanism is, however, really more complicated.

Elimination of Stacking Faults in Silicon by Trichloroethylene Oxidation

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Anomalous temperature effect of oxidation stacking faults in silicon

We observed an anomalous temperature effect in the growth of oxidation stacking faults in silicon. For a given oxidation time, the size of stacking faults first increases with temperature following an Arrhenius relation, reaches a peak at some temperature, and then decreases with temperature rather sharply until, finally, the faults totally vanish. The temperature above which the oxidation stacking faults vanish is dependent on the crystal surface orientation as well as on the oxidation ambients. In dry oxygen, this temperature is ∼1240 °C for {100} surfaces, ∼1220 °C for {111} surfaces, and ∼1175 °C for {1,0,11} surfaces (5° off {100}). Thus, the size-versus-temperature curve of the growth of oxidation stacking faults can be divided into two regions, which may be called the growth and the retrogrowth regions. In the growth region the growth follows a power law of (size) ∝ (time)0.8; in the retrogrowth region, the power law breaks down. The activation energy in the growth region is 2.3 eV for all surface orientations and oxidation ambients. A more complete picture of the growth of stacking faults emerges, in which the reported ’’immunity to stacking faults’’ of certain vicinal {100} surfaces is merely a point far out in the retrogrowth region.

On the annihilation of oxidation induced stacking faults in silicon

Abstract By employing transmission electron microscopy the mechanisms for the annihilation of oxidation-induced stacking faults in silicon have been examined, Faults are removed from the crystal as a result of fault shrinkage as well as by the initiation of the unfaulting reaction involving the nucleation and motion of Shockley partials. Sequential heat treatments of silicon crystals under oxidizing and impurity-diffusing conditions, characteristic of semiconductor device and circuit manufacture, can promote fault-annihilation processes.

Circular stacking faults in silicon

An electron microscopic diffraction study for circular stacking faults in silicon has been carried out. For the first time it has been possible to make direct correlation between the faults and subsurface precipitates, and to confirm that circular fault growth involves climb of a Frank dislocation from a precipitate site.

Oxidation-induced stacking faults in silicon. I. Nucleation phenomenon

Mechanisms for the nucleation of oxidation-induced stacking faults in silicon have been examined. Fault nucleation is found to occur at sites of mechanical damage and at impurity inhomogeneities in the silicon. In either case, nucleation occurs by the coalescence of excess interstitials into Frank loops surrounded by dislocations of the type (a/3)(111). Nucleation in damage-free crystals occurs along a banded or striated distribution. This is identical to the distribution of shallow noncrystallographic etch pits in the unoxidized wafer which have been linked to vacancy-oxygen complexes. The common distribution pattern indicates that the impurity inhomogeneities are nucleation sites for fault formation. Models for the nucleation phenomenon are proposed based upon local excess oxygen diffusion into regions of excess vacancy concentration in the crystals.

Oxidation-induced stacking faults in silicon. II. Electrical effects in P N diodes

The electrical characteristics of boron-diffused P+N diodes containing electrically active stacking faults (EASF) are investigated. The method combines an analysis of the I-V characteristics of the diodes with information derived from a scanning-electron-beam technique, the electron-beam-induced current (EBIC) mode. Stacking faults (SF) measuring 1–2 μm in length nucleate and develop in the near-surface region of the silicon slice during the initial oxidation process. Subsequent to the boron diffusion, the SF are heavily decorated with impurity precipitates. Excess reverse currents are measured at room temperature over a broad range of voltage from the very-low-voltage region where VR < kT/q to the high-voltage preavalanche region where VR≫kT/q. Two distinct regions are observed in the I-V characteristics of all diodes containing EASF's. These regions are separated by an effective threshold voltage VTHE, which is characteristic of the EASF's in the particular diode. For typical diodes with a junction depth Xj=0.4 μm, experimentally determined values for VTHE are in the range 0.1–10.0 V. When the applied reverse voltage VR < VTHE the diode exhibits the two regions characteristic of silicon diodes at room temperature; a low-field Ohmic conductance region when VR < k T/q and a space-charge-generation region when VR > k T/q, which is similiar to a modified form of SNS theory. In this region, the excess generation currents are found to correlate with the threshold voltage of the EASF's. When VR > VTHE a voltage power-law dependence is observed where IRαVn, n≈4.75±0.25. This carrier-generation effect results from the interaction between the strain field and/or the impurity atmosphere surrounding the EASF and the depletion field of the P N junction. The composite defect introduces a local high-density zone of g-r centers which reduce the effective lifetime of minority charge carriers in the region of the SF. The localized g-r zones are typically 20 μm2 in cross-sectional area with an effective lifetime of 4 – 400 ps. They are distributed nonuniformly, and are the direct source of excess IR currents measured at room temperature.

Closure to “Discussion of ‘Electrically Active Stacking Faults in Silicon’ [K. V. Ravi, C. J. Varker, and C. E. Volk (pp. 533–541, Vol. 120, No. 4)

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