Spring Hardening Research Articles

Post-CMOS processing for high-aspect-ratio integrated silicon microstructures

Presents a new fabrication sequence for integrated-silicon microstructures designed and manufactured in a conventional complementary metal-oxide-semiconductor (CMOS) process. The sequence employs a post-CMOS deep silicon backside etch, which allows fabrication of high aspect ratio (25:1) and flat (greater than 10 mm radius of curvature) MEMS devices with integrated circuitry. A comb-drive resonator, a cantilever beam array and a z-axis accelerometer were fabricated using this process sequence. Electrical isolation of single-crystal silicon was realized by using the undercut of the reactive ion etch (RIE) process. Measured out-of-plane curling across a 120-/spl mu/m-wide 25-/spl mu/m-thick silicon released plate was 0.15 /spl mu/m, which is about ten times smaller than curl of the identical design as a thin-film CMOS microstructure. The z-axis DRIE accelerometer structure is 0.4 mm by 0.5 mm in size and has a 25-/spl mu/m-thick single-crystal silicon proof mass. The measured noise floor is 1 mG//spl radic/Hz, limited by electronic noise. A vertical electrostatic spring hardening effect was theoretically predicted and experimentally verified.

Breathing self-localized solitons in the quartic Fermi-Pasta-Ulam chain.

If the fundamental self-localized soliton (SLS) of the Fermi-Pasta-Ulam chain is subjected to a perturbation of the same parity, a breathing behavior in space is observed. The time evolution then is characterized by two different frequencies. We show that the observed breathing behavior can be explained by means of a harmonic model with an effective spring hardening which is generated by the fundamental background SLS. The validity of this harmonic model is verified by means of numerical simulations. Improvements involving a parametric oscillator are mentioned but left to future study. \textcopyright{} 1996 The American Physical Society.