Special-purpose Machines Research Articles

Application of the risk management tool to reduce the failures of spare parts in manufacturing systems

Higher productivity and cost economy in manufacturing are achieved by operating the production machines efficiently with the least downtime. Failure of machine parts is a critical reason for machine downtime and restoration requires spare parts and consumables. Costs of spare parts and downtime reduce the profit margin of the organisation and hence, require management's attention. A case study on the failures of a cutting blade in a tube drawing machine, a special purpose machine intended to draw solder-coated brass coils into radiator tubes, is examined. A Reactive Failure Reduction Model (RFRM) is developed in which one of the Risk Management Techniques (RMTs) is used to analyse the causes of machine parts failure. Based on the analysis, suitable corrective measures are taken to reduce the blade failures. In this research paper, an analysis of the blade failure, the development of the failure reduction model and the results of implementation of the model are presented.

Effect of forming and calibration operations on the final shape of large diameter welded tubes

Large welded tubes are primarily used in oil pipelines and offshore platforms. They are actually produced by the steelmaker industry ILVA-Laminati Piani, Taranto (Italy). The production process is characterised by three phases: (1) forming; (2) welding and (3) calibration. In addition, the first phase is composed by three steps: the forming of the longitudinal border of the blank (C-forming); the air bending of the C-formed blank (U-bending) and the forming inside a circular shaped die of the U-formed blank (O-forming). After the welding phase, the final forming operation (calibration) is performed to correct the tube distortion due to the thermal input using a special purpose machine (expanding machine). In the present work, the calibration phase is investigated using the finite element (FE) method. Both 2D and 3D FE models have been used. The 2D analysis has been aimed to obtain the tube profile after the forming phase (simulation of the C–U–O forming steps); in addition the simulation of the calibration phase has also performed under the hypothesis of plane strain condition, but not accurate results have been obtained. On the contrary, the 3D FE analysis has allowed to accurately investigate the calibration phase; two different numerical models have been used: the first one considering a cylindrical tube (the tube profile obtained by the previous 2D simulation was simply extruded along a straight line); the second one modelling the tube inflections due to residual stress after welding (the real tube section has been extruded along a circular path, according to experimental data). The aim of this search is to investigate stress and strain state in the tube; in particular the action of the expanding machine is simulated and the effect on the tube section end profiles and on the tube lengthwise inflection have been evaluated. The possibility of both obtaining a good circular shape of the tube section and correcting the lengthwise inflection is investigated. The FE model is defined according to data coming from the workshop: the sheet material is X70 steel and initial blank dimensions are 14,000 mm × 3000 mm × 27.5 mm.

Knowledge transfer between users and producers in the accumulation of technological capability

Summary This study reveals that the user industry has a limited role in being a source of technological capability in the case of the machine tool industry in Korea where the user industry is relatively more advanced than other capital goods industries. This study examines the sources of technological capability in terms of migration of workforces and flow of product development knowledge. Although the capital goods sector is generally regarded as being the sector where user‐producer interaction is important, the user industry is not the seed‐bed of technological capability for machine development. Users and producers interact in terms of expressing “needs”, mainly in the form of specifications. As a result of receiving unique specifications from users, the producer learns to react by making specific customised special purpose machines. The user's specification could include information on the imported machine originally used. When confronted with technical problems in developing a new machine, the producer accesses foreign sources of knowledge. This study's finding reveals that users of special purpose machines have a significantly clearer role in providing specifications than do users of general purpose machine tools. Most intensive interactive learning between users and producers in the production process is found in special purpose machine tools. From the empirical findings, policy implications are discussed.

画像処理による印刷・印字の評価技術と専用装置ＡＰＱＳ

Objective evaluation of printed matter was studied briskly early in the 1980's. At a simultaneous period, (Formerly) Kanzaki Paper Co., Ltd. ((Currently) Oji Paper Co., Ltd.) worked on the research of numerical evaluation concerned with printed matter and developed the inspection device of missing dots for photogravure printing. Afterwards we developed the inspection device of offset printed matter, sheet formation, paper dirt and deinking sheet etc. then these accumulated technology achieved the special purpose machine APQS (Automated Print Quality Evaluation System) based on our domestic image processing analysis system “Dot Analyzer DA-6000”. In this report, we introduce details until developing, outline and algorithms concerned with APQS.

Editorial for special issue on pervasive computing

Pervasive (or Ubiquitous) Computing aims to seamlessly integrate computing and communication with our environment so as to make our day-to-day activities the central focus rather than the computing or communication devices per se. Mark Weiser in his 1991 visionary paper "The Computer for 21st Century" laid the foundations of this field. Last decade has seen a steady increase in the momentum for his ideas. This is mainly due to dramatic increase in the availability of personal digital assistants (PDAs), wireless networking solutions, and embedded computing devices. For example, wirelessly connected organizers and smart phones are becoming popular, and digital computing in some form is now an integral part of numerous everyday appliances. This has led to a fundamental shift in the way we perceive computing and computers. Computers are no longer stand alone special purpose machines to be used by experts; rather, they are ubiquitously present in a networked environment to serve myriad needs of everyday life. The change in our perception of computing and computing devices and their ever increasing presence in our everyday life in form of smart spaces is the subject of the field of pervasive computing. The word pervasive means having power to spread throughout. Pervasive Computing is an environment where people interact with various companion, embedded, or invisible computers. It essentially means to enable networked devices to be aware of their surroundings and peers, and to be capable to provide services to and use services from peers effectively.

An overview of pervasive computing

he importance of pervasive computing is rapidlyincreasingwith the current trend toward universal presence of mobile computing, computer networks, and wireless communications ineveryday life. In thelastdecade, there has been a dramatic increase in the use of companion devices and embedded computing devices. For example, wirelessly connectcd organizers and smart phones are becoming popular, and digital computing in some form is now an integral part of numerous evcryday appliances. This has led to a change in thc waywe perceive computing andcomputers. Computers are no longer standalone special-purpose machines to beusedbyexperts; rather, they arc ubiquitously present in a networked environment to scrve myriad needs of everyday life. The change in our perception of computing and computing devices, and their ever increasing presence in our everyday life is the subject of the new ficld known as pervasive computing. The word pervasive

Open Controller Architecture – Past, Present and Future

Open Control Systems are the key enabler for the realization of modular and re-configurable manufacturing systems. The large number of special purpose machines and the high level of automation have led to an increasing importance of open control systems based on vendor neutral standards. This paper gives an overview on the past, present and future of Open Controller Architecture. After reflecting on the different criteria, categories and characteristics of open controllers in general, the CNC products in the market are evaluated and an overview on the world-wide research activities in Europe, North America and Japan is given. Subsequently the efforts to harmonize the different results are described in order to establish a common world-wide standard in the future. Due to the “mix-and-match” nature of open controllers concentrated attention must be paid to testing mechanisms in the form of conformance and interoperability tests.

Tool capacity planning for semiconductor fabrication facilities under demand uncertainty

This research is motivated by issues faced by a large manufacturer of semiconductor devices. Semiconductor manufacturing companies allocate millions of dollars every year for new types of machine tools for their facilities. Typically these are special purpose machine tools which are made to order. The rate of change in products and technology makes it difficult for manufacturers to have a good estimate of future tool requirements. Further, manufacturers experience a long lead time while procuring these tools. In this paper, we model the tool capacity planning problem under uncertainty in demand. The number of tools required in a facility is sufficiently large (nearly hundred or more tools) to make it nearly impossible to obtain efficient exact algorithms. We provide heuristics to find efficient tool procurement plans and test their quality using lower bounds on the formulation.

High speed servo control of multi-axis machine tools

Advances in high-speed machining technology, including those in spindle speeds and cutters, are out-pacing advances in the servo control performance of machine tools. To close this gap, new machine tools and improved controls must be developed. Improvements to machine tools under development include special-purpose machine tools, the use of advanced materials, the replacement of ball screws and ways with linear motors and roller guides, and the use of parallel link actuators. This paper focuses on the control issues that will become increasingly important as these high-speed machining and high-speed machine tool advances are realized. The main issues in high-speed servo control are feed rate planning, and servo loop control laws. A method is developed in this paper which takes advantage of the full performance envelope of each axis in an arbitrary path. This near-complete usage of the servo capabilities of a machine tool results in reduced cycle time or reduced path error. A servo loop control law is then developed that uses the axis performance envelope as well as instantaneous position, velocity, and acceleration information of the target path and machine axis to improve servo performance in the presence of disturbances.

Parallel computing and quantum chromodynamics

The study of Quantum Chromodynamics (QCD) remains one of the most challenging topics in elementary particle physics. The lattice formulation of QCD, in which space–time is treated as a four-dimensional hypercubic grid of points, provides the means for a numerical solution from first principles but makes extreme demands upon computational performance. High Performance Computing (HPC) offers us the tantalising prospect of a verification of QCD through the precise reproduction of the known masses of the strongly interacting particles. It is also leading to the development of a phenomenological tool capable of disentangling strong interaction effects from weak interaction effects in the decays of one kind of quark into another, crucial for determining parameters of the Standard Model of particle physics. The 1980s saw the first attempts to apply parallel architecture computers to lattice QCD. The SIMD and MIMD machines used in these pioneering efforts were the ICL DAP and the Cosmic Cube, respectively. These were followed by the Connection Machine, the Meiko i860 Computing Surface and the Intel Hypercube. The end of the decade witnessed a rise in the development of special purpose dedicated parallel systems, notably the APE machines in Rome, the Columbia machines, the GF-11 system at IBM Research and the QCDPAX project in Tsukuba. The state-of-the-art is represented by the CP–PACS machine at Tsukuba, and QCDSP, the latest Columbia machine. We give a brief pedagogic review of lattice QCD, outline the computational methodology used and discuss the sources of systematic error that arise in numerical calculations. We outline some of the early calculations and discuss parallel architectures and their application to QCD, giving examples of both commercial and special purpose machines. After a short section on recent developments, we describe state-of-the-art machines and conclude with the prospects for the future.

Implementing jalapeño in Java

Jalapeño is a virtual machine for Java™ servers written in Java. A running Java program involves four layers of functionality: the user code, the virtual-machine, the operating system, and the hardware. By drawing the Java / non-Java boundary below the virtual machine rather than above it, Jalapeño reduces the boundary-crossing overhead and opens up more opportunities for optimization. To get Jalapeño started, a boot image of a working Jalapeño virtual machine is concocted and written to a file. Later, this file can be loaded into memory and executed. Because the boot image consists entirely of Java objects, it can be concocted by a Java program that runs in any JVM. This program uses reflection to convert the boot image into Jalapeño's object format. A special MAGIC class allows unsafe casts and direct access to the hardware. Methods of this class are recognized by Jalapeño's three compilers, which ignore their bytecodes and emit special-purpose machine code. User code will not be allowed to call MAGIC methods so Java's integrity is preserved. A small non-Java program is used to start up a boot image and as an interface to the operating system. Java's programming features — object orientation, type safety, automatic memory management — greatly facilitated development of Jalapeño. However, we also discovered some of the language's limitations.

Measuring the kinematic accuracy of worm gears

A special-purpose machine has been designed and installed to measure the kinematic accuracy of precision worm gears. The primary measurement is the transmission error (TE) between the worm and wheel, and several measuring methods were considered. The chosen method uses optical gratings and a digital system to process the signals, which has particular advantages for this application. This method then makes it a straightforward step also to measure pitch errors of both the worm and the wheel, and lead errors of the worm. A novel method of measuring backlash very accurately is also described.

Software Systems for Scalable Computers

After a long period of intense research conducted mainly in academia and supported by government agencies, parallel processing has moved to industry and is deriving the bulk of its support from the commercial world. Such a move has brought with it a change of emphasis from record-breaking performance to price-performance ratios and sustained speed of application program execution. The current parallel architectures are fast and economically sound. As a result, there is a strong trend towards widening the application base of parallel processing both in terms of hardware and software. At the same time, quickly developing technology fundamentally changes balances between cost of computing, communication and programming, and new balances often lead to new approaches. On the hardware side, the prevailing tendency is to use off-the-shelf commercially available components (processors and interconnection switches) that benefit from the rapid pace of technological advancement fueled by Moore’s Law. The other tendency is the convergence of different architectural approaches as the successful ones spread to new systems. Workstations interconnected by fast networks approach the performance of special-purpose parallel machines. Shared memory machines with multilevel caches and sophisticated prefetching strategies execute programs with efficiency similar to distributed memory machines. At the hardware level, the essential aspect of a quickly changing landscape is the difference in growth of network bandwidth, processor speed and memory access times, which are listed in the descending order of their speed of improvement. All-optical networks and interconnects are changing the balance on the networking side. Throughput now tends to be limited by processor speed and software overheads rather than by network bandwidth, as was the case in the past. On the one hand, the latency of networks is fundamentally limited by the speed of light and the distance that the transferred data need to travel. In addition, processor speed is growing faster than memory access time, where the technological advances are used to increase the memory chip capacity rather than its speed. The resulting use of buffering to mask the speed differences has led to the multimemory hierarchy in which registers, primary cache, secondary cache and main memory are typical layers with progressively lower speed but larger capacity. One result of these trends is the growing importance of data locality for the performance of computer systems, where the architectural details dictate the structure of the most efficient object code. However, improvements in hardware speed are happening faster than advances in programming efficiency, causing programmer time to become more expensive relative to the cost of hardware. To expect a programmer to find the optimum run-time structure would be contrary to this trend. As a result, the programming trends are towards portability and reuse of software, which require abstraction from the architectural details of the computer. Hence, compilers and run-time systems must be responsible for tuning the portable software for a particular architecture, and we find that research on automatic optimization of data locality both at compile and run time has been growing in importance. The increasing complexity of interactions between processor, memory hierarchy and network in parallel systems must be encapsulated in a proper abstract model capable of providing a universal representation of parallel algorithms. The widening base of the users relies on standardization of parallel programming tools. Parallel programmers face a daunting challenge, especially with increasingly large and complex appli-

ライフサイクルにおけるメンテナンス 専用工作機械の保全性設計技術

ライフサイクルにおけるメンテナンス 専用工作機械の保全性設計技術

Operating system support for parallel computation

Parallel systems are not necessarily special-purpose machines. At present, most departmental servers already resort to shared memory multiprocessing as a means to increase performance, while a network of workstations can also be regarded as a distributed memory parallel system. This paper examines the support offered by the operating system to exploit such parallelism. After discussing the design of multi-threaded programs in a Unix environment, a comparison is made with their distributed counterparts. Some performance figures obtained on a SparcCenter 2000 multiprocessor. on a network of workstations and on a transputer-based system are presented.

BEE: a special-purpose machine for hardware description languages

The goal of designing a special-purpose computer is to offer a highly efficient computer-aided environment for circuit simulation using hardware description languages. The suggestion is to have a machine that supports bitstring operations. A bitstring comprises a sequence of bits and must have at least one bit, and is found to be the predominant operation in hardware description languages, yet not a common operation in Pascal-like languages. A special-purpose machine is proposed and its hardware architecture reflects the characteristics of a hardware description language. The main part of this paper deals with the design concepts of the hardware machine, which is derived directly from the run-time requirements of hardware description programs. We start by examining examples of these programs and their operators, then identifying areas which can be improved through the use of hardware. Next, we present the architecture of the machine and bitstring operators that are supported. The instruction format is also presented and some comparisons are made to the reduced instruction set computers. Finally, we study the related works that have been conducted elsewhere.

NONLINEAR PHENOMENA IN CIRCULAR PARTICLE ACCELERATORS II: BEAM-BEAM INTERACTION

We calculate the Poincaré map for the equation of horizontal transverse motion of a test particle in an accelerator under the action of generic nonlinear forces. We particularize to beam-beam type interactions and we study the dynamics of the map. Beam instabilities due to beam-beam interaction are caused by chaotic behavior and not by amplitude growth, as is the case of other nonlinearities due to special purpose machine magnets. There exists a closed region in phase space where the motion is chaotic, even if the central design orbit is unstable. For large amplitudes in phase space the motion is regular and no chaotic behavior or amplitude growth exists. The beam-beam tune as a function of the beam position x is calculated and predictions agree with the numerical values within the maximum relative error of 10%, for beam positions |x| ≤ σ, where σ is the r.m.s. size of the beam. When beams cross at high distances the variation in the tune due to beam-beam effect disappears and the tune value approaches the betatron tune.

AN INTRODUCTION TO AN HISTORIC COMPUTER DOCUMENT THE 1946 PENDERGASS REPORT CRYPTANALYSIS AND THE DIGITAL COMPUTER

In 1946 James T. Pendergrass of the American Navy's code-breaking agency, OP20G, attended the University of Pennsylvania's seminar on electronic computers. That experience convinced him that the navy should turn from the many special-purpose crypt-analytic machines it was building and develop a general-purpose electronic computer. His argument was persuasive and the navy went on to sponsor the Atlas computer. Built by Engineering Research Associates and delivered to the navy in 1950, Atlas became one of the first modern computers in operation. Pendergrass' 1946 report was classified top-secret for decades because it showed how the most significant problems, such as the Ultra-Enigma, could be conquered by a general-purpose computer.

Highly parallel computers: Perspectives

Highly parallel machines represent a technology capable of providing superior performance for technical and commercial computing applications. By utilizing technical advances in microsystems, such as the high performance RISC processors, and high speed interconnect, together with progress in algorithms and compilers, massively parallel systems will exceed the limits of performance being approached by traditional vector supercomputers. Prototypes have been built at IBM Research over the past 10 years to test various approaches: YSE, the Yorktown Simulation Engine, was a high performance, special purpose machine for logic simulation. Today, descendants of this machine are in use at nearly every IBM Development Laboratory; the RP3, Research Parallel Processor Prototype, was an innovative shared-memory multi-processor of the multiple instruction multiple data (MIMD) type; GF11, is an enhanced single instruction multiple data (SIMD) machine that currently achieves the highest sustained performance on key applications; and Victor-V256, a distributed memory, fixed-grid interconnect MIMD machine with 256 processors. In this paper we present our views on the influence of personal computing and telecommunication technologies on parallel processing. We will describe where the architecture of future parallel computers is heading and identify several network and hardware design issues which affect parallel machine implementations. We will also describe some of the parallel machines recently built at the IBM T. J. Watson Research Center, and conclude by projecting the evolving use of parallel computing and the likely route parallel computing will take into the 21st century.

Cellular automata model for the diffusion equation

We consider a new cellular automata rule for a synchronous random walk on a two-dimensional square lattice, subject to an exclusion principle. It is found that the macroscopic behavior of our model obeys the telegraphists's equation, with an adjustable diffusion constant. By construction, the dynamics of our model is exactly described by a linear discrete Boltzmann equation which is solved analytically for some boundary conditions. Consequently, the connection between the microscopic and the macroscopic descriptions is obtained exactly and the continuous limit studied rigorously. The typical system size for which a true diffusive behavior is observed may be deduced as a function of the parameters entering into the rule. It is shown that a suitable choice of these parameters allows us to consider quite small systems. In particular, our cellular automata model can simulate the Laplace equation to a precision of the order (λ/L)6, whereL is the size of the system andλ the lattice spacing. Implementation of this algorithm on special-purpose machines leads to the fastest way to simulate diffusion on a lattice.