Space Vector Based PWM Research Articles

REALIZATION OF A THREE-LEVEL NEUTRAL POINT CLAMPED INVERTER USING A NOVEL REGION SELECTION APPROACH OF BUS CLAMPING PWM FOR ELECTRIC VEHICLE APPLICATION

This article examines a space vector-based bus clamping control approach for an induction motor driven by a three-level inverter for use in electric vehicles. The suggested controller incorporates a new region identification methodology by combining a basic v/f control with a bus clamping mechanism. In terms of power quality, torque ripple, and capacitor voltage balancing, a comparison to the usual SVPWM approach is made. Previously, lesser attention is paid to space vector-based PWM using a region selection methodology. This strategy is centered upon some algebraic equations. The surprising thing about this sector is that it is identical to all the others. As a result, computation complexity is reduced. This technique applies to any number of levels. The suggested controller's effectiveness is evaluated using the MATLAB/Simulink environment. Transient and steady-state analyses are used to evaluate the entire system's performance. Additionally, the neutral point balance of the 3L NPC inverter is achieved using appropriate switching sequences.

Selective Lower Order Harmonic Elimination in DC-AC Converter Using Space Vector Approach

A novel space vector-based approach is introduced in this brief to selectively eliminate the lower order harmonics from the DC-AC converter output waveform by making use of double switching clamping sequences. This technique uses a volt-second balance for control of fundamental voltage while using the dwell time rearrangement of the active vector in a sub-cycle to obtain the elimination of fifth or seventh harmonics. Further, the closed-form expression of the dwell time-division coefficient (DTDC) for the active vector dwell time division rearrangement is expressed. The proposed PWM technique is compared with other space vector-based PWM techniques in terms of voltage weighted total harmonic distortion, switching power loss, and lower order harmonic magnitudes. Further, the experimental results are presented to show the effectiveness of the proposed PWM techniques in terms of harmonic elimination.

Novel space vector-based PWM strategy with minimal circulating current and line-current ripple for two parallel interleaved inverters

Existing PWM methods suffer from a tradeoff between zero-sequence circulating current (ZSCC) and line-current ripple, which are two major concerns of two parallel interleaved two-level (2L) voltage-source converters (VSCs). Thus, this paper introduces a novel space vector-based PWM strategy to reduce both line-current ripple and ZSCC. Given the redundancy of the vector combination of two parallel interleaved converters, this paper proposes eight optimal vector sequences, which simultaneously optimizes the ZSCC and the line-current ripple. Then, a carrier-based scheme is applied to yield optimal vector sequences, which simplifies the implementation procedure. Furthermore, this paper quantitatively compares both the ZSCC and the line-current ripple of the proposed method to those of existing PWM schemes. This comparison confirms that the proposed method is superior to existing PWM schemes in terms of current ripple and ZSCC. Finally, experimental results further verify the theoretical analysis and the effectiveness of the proposed strategy.

Modeling and Design of Cascaded h-bridge type multi-level Inverters up to Thirty-one level for the Reduction and Performance Improvement

Multilevel inverter (MLI) becomes more popular in high voltage DC (HVDC) applications, power electronic converters and drives. This paper describes the simulation of single phase multilevel cascaded H-bridge inverter. Simulation of three level, five level, thirteen level, fifteen, twenty-one, thirty-one level inverters are done in MATLAB/ Simulink. The switching schemes, and topologies are discussed in detail here up to thirty-one levels. This paper discusses the voltage level to achieve sinusoidal waveform & compare different voltage level by increasing the level through simulation. The closed loop space-vector based pulse width modulation technique is adopted for effective controlling and lower harmonic voltage conversion. The comparative results are presented for multilevel inverter up-to thirty-one level which shows the total harmonic distortion (THD) is decreased as the number of voltage level rises.

A New Configuration of Three-Level ZSI Using Transistor Clamped Topology

In this paper, a three-level ZSI (impedance source inverter) based on transistor clamped theory is proposed. It uses the least number of switch counts and associated gate circuitry among all existing topologies of three-level ZSI without any performance degradation. The existing three-level ZSI topologies require three power switches to be turned ON for upper-lower shoot-through (ULST), and four power switches to be turned ON for full dc-link shoot-through (FST). However, with the proposed configuration, upper–lower shoot-through (ULST) and full dc-link shoot-through (FST) is inserted by turning ON only two power semiconductors. A comparison between diode clamped, transistor clamped, and t-type is presented. The proposed topology can realize any of the existing sine-triangle- or space vector-based PWM (pulse width modulation) schemes, and all existing configurations of three-level ZSI can merge into the proposed inverter configuration.

An Efficient Digital Space Vector PWM Module for 3-φ Voltage Source Inverter (VSI) on FPGA

The realization of digital control circuitry based PWM strategies provides many advantages. It includes better prototyping, higher switching frequency, simple hardware, and flexibility by overcoming the limitations of analog control strategies. In this article, The Digital space vector-based Pulse width Modulation ((DSV-PWM) is designed. The DSV-PWM Module includes, mainly, Xdq reference frame, Sector generation, Square root, switching time generation, Carry-save adder (CSA), and PWM Generation module. These modules are designed using simple logical operations, and combinational circuits to improve the DSV-PWM performance. The DSV-PWM Module is synthesized and implemented on a cost-effective Artix-7 FPGA device. The present work utilizes a < 1% chip area, operates at 597.83 MHz of maximum frequency, and utilizes 110mW of total power on FPGA Device. The DSV-PWM module is also compared with the existing SV-PWM approach with better improvement in hardware constraints like chip area, operating frequency, and dynamic power (mW).

Effect of center voltage vectors (CVVs) of three-level space plane on the performance of dual inverter fed open end winding induction motor drive

Dual inverter fed open end winding induction motor (IM) drive offers many advantages over other multilevel inverter fed IM drives. Pulse width modulation (PWM) techniques are employed for the control of output voltage and frequency. Space vector base PWM techniques are popular among all the PWM techniques. A simplified space vector PWM method with simple and small look-up table approach is presented for dual inverter configuration. Moreover the proposed space vector based PWM technique provides freedom in selecting the center voltage vector (CVV) by which different PWM techniques will be derived. The implementation of all these PWM techniques is generalized by using a constant a <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">o</sub> . The derived PWM techniques show superior performance in reducing the zero sequence voltage (ZSV) by maintaining the same quality of output voltage. The performance of all these PWM techniques are evaluated theoretically and verified in real time through dSPACE 1104 control board.

Modified SVPWM Algorithm for Three Level VSI With Synchronized and Symmetrical Waveforms

To generate the required reference vector than triangle comparison based PWM techniques for three-level inverters the space vector based PWM (SVPWM) strategies contain broader choice of switching sequences. This space vector based PWM technique involves in various steps. These steps are computationally exhaustive. The SVPWM has been used in three phase inverter control system. The center-aligned PWM is the most effective way for the Microprocessor Control Unit implementation of the SVPWM, because it can easily generate the center aligned PWM of the multilevel inverters for generation of the signal of space vector pulse width modulation (SVPWM), this concept brings out the method. The inverter leg switching times are generated by this algorithm and middle vector switching times are centered in a sampled interval. The proposed algorithm does not require any sector identification. And it reduces the computational time as a result. The adjacent voltage space vectors are forming the small triangles it is called sectors. Multilevel converters can meet the increasing demand of power ratings and power quality associated with reduced harmonic distortion and lower electromagnetic interference. Furthermore to optimize switching waveforms, space vector pulse-width modulation algorithms offer great flexibility among them. Finally the results are verified through MATLAB/SIMULINK

Space-vector Based Equal Switching Strategy for Three-level Open-end Winding Induction Motor Drive

This paper proposes a new space-vector based pulse width modulation strategy for a three-level openend winding induction motor drive. The proposed method incorporates both the clamping and switching duties of the inverters within every 60o span of the rotation of the reference space vector.The proposed scheme neither requires sector identification nor lookup tables for the generation of the gating pulses. The switching pattern adopted in the present work ensures equal clamping duty and switching duty for both the inverters which are electrically isolated from each other to suppress the zero sequence currents. The switching strategy ensures the usage of all the clamping states thus making the drive system possible for maximum utilization of the switching resources. The proposed strategy is simulated using MATLAB/Simulink and experimentally validated using dSPACE.

A New Alternate Fixed-Bias Inverter SVPWM Scheme for Open-end Winding Induction Motor Drive

This paper proposes a new space-vector based Pulse Width Modulation (PWM) scheme for an open-end winding induction motor drive. This PWM scheme requires two isolated power supplies and uses instantaneous phase reference voltages. The circuit configuration requires two isolated power supplies for the dual inverter fed open end winding induction motor drive. By exploiting the rich switching redundancy that is offered by the circuit configuration, all the active states are used in clamping the inverters. The proposed scheme is simulated using MATLAB/Simulink platform and the simulated results are validated using dSPACE experimentation

A Nearly Constant Switching Frequency Current Error Space Vector Based Hysteresis Controller for an IM Drive with 12-Sided Polygonal Voltage Space Vectors

In this paper, a current error space vector (CESV) based hysteresis controller for a 12-sided polygonal voltage space vector inverter fed induction motor (IM) drive is proposed, for the first time. An open-end winding configuration is used for the induction motor. The proposed controller uses parabolic boundary with generalized vector selection logic for all sectors. The drive scheme is first studied with a space vector based PWM (SVPWM) control and from this the current error space phasor boundary is obtained. This current error space phasor boundary is approximated with four parabolas and then the system is run with space phasor based hysteresis PWM controller by limiting the CESV within the parabolic boundary. The proposed controller has increased modulation range, absence of 5th and 7th order harmonics for the entire modulation range, nearly constant switching frequency, fast dynamic response with smooth transition to the over modulation region and a simple controller implementation.

Space vector‐based three‐level discontinuous pulse‐width modulation algorithm

Discontinuous pulse-width modulation (PWM) techniques result in reduced power loss in voltage source inverters. This study presents the space vector approach to the three-level discontinuous PWM technique. The switching sequences for four basic types of discontinuous PWM and the implementation are presented. An improved discontinuous PWM algorithm is presented for low modulation index region. All these algorithms are verified experimentally and the results are presented. The performance of discontinuous PWM algorithms is compared with that of conventional space vector-based PWM algorithms.

Medium Voltage Drive for Induction Motors Using Multilevel Octadecagonal Voltage Space Vectors

Multilevel inverters with hexagonal and dodecagonal voltage space vector structures have improved harmonic profile compared to two-level inverters. Further improvement in the quality of the waveform is possible using multilevel octadecagonal (18-sided polygon) voltage space vectors. This paper proposes an inverter circuit topology capable of generating multilevel octadecagonal voltage space vectors, by cascading two asymmetric three-level inverters. By the proper selection of dc-link voltages and the resultant switching states for the inverters, voltage space vectors, whose tips lie on three concentric octadecagons, are obtained. The advantages of octadecagonal voltage space vector-based pulsewidth modulation (PWM) techniques are the complete elimination of fifth, seventh, eleventh, and thirteenth harmonics in phase voltages and the extension of linear modulation range. In this paper, a simple PWM timing calculation method is also proposed. Experimental results have been presented in this paper to validate the proposed concept.

Space vector-based analysis of overmodulation in triangle-comparison based PWM for voltage source inverter

The equivalence of triangle-comparison-based pulse width modulation (TCPWM) and space vector based PWM (SVPWM) during linear modulation is well-known. This paper analyses triangle-comparison based PWM techniques (TCPWM) such as sine-triangle PWM (SPWM) and common-mode voltage injection PWM during overmodulation from a space vector point of view. The average voltage vector produced by TCPWM during overmodulation is studied in the stationary (a–b) reference frame. This is compared and contrasted with the average voltage vector corresponding to the well-known standard two-zone algorithm for space vector modulated inverters. It is shown that the two-zone overmodulation algorithm itself can be derived from the variation of average voltage vector with TCPWM. The average voltage vector is further studied in a synchronously revolving (d-q) reference frame. The RMS value of low-order voltage ripple can be estimated, and can be used to compare harmonic distortion due to different PWM methods during overmodulation. The measured values of the total harmonic distortion (THD) in the line currents are presented at various fundamental frequencies. The relative values of measured current THD pertaining to different PWM methods tally with those of analytically evaluated RMS voltage ripple.

Minimization of Switching Losses for Diode Clamped Multilevel Inverter

Multilevel inverters are emerging as a most promising alternative for reducing the harmonics and to achieve highvoltage, high-power capability but switching losses are increased because of increased device count. Many modulation techniques like soft switching techniques, space vector-based PWM techniques or sinusoidal PWM-based techniques were employed to reduce the switching losses. In this paper, a carrier-based closed-loop PWM control technique has been proposed based on insertion of „no switching‟ zone within each positive and negative half cycle of fundamental wave to reduce the switching losses. This method effectively reduces the switching losses of three-level inverter as it does not require any complex mathematical expressions involved in space vector based technique. Moreover, THD is found within 5% for a switching frequency of 5 kHz with proposed technique over conventional SPWM technique. Simulation results are presented to validate the proposed technique. Comparisons are made between switching losses of conventional and proposed control technique of three level diode clamped inverter.

Fractal-based low computation space phasor generation scheme for a four-level inverter using an open-end winding induction motor

In this study, a space vector-based pulse width modulation scheme for an inverter with even number of levels is proposed. An approach based on fractal theory which utilises the self-similarity of the triangular sectors is employed in the present work, to find the sector and the inverter switching vectors. The space vector locations and associated computations are performed in a 60° coordinate system. Representation in a 60° framework avoids fractional arithmetic, thereby reducing computational complexity compared with the methods based on a Cartesian coordinate system. The duration of the switching vectors is determined after mapping the instantaneous reference space vector to an equivalent two-level inverter. The scheme is experimentally verified by using a four-level inverter configuration. four-level inversion is achieved with a dual inverter fed induction motor in the open-end winding configuration. The individual inverters are supplied with asymmetric DC link voltages. The switching vectors for the two inverters are automatically generated without using look-up tables. The scheme is implemented and tested with a 2-HP open-end winding induction motor drive.

Space-vector-based hybrid pulse width modulation technique to reduce line current distortion in induction motor drives

Pulse width modulation (PWM) techniques involving different switching sequences are used in space vector-based PWM generation for reducing line current ripple in induction motor drives. This study proposes a hybrid PWM technique employing five switching sequences. The proposed technique is a combination of continuous PWM, discontinuous PWM (DPWM) and advanced bus clamping PWM methods. Performance of the proposed PWM technique is evaluated and compared with those of the existing techniques on a constant volts per hertz induction motor drive. In terms of total harmonic distortion in the line current, the proposed method is shown to be superior to both conventional space vector PWM (CSVPWM) and DPWM over a fundamental frequency range of 32–50 Hz at a given average switching frequency. The reduction in harmonic distortion is about 42% over CSVPWM at the rated speed of the drive.

Reduced switching loss pulse width modulation technique for three-level diode clamped inverter

Multilevel inverters are used to reduce the harmonics and to achieve high-voltage, high-power capability but switching losses are increased because of increased device count. Switching losses can be reduced by either soft switching techniques or by modifying modulation technique employing space vector-based PWM techniques or sinusoidal PWM-based techniques. In this study, a carrier-based closed-loop control technique has been developed to reduce the switching losses based on insertion of `no switching` zone within each half cycle of fundamental wave. It effectively reduces the switching losses of three-level inverter without need of any complex mathematical expressions as involved in space vector-based techniques. An improvement of about 5` in efficiency for a switching frequency of 5`kHz is observed with proposed technique over conventional SPWM technique based on efficiency improvement factor (EIF). Simulation and experimental results are presented to validate the proposed technique.

Effect of Zero-Vector Placement in a Dual-Inverter Fed Open-End Winding Induction Motor Drive With Alternate Sub-Hexagonal Center PWM Switching Scheme

Three-level inversion can be achieved by the cascade connection of two two-level inverters to an open-end winding induction motor. Several space vector based pulsewidth modulation (PWM) control strategies have been proposed for this power circuit configuration in the past. It is known that space vector modulation offers a degree of freedom in its implementation with regard to the distribution of the zero-vector. In this paper, the effect of placement of zero-vector for the implementation of space vector based PWM techniques for a dual-inverter fed open-end winding induction motor drive is reported. Apart from constructing a consistent theoretical frame work, experimental results with continuous and discontinuous PWM are presented in this paper and all the cases are compared.

Space Vector Based Hybrid PWM Techniques for Reduced Current Ripple

This paper investigates certain novel switching sequences involving division of active vector time for space vector based pulsewidth modulation (PWM) generation for a voltage source inverter. This paper proposes two new sequences, and identifies all possible sequences, which result in the same average switching frequency as conventional space vector PWM (CSVPWM) at a given sampling frequency. This paper brings out a method for designing hybrid PWM techniques involving multiple sequences to reduce line current ripple. The three proposed hybrid PWM techniques (three-zone PWM, five-zone PWM and seven zone PWM) employ three, five and seven different sequences, respectively, in every sector. Each sequence is employed in a spatial region within the sector where it results in the lowest rms current ripple over the given sampling period. The proposed techniques lead to a significant reduction in THD over CSVPWM at high line voltages. The five-zone technique results in the lowest THD among real-time techniques with uniform sampling, while the seven-zone technique is the best among real-time techniques with twin sampling rates. The superior harmonic performance of the proposed techniques over CSVPWM and existing bus-clamping PWM techniques is established theoretically as well as experimentally.