Source Port Research Articles

Research on transformer based online condition monitoring method for IPM

Abstract The Intelligent Power Module (IPM) has the integrated packaging, leading to the advantages of convenient use, safety and reliability. However, once it fails, it will cause the whole power supply system to be inoperative, and it is necessary to perform online Condition Monitoring (CM) of the IPM. In this paper, we extract the aging characteristics such as dynamic equivalent resistance, peak-to-peak value, switching frequency, and turn-off time only from the voltage and current of IPM drain–source port, and then propose a non-intrusive online CM method for the IPM based on the transformer neural network (TNN). We analyse the internal aging mechanism of the IPM, the changing law of aging features, and construct multi-dimensional aging fusion features, and then the TNN model is used to monitor early parameters drift of multi-dimensional fusion feature vectors and realize the accurate online prediction of IPM health condition. The experimental analysis results show that the fault prediction accuracy reaches 96%, and can realize the health CM under the condition of noise interference, weak aging features and few external observable points.

Security analysis of the MAP-T IPv6 transition technology

Abstract In this paper, we focus on one of the most prominent IPv6 transition technologies, namely Mapping of Address and Port using Translation (MAP-T), and we give attention to Mapping of Address and Port with Encapsulation (MAP-E) as well. We emphasize the uniqueness of MAP-T and MAP-E, and we discuss the differences between those two technologies, including their topology, functionality, and security vulnerabilities. We apply a threat modeling technique, Spoofing, Tampering, Repudiation, Information Disclosure, Denial of Service, and Elevation of Privilege (STRIDE), to assess potential vulnerabilities in the MAP-T infrastructure. Furthermore, we build a testbed for MAP-T using the open-source software, Jool, and we conduct testing on the translation process capabilities of Jool and its port allocation per subscriber. Finally, we present various attacking scenarios against the main routers of MAP-T, such as IP address spoofing, information disclosure, and source port exhaustion, and we propose mitigation methods for several attacks.

Design and simulation of phased array antenna 5G applications

Modern mobile communication faces challenges due to the limited frequency spectrum, driving the need for antennas that are simple, low-profile, and robust. Microstrip patch antennas and arrays are ideal choices due to their size, cost, and performance advantages. Polarization is crucial, especially in mobile and space communications, where antenna misalignment requires constant reorientation. Rectangular microstrip patch antennas can help mitigate signal loss and multipath effects in such scenarios. Phased array subsystems are becoming essential in next-generation mobile communication for their ability to electronically steer antenna beams without physical movement. Previous methods for rectangular microstrip patch radiation using orthogonal modes with a 90° time-phase difference resulted in poor axial ratio, gain, and return loss. These methods also used complex dual-feed excitation with an external 90° power divider and external phase shifters for beam steering. This paper proposes a simpler approach using a corner trimming technique for radiation and progressive phase excitations at source ports for phased arrays. The design and optimization for 26 GHz operation are achieved using simulation-based modeling software, ANSYS HFSS, on substrates like FR4 epoxy and Rogers RT or Duroid 5880. This paper includes the design and simulation of rectangular microstrip patches and 1x2 and 1x4 linear phased arrays to operate at 26 Ghz.

Research and implementation of an innovative modular non‐isolated step‐down DC‐DC structure with continuous input current based on the Ćuk converter

SummaryThis study proposes a new design for a non‐isolated buck converter with continuous input current. As required, the integration of additional modules into the existing structure permits a significant decrease in the converter's gain to attain significantly lower values. In order to create the proposed converter, the input voltage connections to the Ćuk converter were changed. In this configuration, the operational state of the Ćuk converter has been changed from buck‐boost to step‐down by connecting the input power source's negative polarity to the inductor's terminal. In addition, the proposed converter benefits from a common ground between the input source and output port. Moreover, it can achieve a significant reduction in gain by increasing the number of series modules. Finally, the compact converter was smoothly incorporated onto a printed circuit board (PCB) and afterward validated by an output power of 80 watts.

A 0.9–1.4-GHz Q-Enhanced CMOS Tunable Bandpass Filter With Constant Fractional Bandwidth and Two Transmission Zeros

A tunable differential <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$Q$</tex-math> </inline-formula> -enhanced bandpass filter covering 0.9–1.4 GHz with constant fractional bandwidth (FBW) is proposed using 40-nm CMOS technology in this letter. The proposed filter is constructed by two resonators which consist of on-chip integrated inductors and varactors. The inductors of the two resonators are placed close to each other to form the mainline magnetic coupling of the filter. Besides the mainline coupling, the source port and load port are connected directly by capacitors, forming the source-to-load coupling. With the proposed structure, two transmission zeros (TZs) can be obtained, which can greatly increase the stopband rejection. Meanwhile, nMOS cross-coupled pairs are used as the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$Q$</tex-math> </inline-formula> -enhanced cells to reduce the insertion loss (IL) and further improve the filter selectivity. A filter prototype based on 40-nm CMOS process is fabricated to validate the proposed structure. The center frequency (CF) of the proposed filter can be tuned from 0.9 to 1.4 GHz while keeping the FBW constant at 8%.

Analysis of the Security Challenges Facing the DS-Lite IPv6 Transition Technology

This paper focuses on one of the most prominent IPv6 transition technologies named DS-Lite (Dual-Stack Lite). The aim was to analyze the security threats to which this technology might be vulnerable. The analysis is based on the STRIDE method, which stands for Spoofing, Tampering, Repudiation, Information Disclosure, and Elevation of Privilege. A testbed was built for the DS-Lite topology using several virtual machines, which were created using CentOS Linux images. The testbed was used to perform several types of attacks against the infrastructure of DS-Lite, especially against the B4 (Basic Bridging Broadband) and the AFTR (Address Family Transition Router) elements, where it was shown that the pool of source ports can be exhausted in 14 s. Eventually, the most common attacks that DS-Lite is susceptible to were summarized, and methods for mitigating such attacks were proposed.

Soft-switching buck/boost full-bridge three-port converter for DC/DC applications

In this paper, a new structure for a DC-DC full-bridge buck/boost LLC three-port converter (TPC) is proposed. The configuration of the converter is designed using the integration of an asymmetric fixed frequency full-bridge LLC network and the buck/boost circuit. The most important advantages of this structure can be summarized in features like the significant reduction of components, high efficiency, soft switching (ZVS and ZCS) and wide gain. In addition, using fixed frequency makes the design of different parts of the converter easier and more efficient. The proposed TPC integrates an input (source) port, a storage port, and an output port that is appropriate for Photovoltaic (PV)/battery hybrid power applications. The power management between ports is handled through two control variables, the duty cycle managed the power flow between the input and storage port, simultaneously the output voltage is adjusted by the phase shift (PS) Control variable. Finally, a laboratory prototype 48 V/8A output is built and experimental findings support the suggested TPC benefits and performance.

Awareness and Impact of GST among Small Business Owners: A Study with Special Reference to Mysuru City, Karnataka

The transferring of the information from the source port to the destination port plays a vital role in our day to day life. The data which is confidential should be send in a platform where the exact data without any loss is received. The insufficient poor quality of data can have a negative impact on real time data processing. The data transmission path should be selected in such a way that the entire data should be received for the usage without any loss in the network link. The data should be received with the accuracy and with less delay. In this way a technology called Software Defined Networking (SDN) plays an important role in managing and controlling the various network conditions. In this way, an approach is being designed in this paper where SDN technology is being used to transfer the data with an appropriate path in order to receive the exact data. It is an application based approach so that the patient medical data is being send using SDN technology. Key Words: SDN technology, OpenFlow switch, Dijsktra’s Algorithm, Hyper Text Transfer Protocol

A high-performance energy efficient packet classification design on FPGA

One of the most crucial thing to safeguard the network against malicious activities is security and the network devices must be able to classify packets. The firewall applications benefit greatly from the architecture of the packet classification engine that is given in this research work. A tree-based approach is used to systematically analyze each field in a packet header, leading to a more secure system. The Packet Classification Engine (PCE) is configured to evaluate Ethernet packets based on the source IP address, destination IP address, source port, destination port, and protocol aspects in the packet header. The PCE shows that the typical clock frequency from input to output is 13 clocks per second. The architecture is extremely rapid, reliable, and adaptable and can make good use of the tree based algorithm's advantages. The proposed architecture has achieved high throughput of 538 MPPS with less energy of 10.6 nJ at low latency of 62 ns. The PCE must have a rapid and reliable FIFO buffer to work effectively. A FPGA (Field Programmable Gate Array) device is being utilized to filter Ethernet packets using the proposed PCE.

Novel Feature Extraction Method for Detecting Malicious MQTT Traffic Using Seq2Seq

Owing to their wide application, Internet of Things systems have been the target of malicious attacks. These attacks included DoS, flood, SlowITe, malformed, and brute-force attacks. A dataset that includes these attacks was recently released. However, the attack detection accuracy reported in previous studies has not been satisfactory because the studies used too many features that are not important in detecting malicious message queue telemetry transport (MQTT) traffic. Therefore, this study aims to analyze these attacks. Herein, a novel feature extraction method is proposed that includes the source port index, TCP length, MQTT message type, keep alive, and connection acknowledgment. The attacks were classified using the Seq2Seq model. During the experiment, the accuracy of the proposed method was 99.97%, which is 7.33% higher than that of previously reported methods.

A Novel Dual-Band Waveguide Filter With Multiple Transmission Zeros Based on TE102- and TE103-Modes

In this letter, the authors propose a novel dual-band waveguide filter with multiple transmission zeros (TZs) based on multi-coupled resonators in the rectangular waveguide using TE102- and TE103-modes. The dual-band of the filter is implemented by five oversized resonant cavities working in TE102- and TE103-modes with the central frequencies of the pass-bands close to 30.1 and 38.2 GHz, respectively. This rectangular waveguide filter consists of five resonators, each of which is connected to the source port through the narrow wall of the WR-28 rectangular waveguide, generating multiple TZs in the frequency range 26–40 GHz. To verify the performance of this novel filter, a prototype of it is fabricated and measured, achieving a good agreement between the simulated and measured results.

Deep packet analysis firewall model

Firewall (software or hardware device that monitors traffic into and out of the network). It can be classified as stateless or stateful. The existing firewalls are only concerned with filtering packets based on the information contained in the header part of every packet. The most improved stateful inspection firewalls have a state table enabling the storage of header information such as source address, destination address, port, connection status and protocol. Consequently, existing firewalls can be compared to only reading the book tittle and foregoing other essential activities such as evaluating the content of the book. The proposed Deep packet analysis firewall model, not only evaluated the header content of a packet but also open and examines the content in a packet in order to detect and block any threats. In addition, the proposed model will be analyzing the actual content of the traffic that is flowing through packet as opposed to existing firewall which only focuses on analyzing the header content. The model will also locate, detect, categorize, block, or reroute packets having certain data payload and specific codes that are not located, detected, categorized, blocked or redirected by existing firewall. Therefore, deep packet analysis firewall model is a feasible approach to overcome challenges faced in cyberspace today. The proposed Deep packet analysis firewall model will use mixed research method. Quantitative method will include obtaining data from the peer reviewed academic articles in the area of study. Quantitative method will also entail using a simulation by feeding quantitative data into the model to produce quantitative results. Finally, qualitative method will include conducting interviews and use of questionnaires

E-minBatch GraphSAGE: An Industrial Internet Attack Detection Model

The Industrial Internet has grown rapidly in recent years, and attacks against the Industrial Internet have also increased. When compared with the traditional Internet, the industrial Internet has a more complex network structure, and the traditional graph neural network attack behavior detection model cannot well adapt to the complex network environment. To make the model better adapt to the complex network environment, this paper proposes the E-minBatch GraphSAG model. First, the application layer source port and source IP address is used as source nodes, the application layer target port and target IP address are used as target nodes, and the remaining traffic information is used as edge information to complete the construction of the graph structure data, and then the constructed graph structure data is presampled to select the edge information that needs to be aggregated next, followed by using the AGG aggregation function to aggregate the information in the domain generated by the presampling process. Finally, the information of two adjacent nodes is aggregated as edge information to classify the edges. Increase the number of IP addresses in the UNSW-NB15 dataset, and then use it for model training and testing. The experimental results show that the accuracy of the model reaches 99.49% in a relatively complex network environment. In this paper, the E-minBatch GraphSAG model is presented in an attempt to solve the problem of attack detection in the complex industrial Internet environment.

A 57-GHz CMOS Reflection Amplifier in 90-nm CMOS

A reflection amplifier is designed using 90-nm bulk CMOS technology for applications in the 60-GHz frequency band. Different from the conventional configurations, a proposed capacitive transmission line at the transistor source port results in negative input resistance and return gain. The return gain is further enhanced by adding an inductor at the drain port. The fabricated die occupies 0.38 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and consumes low dc power of 4.4 mW. The measured data show a peak gain of 8.4 dB at 57 GHz.

An Efficient ML technique to Descry the DDoS Attacks in Real-time Network Traffic and its Feature Analysis

Abstract: In this modern Internet era with the advent of sophisticated technology, criminals can more often easily launch various kinds of cyber-attacks. Distributed Denial-of-service (DDoS) is one such attack that can easily bypass firewall and block the service provided by network resources and server machine. It creates a huge traffic from multiple systems to attack a particular server. This paper presents an efficient Machine Learning (ML) model construction process and its deployment to identify the DDoS attack related network traffic in real time. Fourteen different supervised ML algorithms are applied for training the model over the DDoS attack traffic data. The Light Gradient Boosting Machine (LGBM) Classifier has shown outstanding performance i.e., high accuracy of 98.4% in a very less time of 0.4 sec for training among others and expressed equally better performance when analyzed for other metrics such as AUC, Recall, Precision, F1-score, Kappa and MCC. This efficient classifier is further improvised by tuning its hyper parameters resulted in 98.7% accuracy and tested on 30% of unseen data resulted with 98.3% accuracy. When it is tested with real-time network traffic, exhibited 97.6% accuracy. The results show that LGBM Classifier achieves the highest accuracy. In this paper, it is also analyzed that source port is the important feature contributing mainly to the enhanced LGBM classifier accuracy. Keywords: Cyber Attacks, DDoS, Attack Detection, Machine Learning, Classification

On‐chip miniaturized bandpass filter using gallium arsenide‐based integrated passive device technology

AbstractThe paper proposes a miniaturized bandpass filter (BPF) using gallium arsenide (GaAs)‐based integrated passive device (IPD) technology. The proposed filter is evolved from traditional third order BPF, and it achieves a wide operation frequency band covering three 5G sub‐bands including 3.4–3.5 GHz, 3.5–3.6 GHz, and 4.8–4.9 GHz. The performance of out‐of‐band rejection is improved by introducing three transmission zeros (TZs). As known, adding cross coupling and LC resonator are the general methods to improve out‐of‐band rejection. Therefore, the first TZ at 5.85 GHz is obtained at the upper sideband by adding a capacitive coupling between the source port and resonator 2, which is a cross‐coupling mode. According to the coupling matrix, the value of the added capacitance can be calculated and optimized. Another TZ at 2.36 GHz is occurred at the left side of passband as a serial LC resonator is connected in parallel with filter near the input port. The third TZ at 7.74 GHz is generated at the upper sideband due to a serial LC resonator connected in parallel with the load terminal of the filter. The values of components in LC resonators can be calculated, too. Finally, the whole filter is optimized in full‐wave electromagnetic simulation software HFSS. The proposed filter is fabricated and measured, and the results show that it has a wide −10 dB frequency band from 3.3 GHz to 4.9 GHz and a maximum insertion loss of 2.5 dB. In addition, it has a good frequency selectivity with a rectangular coefficient of 1.67 and out‐of‐band suppression higher than 20 dB in a wide stopband. The filter adopts compact placement and has a relative miniaturized electrical size of 0.298 , which is about 55% smaller than recently reported one.

METHODOLOGY FOR THE FORMATION OF INFORMATION SYSTEMS FALSE NETWORK TRAFFIC FOR PROTECTION AGAINST NETWORK RECONNAISSANCE

Simulation of false network traffic in order to protect the structural and functional characteristics of information systems is a difficult task in view of the self-similarity of its statistical properties in IP networks, not only in the current moment, but also retrospectively. A Hurst index based algorithm for assessing the degree of self-similarity of network traffic of information systems has been proposed. The connection between the fractal dimension of the attractor of the model of information system functioning and the Hurst index is shown. A technique has been developed to substantiate the characteristics of false network traffic to simulate the functioning of information systems in the process of reconfiguration of their structural and functional characteristics caused by an intruder conducting network reconnaissance. The methodology allows to solve the problem of improving the protection of information systems from network reconnaissance by providing the maximum likelihood of false network traffic by pseudophase reconstruction of the dynamic system attractor, approximating the time series of information traffic of the protected object. The approaches to the description of the network traffic of the information system are considered, the parameters determining the network interaction between the two nodes of the data transmission network are selected as follows: source IP-address, source port, destination IP-address, destination port, protocol, packet size, duration of connection. The process of functioning of information system in different situations is formalized and the dependences allowing to synthesize parameters of false network traffic, statistically similar to the reference ones are received.

Predicting Attack Pattern via Machine Learning by Exploiting Stateful Firewall as Virtual Network Function in an SDN Network.

Decoupled data and control planes in Software Defined Networks (SDN) allow them to handle an increasing number of threats by limiting harmful network links at the switching stage. As storage, high-end servers, and network devices, Network Function Virtualization (NFV) is designed to replace purpose-built network elements with VNFs (Virtualized Network Functions). A Software Defined Network Function Virtualization (SDNFV) network is designed in this paper to boost network performance. Stateful firewall services are deployed as VNFs in the SDN network in this article to offer security and boost network scalability. The SDN controller’s role is to develop a set of guidelines and rules to avoid hazardous network connectivity. Intruder assaults that employ numerous socket addresses cannot be adequately protected by these strategies. Machine learning algorithms are trained using traditional network threat intelligence data to identify potentially malicious linkages and probable attack targets. Based on conventional network data (DT), Bayesian Network (BayesNet), Naive-Bayes, C4.5, and Decision Table (DT) algorithms are used to predict the target host that will be attacked. The experimental results shows that the Bayesian Network algorithm achieved an average prediction accuracy of 92.87%, Native–Bayes Algorithm achieved an average prediction accuracy of 87.81%, C4.5 Algorithm achieved an average prediction accuracy of 84.92%, and the Decision Tree algorithm achieved an average prediction accuracy of 83.18%. There were 451 k login attempts from 178 different countries, with over 70 k source IP addresses and 40 k source port addresses recorded in a large dataset from nine honeypot servers.

IP Packaging Filtering in Computer Networks Using Artificial Intelligence in the Regulatory Authority of Electronic and Communications Kosovo

The security of our data is one of the most important challenges, and it is one of the things we must be careful about what we display on the Internet. For the security of this data, computer and cyber networking experts use different methods to prevent these attacks, prevention is done by Firewall techniques, and then by Router where both of these cases are quite popular nowadays today, however, another innovation is that filtering can also be done through Artificial Intelligence. In this paper, research has been done on the application of Artificial Intelligence methods such as those of deep learning on IP packages through Artificial Intelligence where specifically the method of Support Vector Machine with the training of a model through a simulated input corpus, using MATLAB software. From the results of the research by Artificial Intelligence, the source address, destination address, port number, protocol and package size were used as filters. All the practical work was done in over 350 different IP addresses, where 175 IPs were used for algorithm training, as well as 175 IPs were used for testing by combining them with filtering attributes, where in the end the filtering accuracy gained is quite high (83%).

On the use of principal component analysis in the entropy based detection of denial‐of‐service attacks

AbstractThis paper investigates some possibilities for the use of the principal component analysis (PCA) algorithm in the detection of denial‐of‐service (DoS) attacks. Two simple traffic features that are widely used for the detection of DoS attacks are source and destination ports of packets. In this paper, we show that by using only the principal component of these two features as the input for detection a powerful detector can be built. Shannon entropy formula and two generalized entropy formulas have been used in combination with PCA. The input dataset is generated in an emulation testbed. The type of attack that is investigated is SYN flood.