Soft Real-time Systems Research Articles

Model-based testing of stochastically timed systems

Many systems are inherently stochastic: they interact with unpredictable environments or use randomised algorithms. Classical model-based testing is insufficient for such systems: it only covers functional correctness. In this paper, we present two model-based testing frameworks that additionally cover the stochastic aspects in hard and soft real-time systems. Using the theory of Markov automata and stochastic automata for specifications, test cases, and a formal notion of conformance, they provide clean mechanisms to represent underspecification, randomisation, and stochastic timing. Markov automata provide a simple memoryless model of time, while stochastic automata support arbitrary continuous and discrete probability distributions. We cleanly define the theoretical foundations, outline practical algorithms for statistical conformance checking, and evaluate both frameworks’ capabilities by testing timing aspects of the Bluetooth device discovery protocol. We highlight the trade-off of simple and efficient statistical evaluation for Markov automata versus precise and realistic modelling with stochastic automata.

Task-Level Re-Execution Framework for Improving Fault Tolerance on Symmetry Multiprocessors

Hard real-time systems are employed in military, aeronautics, and astronautics fields where deployed systems are susceptible to software faults that can result in functional errors. Thus, there is a need to use fault-tolerant (FT) real-time scheduling. Among the various fault-tolerant real-time scheduling techniques, re-execution has been applied widely to existing real-time systems owing to its simplicity and applicability. However, re-execution requires multiple executions of every task, and some tasks miss their deadlines owing to the prolonged execution time; therefore, it has been found to be suitable for only soft real-time systems. In this paper, we propose an FT policy that can be incorporated into most (if not all) existing real-time scheduling algorithms on multiprocessor systems, which improves the reliability of the target system without a tradeoff against schedulability. As a case study, we apply the FT policy to existing fixed-priority scheduling and earliest deadline zero-laxity scheduling, and we demonstrate that it enhances reliability without schedulability loss.

A memory-bounded, deterministic and terminating semantics for the synchronous programming language Céu

Abstract Ceu is a synchronous programming language for embedded soft real-time systems. It focuses on control-flow safety features in the presence of shared-memory concurrency and abortion of lines of execution, while enforcing memory-bounded, deterministic, and terminating reactions to the environment. In this work, we present a small-step structural operational semantics for Ceu and prove that reactions have the properties enumerated above: that for a given arbitrary timeline of input events, multiple executions of the same program always react in bounded time and arrive at the same final finite memory state.

A Task Scheduling Model for Multi-CPU and Multi-Hard Disk Drive in Soft Real-time Systems

In recent years, by increasing CPU and I/O devices demands, running multiple tasks simultaneously becomes a crucial issue. This paper presents a new task scheduling algorithm for multi-CPU and mult ...

A memory-bounded, deterministic and terminating semantics for the synchronous programming language Céu

Céu is a synchronous programming language for embedded soft real-time systems. It focuses on control-flow safety features, such as safe shared-memory concurrency and safe abortion of lines of execution, while enforcing memory bounded, deterministic, and terminating reactions to the environment. In this work, we present a small-step structural operational semantics for Céu and a proof that reactions have the properties enumerated above: that for a given arbitrary timeline of input events, multiple executions of the same program always react in bounded time and arrive at the same final finite memory state.

An improved formalization analysis approach to determine schedulability of global multiprocessor scheduling based on symbolic safety analysis and statistical model checking in smartphone systems

Modern smart phones are typically equipped with multicore processors. In this paper, we address the problem of determining schedulability of a real-time periodic taskset with fixed release offsets and possible release jitters on a multicore processor with global Fixed-Priority (FP) or EDF (Earliest Deadline First) scheduling algorithms, using the model-checker UPPAAL for Timed Automata. In addition to yes/no schedulability analysis for hard real-time systems, we also apply statistical model checking to estimate the probability of unschedulability for soft real-time systems, described with two statistical parameters (confidence and accuracy).

Det-LB: A Load Balancing Approach in 802.11 Wireless Networks for Industrial Soft Real-Time Applications

Wireless control systems for industrial automation have been gaining popularity in recent years owing to the low cost of their components and their ease of deployment. Wireless local area network (WLAN) is a good candidate for industrial wireless applications, especially for soft real-time control systems. However, unbalanced traffic loads in areas that are covered by several access points (APs) could cause significant performance degradation, and the problem would be more serious in industrial contexts that have high requirements for timeliness and reliability. In this paper, we propose a deterministic load balancing algorithm (Det-LB) for WLAN, which is based on game theory, mainly intended for soft real-time control systems. The procedure of the proposed algorithm is described and analysed in detail. To validate the goodness of the proposed approach, we compare Det-LB with three other load balancing strategies (RLF, MMF, and DLBA) in a simulation. The results show that Det-LB can achieve better load balancing performance and improve network performance significantly. For instance, in a common scenario in which five APs are deployed, the RLF scheme has terrible performance and cannot be applied to industrial applications at all; Det-LB has 35% and 26% performance improvements over MMF in 500- and 250-byte payload size conditions, respectively, and has a 5% deadline miss performance boost and better packet loss performance compared with DLBA when the APs tend to be overloaded.

The Design and Implementation of the Synchronous Language CÉU

C éU is a synchronous language targeting soft real-time systems. It is inspired by Esterel and has a simple semantics with fine-grain control over program execution. C éU uses an event-triggered notion of time that enables compile-time checks to detect conflicting concurrent statements, resulting in deterministic and concurrency-safe programs. We present the particularities of our design in comparison to Esterel, such as stack-based internal events, concurrency checks, safe integration with C, and first-class timers. We also present two implementation back ends: one aiming for resource efficiency and interoperability with C, and another as a virtual machine that allows remote reprogramming.

Improving System-Level Lifetime Reliability of Multicore Soft Real-Time Systems

This paper studies the problem of maximizing multicore system lifetime reliability, an important design consideration for many real-time embedded systems. Existing work has investigated the problem, but has neglected important failure mechanisms. Furthermore, most existing algorithms are too slow for online use, and thus cannot address runtime workload and environment variations. This paper presents an online framework that maximizes system lifetime reliability through reliability-aware utilization control. It focuses on homogeneous multicore soft real-time systems. It selectively employs a comprehensive reliability estimation tool to deal with a variety of failure mechanisms at the system level. A model-predictive controller adjusts utilization by manipulating core frequencies, thereby reducing temperature, and an online heuristic adjusts the controller sampling window length to decrease the reliability effects of thermal cycling. Experiments with a real quad-core ARM processor and a simulator demonstrate that the proposed approach improves system mean time to failure by 50% on average and 141% in the best case, compared with existing techniques.

EPICS device support for an ATCA CDAQ Board with hot-plug capabilities

The Advanced Telecommunications Computing Architecture (ATCA) standard defines a high performance technical solution that meets the requirements for fast controllers on large-scale physics experiments like ITER. This platform provides high throughput, scalability and features for high availability such as redundancy and intelligent platform management which are essential for steady state experiments.An ATCA Control and Data Acquisition (CDAQ) demonstration system was developed for the ITER Fast Plant System Controller (FPSC) project, which is already available in the ITER Catalog. This system comprises a board with 48 galvanic isolated analog and/or digital channels configurable as input or output with digital signal processing capabilities performed by a Field Programmable Gate Array (FPGA) and an ATCA carrier.The Experimental Physics and Industrial Control System (EPICS) is a set of open source software tools, libraries and applications used worldwide to create distributed soft real-time control systems for scientific instruments. To provide the hardware integration on the EPICS environment, a device support has been developed as a software layer, which is comparable to the abstraction layer provided by the device driver on the Operating Systems.This paper presents the implementation and test of an EPICS Device Support for the ATCA CDAQ Board that comprises templates for easy configuration of the entire system. This solution also allows simultaneous and independent acquisition by each board, providing hot-plug features which support insertion and removal of boards while keeping other modules and the overall system running.Operation with several boards and different versions of Linux operating system was performed and the results are presented.

Design and Implementation of Task Reprocessing on Medium-large Multi-core Architecture

EDF-Based real-time scheduling approach is one of the efficient way of scheduling the recurrent real-time tasks in both soft real-time and hard real-time systems. EDF algorithms entile heavy overhead due to lower scheduling and huge migration. In this paper, an exploratory procedure has been presented for reprocessing of neglected task sets and also examine, whether an improved heuristic set attributed as Enhanced shared CAche Performance (ENCAP) can improve the shared cache performance which processes the task set based on Earliest-Deadline-First (EDF). An Object-Oriented real-time code reusable scheduling components which is designed from the scratch referred as LITMUSRT has been used to test the efficiency and average-case accomplishments where per task utilizations are shortened and overall utilization are not restricted. We also discuss the implementation and experimental evaluation of Task-Repo procedure for co-scheduling task sets, under the utilization of 50-60% (per-task) on small to medium-large multicore LINUX SYSTEM.

A hybrid methodology to detect memory leaks in soft real-time embedded systems software

As embedded software becomes complex and time to production needs to be minimized, early fixing of flaws in a software design is important. Memory leaks are the most important memory-related problems commonly occurring in embedded software development. We propose a novel hybrid automated memory leak detection approach for soft real-time embedded system software. Our approach combines static and dynamic methodologies to overcome their individual limitations. The static phase generates potential memory leak warnings with the help of source code annotation and control flow graphs. The dynamic phase involves simulation of abstracted memory behaviour with data collected in an abstract memory model (AMM). Actual leaks are determined from the potential leak warnings generated in the static phase. The dynamic simulation phase makes our approach faster and enables early phase leak detection. Our approach is platform independent and evaluation shows that it is more accurate than existing tools.

A hybrid methodology to detect memory leaks in soft real-time embedded systems software

As embedded software becomes complex and time to production needs to be minimized, early fixing of flaws in a software design is important. Memory leaks are the most important memory-related problems commonly occurring in embedded software development. We propose a novel hybrid automated memory leak detection approach for soft real-time embedded system software. Our approach combines static and dynamic methodologies to overcome their individual limitations. The static phase generates potential memory leak warnings with the help of source code annotation and control flow graphs. The dynamic phase involves simulation of abstracted memory behaviour with data collected in an abstract memory model (AMM). Actual leaks are determined from the potential leak warnings generated in the static phase. The dynamic simulation phase makes our approach faster and enables early phase leak detection. Our approach is platform independent and evaluation shows that it is more accurate than existing tools.

Supporting Soft Real-Time Sporadic Task Systems on Uniform Heterogeneous Multiprocessors with No Utilization Loss

Uniform heterogeneous multicore architectures are becoming increasingly popular due to their potential of achieving high performance and energy efficiency compared to the homogeneous multicore architectures. In such systems, the real-time scheduling problem becomes more challenging because processors have different speeds. Prior research on uniform heterogeneous multiprocessor real-time scheduling has focused on hard real-time systems, where, significant processing capacity may have to be sacrificed in the worst-case to ensure that all deadlines are met. As meeting hard deadlines is overkill for many soft real-time systems in practice, this paper shows that on soft real-time uniform heterogeneous multiprocessors, bounded response times can be ensured for globally-scheduled sporadic task systems with no utilization loss. A GEDF-based scheduling algorithm, named as GEDF-H, is presented and response time bounds are established under both preemptive and non-preemptive GEDF-H scheduling. Extensive experiments show that the magnitude of the derived response time bound is reasonable, often smaller than four task relative deadlines. To the best of our knowledge, this paper is the first to show that soft real-time sporadic task systems can be supported on uniform heterogeneous multiprocessors without utilization loss under global scheduling, and with reasonable predicted response times.

A GPU-based Soft Real-Time System for Simultaneous EEG Processing and Visualization

EEG processing is generally acknowledged as a computationally very intensive task. The execution of pre-processing steps, frequency domain operations and source localisation algorithms result in long execution times, which prohibit the use of high-resolution EEG brain imaging techniques outside research laboratory settings. We present a novel GPU-based streaming architecture, which has the potential to drastically reduce execution times and, at the same time, provide simultaneous 2D and 3D visualization facilities. The system uses a highly-optimised and re-configurable pipeline of CPU and GPU cores that attempts to exploit the tremendous computing power whenever possible. The system can process live data arriving from an EEG device or data stored in EEG data files. The computer drives a large display wall system consisting of four 46-inch monitors, which provides a 4K-resolution drawing surface for visualising raw EEG data, potential maps and various 3D views of the patient head. Two example brain imaging algorithms, the surface Laplacian and the spherical forward solution are used as an illustration for the effective use of the massively parallel GPU hardware in speeding up computations. The paper describes the architecture of the system, the key design decisions, and the performance optimization steps that were required to achieve sub-millisecond per-sample execution times. The control ow of the system is expressed in a very modular fashion in Java but the performance-critical algorithms are programmed in CUDA and run on the GPU. Relying on the CUDA-OpenGL interoperability bridge, the computing subsystem feeds visualisation results directly into the OpenGL pipeline, eliminating unnecessary GPU-Host data transfers. The system demonstrates that up to three orders of magnitude speedups are achievable compared to MATLAB implementations, and this processing speed can be maintained during simultaneous interactive 3D visualisation of the results.

A Deadline-Constrained 802.11 MAC Protocol With QoS Differentiation for Soft Real-Time Control

As one of the most widely used wireless network technologies, IEEE 802.11 wireless local area networks (WLANs) have found a dramatically increasing number of applications in soft real-time networked control systems (NCSs). To fulfill the real-time requirements in such NCSs, most of the bandwidth of the wireless networks need to be allocated to high-priority data for periodic measurements and control with deadline requirements. However, existing quality of service (QoS)-enabled 802.11 medium access control (MAC) protocols do not consider the deadline requirements explicitly, leading to unpredictable deadline performance of NCS networks. Consequentially, the soft real-time requirements of the periodic traffic may not be satisfied, particularly under congested network conditions. This paper makes two main contributions to address this problem in wireless NCSs. A deadline-constrained MAC protocol with QoS differentiation is presented for IEEE 802.11 soft real-time NCSs. It handles periodic traffic by developing two specific mechanisms, a contention-sensitive backoff mechanism and an intra-traffic-class QoS differentiation mechanism. A theoretical model is established to describe the deadline-constrained MAC protocol and evaluate its performance of throughput, delay, and packet-loss ratio in wireless NCSs. Numerical studies are conducted to validate the accuracy of the theoretical model and to demonstrate the effectiveness of the new MAC protocol.

An Analytical Solution for Probabilistic Guarantees of Reservation Based Soft Real-Time Systems

We show a methodology for the computation of the probability of deadline miss for a periodic real-time task scheduled by a resource reservation algorithm. We propose a modelling technique for the system that reduces the computation of such a probability to that of the steady state probability of an infinite state Discrete Time Markov Chain with a periodic structure. This structure is exploited to develop an efficient numeric solution where different accuracy/computation time trade-offs can be obtained by operating on the granularity of the model. More importantly we offer a closed form conservative bound for the probability of a deadline miss. Our experiments reveal that the bound remains reasonably close to the experimental probability in one real-time application of practical interest. When this bound is used for the optimisation of the overall Quality of Service for a set of tasks sharing the CPU, it produces a good sub-optimal solution in a small amount of time.

A Real-Time Flash Translation Layer for NAND Flash Memory Storage Systems

NAND flash memory is widely used in both hard real-time and soft real-time systems because of its unique properties, such as non-volatility, low power consumption, and fast access time. However, due to the variable garbage collection latency, the response time becomes unpredictable when multiple I/O requests are issued from the file system to flash media. In NAND flash memory storage systems, flash translation layer (FTL) is a typical software module to handle the I/O requests and manage NAND flash memory. Most of existing FTL schemes focus on improving average response time but worst-case response time remains an open problem. This paper proposes a real-time flash translation layer (RFTL) scheme to evenly distribute garbage collection time-cost, so as to guarantee a near optimum worst-case response time. This is achieved by using a new hybrid-level address mapping approach, which can provide guaranteed physical space to serve requests in any time period. Moreover, we propose a distributed garbage collection policy that enables RFTL to reclaim the space and serve the requests simultaneously. We conduct a set of experiments on a real hardware platform. Both the proposed scheme and other representative FTL schemes have been implemented in the hardware evaluation board. Experimental results show that our scheme improves worst-case response time by 41.51 percent and average response time by 88.85 percent.

A proposed priority dynamic quantum time algorithm to enhance varying time quantum round robin algorithm

Management of the processes is an essential task performed by the scheduler in an Operating System OS. One of the important units of the OS is Central Processing Unit CPU, which is scheduling by many algorithms of scheduling. The main purpose of these algorithms is to enhance the system's performance by increasing the utilisation of CPU, increasing the throughput of the system, reducing the turnaround and waiting times and reducing the context switches. Some of the famous scheduling algorithms are First-Come, First-Served, Shortest Job First SJF, Round Robin RR and Priority Scheduling. RR scheduling algorithm is the most suitable choice for time shared system but not for soft real-time systems owing to a large turnaround time, large waiting time and high number of context switches. The choice of the quantum time in RR is the optimal solution for the problem of large turnaround and waiting time with RR. This paper proposes a new algorithm to improve the work of RR by proposing a new algorithm to improve the concept of Improved Round Robin with Varying time Quantum IRRVQ. The proposed algorithm gave results better than IRRVQ in terms of minimising the number of context switches, average waiting time and average turnaround time.

An autonomous observation and control system based on EPICS and RTS2 for Antarctic telescopes

For an unattended telescopes in Antarctic, the remote operation, autonomous observation and control are essential. An EPICS (Experimental Physics and Industrial Control System) and RTS2(Remote Telescope System, 2nd Version) based autonomous observation and control system with remoted operation is introduced in this paper. EPICS is a set of Open Source software tools, libraries and applications developed collaboratively and used worldwide to create distributed soft real-time control systems for scientific instruments while RTS2 is an open source environment for control of a fully autonomous observatory. Using the advantage of EPICS and RTS2 respectively, a combined integrated software framework for autonomous observation and control is established that use RTS2 to fulfill the function of astronomical observation and use EPICS to fulfill the device control of telescope. A command and status interface for EPICS and RTS2 is designed to make the EPICS IOC (Input/Output Controller) components integrate to RTS2 directly. For the specification and requirement of control system of telescope in Antarctic, core components named Executor and Auto-focus for autonomous observation is designed and implemented with remote operation user interface based on Browser-Server mode. The whole system including the telescope is tested in Lijiang Observatory in Yunnan Province for practical observation to complete the autonomous observation and control, including telescope control, camera control, dome control, weather information acquisition with the local and remote operation.