Small Package Size Research Articles

Enabling Resist Processing Technologies for Advanced Packaging

The increasing adoption of advanced wafer-level packaging (WLP) technologies and high density interposer concepts clearly reflect the permanent need for form factor reduction, smaller process geometries and higher-count I/O on ICs. Currently, several strategies are being pursued to achieve these goals. The most promising approaches are summarized under the concept of three-dimensional integrated circuits (3D-IC) and three-dimensional wafer level packaging (3D-WLP) technology. A key component for 3D device integration schemes is the requirement of vertical through-silicon-via (TSV) interconnections that enables electrical through-chip communication through stacks of vertically integrated layers on the wafer scale. Ultimately, the use of TSVs also enables higher performance and smaller package sizes. In order to realize TSV connections, a series of process steps is required such as the thinning and bonding of the wafer to a carrier prior to the formation of through-wafer vias, followed by the passivation and metallization of the vias. Despite the potential benefits associated with the integration of TSVs also significant challenges have to be overcome. One of the greatest challenges for present and even more for upcoming TSV design strategies still remains the processing of photoresist and other functional polymers at and within TSV geometries. To this day, it is still very difficult to achieve a conformal polymer coating in deep cavities, along steep side walls and especially within the extreme aspect ratios of TSV. Mainly this is due to the fact that standard surface coating methods such as spin coating were just not developed to meet the requirements posed by these high aspect ratio microstructures. New and innovative approaches are needed to meet these new challenges. Spray coating is one of the most promising technologies to overcome current barriers. However, even most of the available spray deposition equipment is facing its limits with steadily decreasing via diameters and increasing aspect ratios on the other hand. Successively, the multitude of these challenging technological developments in the 3D-IC and wafer-level packaging area has created the demand for innovative manufacturing approaches, new equipment and related tools. Herein we present our new EVG ®NanoSprayTM coating technology with unique capabilities to overcome the present limits of conformal resist coating over extreme topography. We demonstrate one particularly promising application for conformal polymer coatings; as an annular lining at the interface between the conducting metal filling in the TSV and the silicon wafer. The intrinsic properties of the polymer allow a TSV design solution that is more forgiving on coefficient of thermal expansion (CTE) mismatch-induced stress between the silicon substrate and the interfacing metal. Consequently, this new type of polymer buffered TSV interconnect design promises to significantly reduce thermal stress-induced TSV delamination as one of the dominant failure modes for 3-D interconnects. We further demonstrate the application of EVG ®NanoSprayTM as enabling coating technology for llithographic processing of conformal coated TSVs. The patterning of thin photoresist layers at the bottom of vias and along the steep sidewalls of deep cavities allows for more degrees of freedom in electrical contact formation. The presented EVG ®NanoSprayTM coating technology opens new dimensions in advanced wafer level packaging and provokes reconsidering prevailing limitations in interconnect design.

3차원 적층 패키지를 위한 ISB 본딩 공정의 파라미터에 따른 파괴모드 분석에 관한 연구

3D packaging technology using TSV (Through Silicon Via)has been studied in the recent years to achieve higher performance, lower power consumption and smaller package size because electrical line is shorter electrical resistivity than any other packaging technology. To stack TSV chips vertically, reliable and robust bonding technology is required because mechanical stress and thermal stress cause fracture during the bonding process. Cu pillar/solder <TEX>${\mu}$</TEX>-bump bonding process is usually to interconnect TSV chips vertically although it has weak shape to mechanical stress and thermal stress. In this study, we suggest Insert-Bump (ISB) bonding process newly to stack TSV chips. Through experiments, we tried to find optimal bonding conditions such as bonding temperature and bonding pressure. After ISB bonding, we observed microstructure of bump joint by SEM and then evaluated properties of bump joint by die shear test.

Thermal Analysis of a Face-to-Back Bonded Four-Layer Stacked 3D IC Model

Three dimensional integrated circuits (3D ICs) consisted of stacking and vertically interconnecting are an emerging technology with great potential for improving system performance. 3D integration relies on Through Silicon Via (TSV) interconnection and interlayer bonding between the silicon layers. Due to the advantages of higher device density, lesser signal delay, shorter interconnection length and smaller package size, this technology attracts growing attentions. A number of innovative processes contribute to the realization of 3D IC. These include back grinding, coating, cleaning, etching, wafer thinning, filling of high aspect ratio vias with electroplated copper and interlayer bonding, etc. In this work, finite element models for four-layer stacked TSV-based (Through Silicon Via) 3D IC are established based on the heat distribution of working process caused by heat source in device die, in order to investigate the thermal effects and determine the improvements required. The transient temperature fields of 3D IC structures are obtained. The effects of various geometric parameters and thermal properties on the overall temperature have been analyzed. The result indicates that TSV diameter, pitch, BCB thickness and BEOL conductivity play more important roles to the temperature increment and the maximum temperature of no TSV structures is several times of that of TSV-based structures. The copper provides for an effective heat conduction path, and reduces considerably the overall temperature. It is also shown that the heat path from chip to the bottom surface is the main way for the heat dissipation.

Single-Phase Current Source Induction Heater with Improved Efficiency and Package Size

This paper presents a modified Current Source Parallel Resonant Push-pull Inverter (CSPRPI) for single phase induction heating applications. One of the most important problems associated with current source parallel resonant inverters is achieving ZVS in transient intervals. This paper shows that a CSPRPI with the integral cycle control method has dynamic ZVS. According to this method, it is the Phase Locked Loop (PLL) circuit that tracks the switching frequency. The advantages of this technique are a higher efficiency, a smaller package size and a low EMI in comparison with similar topologies. Additionally, the proposed modification results in a low THD of the ac-line current. It has been measured as less than %2. To show the validity of the proposed method, a laboratory prototype is implemented with an operating frequency of 80 kHz and an output power of 400 W. The experimental results confirm the validity of the proposed single phase induction heating system.

Conceptual Development Using 3D Printing Technologies for 8kV SiC Power Module Package

Post-silicon power devices, SiC or GaN for example, have many advantages over traditional silicon devices, particularly for smaller size and higher thermal densities. Although these devices are in the early stage of development, many applications have been identified, such as hybrid vehicles and the smart grid. For power packaging, there is now a greater challenge of much higher voltage, faster switching speed and much smaller package size (higher density). All of these issues call for newer approaches in power packaging. The microelectronics area has been developing stacked 3D technology along with printed 3D circuit technologies. Of been interested are the 3D printing technologies that can implement complicated structures, such as multilevel interconnects and selective dielectric field enhancements, besides introducing rapid prototyping in the early power stage design cycle. The 3D printing technology, introduced in the late 1980's, is now becoming prevalent. Commercial printers can create high-resolution structures in ceramic, metals (e.g. titanium, copper and aluminum) and polymers. The conceptual design proposed in this paper will incorporate a hybrid approach of traditional structures over-printed with polymers, or more advanced structures over-printed with metal and ceramic. The design focuses on packaging 1 cm × 1 cm SiC Schottky diode, which has a blocking capability of 8kV with a final target at 15kV. Early use of the package, in keeping with rapid prototyping, is to provide a test vehicle for the device, and prove the application of 3D printed material to high voltage power modules. This paper will present the necessity for packaging new SiC devices, review device characteristics, introduce the use of extruded 3D printing materials for a hybrid structure, and use of jetted/extruded layer-by-layer buildup for total, direct structure creation. Characterization of some available dielectric and metal printable materials, and a test methodology for electrical, thermal and mechanical performance will be discussed. An early-stage example will be shown and extrapolated to higher-level conceptual designs.

Stacking of known good rebuilt wafers for high performance memory and SiP

Based on Wire-free Die on Die disruptive technology (WDoD™), high density memory can be manufactured in a small form factor package size. Stacking known good rebuilt wafers allows high yields while integrating high performance devices. Dual die (DD) and Quad die (QD) DDR3 memories exhibit outstanding performance and show the path to highly densified System in Package (SiP) for Medical, Defense and Industrial markets

Conditions for Evolution of Small Adult Body Size in Southern Africa

Discoveries from diverse locales indicate that early Homo was sometimes petite. Small body size among fossil forms is difficult to explain because its existence in modern human populations is not fully understood. The history, ethnography, genetics, and bioarchaeology of KhoeSan peoples of southern Africa are reviewed in the context of their small adult body size. Since the Middle Stone Age, at least some southern African foragers were petite. Throughout the Later Stone Age (LSA; the Holocene), most groups followed a mobile, coastally oriented foraging strategy that relied on small package size foodstuffs. Distinctive skeletal shape and allometry of LSA adult skeletons provide clues about selective factors. Neither dietary insufficiency nor heat dissipation models of selection apply in the LSA context. Energetics and avoidance of serious accidents may be relevant factors. An aspect of life history—the timing of cessation of growth—has been assessed by comparing dental and skeletal development within juven...

Compact acoustic sensor based on air-backed mandrel coiled with optical microfiber

We propose and demonstrate a compact acoustic sensor comprising a 2μm diam, 35mm length optical microfiber coiled around a 3mm diam air-backed mandrel. Acoustic waves induce local pressure variations that change the mandrel diameter and thus the optical path length of the mode propagating in the microfiber. The phase modulation is detected via a single-fiber polarimetric interferometer. The low stiffness and minimum bend radii of microfibers gives rise to extremely small package sizes without compromising acoustic responsivity.

Fabrication and Challenges of Cu-to-Cu Wafer Bonding

The demand for 3D wafer level integration has been increasing significantly. Although many technical challenges of wafer stacking are still remaining, wafer stacking is a key technology for 3D integration due to a high volume manufacturing, smaller package size, low cost, and no need for known good die. Among several new process techniques Cu-to-Cu wafer bonding is the key process to be optimized for the high density and high performance IC manufacturing. In this study two main challenges for Cu-to-Cu wafer bonding were evaluated: misalignment and bond quality of bonded wafers. It is demonstrated that the misalignment in a bonded wafer was mainly due to a physical movement of spacer removal step and the bond quality was significantly dependent on Cu bump dishing and oxide erosion by Cu CMP.

Green and amber foods: The nutritional content of food and beverages registered for sale in New South Wales school canteens with Healthy Kids Association

AbstractAim: The aim of this study was to describe key nutritional characteristics of food and beverage products registered with the product registration scheme of Healthy Kids Association (formerly the New South Wales School Canteen Association).Methods: The nutritional characteristics of Healthy Kids Association's registered products as of October 2009 were examined. Nutrient content data were obtained from product nutrition information panels, for each product within popular product subcategories. The level of key nutrients (including saturated fat, sugar, calcium and fibre) was identified and analysed in relation to the nutrient criteria threshold levels for green and amber food categories. The distribution of nutrients in relation to the food category thresholds was examined.Results: For most product subcategories, the nutrient content of products clustered just below the nutrient criteria thresholds for total energy, saturated fat, sodium and sugar. The nutrient content for the positive nutrients calcium and fibre frequently clustered just above the threshold. In addition, small package sizes were found to be common among food classified as amber.Conclusion: This study illustrates a method for analysing and describing the range and nutrient profile of products registered with a product registration or nutrition signposting scheme. The distribution of key nutrients around criteria thresholds suggests that products are formulated with reference to the nutrient thresholds of the product registration scheme. However, nutrient thresholds may also be achieved through manufacturing smaller portion sizes. The potential of nutrient thresholds as levers to influence the nutritional profile of foods needs further research and industry dialogue.

Single Package Size as a Signal of Quality: Theory and Evidence

This paper presents a theory of quality signaling based on the number and magnitude of package size(s) produced by a manufacturer of consumer-packaged goods. A high-quality type firm forgoes the profit from second-degree price discrimination inherent in selling two package sizes with a quantity discount. When there are many quality-sensitive consumers in the market, a high-type firm can signal its superior quality to such uncertain consumers by producing one size only and, additionally, by reducing the magnitude of its single package size. This increases the opportunity costs of mimicry by the low-quality type firm. In addition, a single, small package size alone signals quality when there are relatively few quality-sensitive consumers. However, package size supplements price as a signal of quality when there are many quality-sensitive consumers in the market. Moreover, producing a single, small package size allows a firm to target quality-sensitive consumers. Finally, this paper presents experimental evidence that reducing the number and magnitude of package size(s) raises consumers’ perception of product quality.

Recovery and distribution of incinerated aluminum packaging waste

A study was performed into relations between physical properties of aluminum packaging waste and the corresponding aluminum scraps in bottom ash from three typical incineration processes. First, Dutch municipal solid waste incineration (MSWI) bottom ash was analyzed for the identifiable beverage can alloy scraps in the +2 mm size ranges using chemical detection and X-ray fluorescence. Second, laboratory-scale pot furnace tests were conducted to investigate the relations between aluminum packaging in base household waste and the corresponding metal recovery rates. The representative packaging wastes include beverage cans, foil containers and thin foils. Third, small samples of aluminum packaging waste were incinerated in a high-temperature oven to determine leading factors influencing metal recovery rates. Packaging properties, combustion conditions, presence of magnesium and some specific contaminants commonly found in household waste were investigated independently in the high-temperature oven. In 2007, the bottom ash (+2 mm fraction) from the AEB MSWI plant was estimated to be enriched by 0.1 wt.% of aluminum beverage cans scrap. Extrapolating from this number, the recovery potential of all eleven MSWI plants in the Netherlands is estimated at 720 ton of aluminum cans scrap. More than 85 wt.% of this estimate would end up in +6 mm size fractions and were amenable for efficient recycling. The pot furnace tests showed that the average recovery rate of metallic aluminum typically decreases from beverage cans (93 wt.%) to foil containers (85 wt.%) to thin foils (77 wt.%). The oven tests showed that in order of decreasing impact the main factors promoting metallic aluminum losses are the packaging type, combustion temperature, residence time and salt contamination. To a lesser degree magnesium as alloying element, smaller packaging size and basic contaminations may also promote losses.

73.4L: Late‐News Paper: Miniature, Highly Efficient, and Low Cost Green Laser Source for Pico‐Projectors

AbstractWe report on progress in development of the low‐cost highly efficient miniature green laser source for consumer electronics applications such as handheld and pocket projectors. The source is based on the monolithic cavity microchip with highly efficient periodically poled MgO‐doped Lithium Niobate as the frequency doubler. This design allows high power output while maintaining small package size. We demonstrate up to 250mW average power output with &gt;13% overall efficiency from the new package with total volume of 0.23cm3. We also demonstrate modulation speed of 2MHz, which, to our knowledge, is the highest, reported for the green microchip laser.

Structural Optimization of Ground Vias for 3D ICs

Nowadays, IC manufacturing meet the challenges of physical limits, through silicon via(TSV) technology has increasingly become the focus of the microelectronics industry due to its shorter wiring route, better signal integrity, larger bandwidth, lower power consumption and smaller packaging size. In this paper, the transmission performance of TSV was analyzed and the impact of ground vias number, diameter and pitch with TSV on TSV transmission performance. A design of experiment (DOE) was established to investigate the impact of different ground vias parameter combinations on the transmission of TSV and the range analysis of the experiment results was executed. Based on the DOE, two regression equations were formed to estimate the electrical performances of TSV. From the two equations, the structure parameters were optimized, the S11 and S21 results of optimization parameter combination reduced 0.4dB and 0.15dB, respectively.

UV Lasers Enable Smart Phones and Other Microelectronics

AbstractThe smaller package sizes and increased functionality of today's smart phones create numerous manufacturing challenges, many of which are now being solved with high performance UV lasers.

Formulation of Microneedles Coated with Influenza Virus-like Particle Vaccine

Mortality due to seasonal and pandemic influenza could be reduced by increasing the speed of influenza vaccine production and distribution. We propose that vaccination can be expedited by (1) immunizing with influenza virus-like particle (VLP) vaccines, which are simpler and faster to manufacture than conventional egg-based inactivated virus vaccines, and (2) administering vaccines using microneedle patches, which should simplify vaccine distribution due to their small package size and possible self-administration. In this study, we coated microneedle patches with influenza VLP vaccine, which was released into skin by dissolution within minutes. Optimizing the coating formulation required balancing factors affecting the coating dose and vaccine antigen stability. Vaccine stability, as measured by an in vitro hemagglutination assay, was increased by formulation with increased concentration of trehalose or other stabilizing carbohydrate compounds and decreased concentration of carboxymethylcellulose (CMC) or other viscosity-enhancing compounds. Coating dose was increased by formulation with increased VLP concentration, increased CMC concentration, and decreased trehalose concentration, as well as increased number of dip coating cycles. Finally, vaccination of mice using microneedles stabilized by trehalose generated strong antibody responses and provided full protection against high-dose lethal challenge infection. In summary, this study provides detailed analysis to guide formulation of microneedle patches coated with influenza VLP vaccine and demonstrates effective vaccination in vivo using this system.

2nd Level Reliability Improvement on WLCSP

Recently the package market is demanding the smaller package size and the lower impedance electrical path with a short interconnection. The wafer level chip scale package is one of them, which has the solution of the market needs above. However, WLCSP technology is still not fully accepted on the large device size that is larger than 5mm × 5mm. It needs to overcome 2nd level reliability issue on both solder joint and drop reliability test. To improve 2nd level reliability, we need to apply the longer stand–off design such as Cu –post and double solder ball instead of single solder ball, and low modulus material on polymer layer under the solder pad for releasing thermal stress which result in the solder joints crack due to CTEs (Coefficient of Thermal Expansion) mismatch between organic PCB and WLCSP. In this paper, the double ball structure is introduced as one of them can provide the longer stand off. In addition of improving 2nd level reliability and drop test it may need to apply different solder ball component properties to increase Thermal cycling and drop test. The WLCSP structured a double solder ball showed a better 2nd level reliability result. This paper describes the molding process for double ball process and 2nd level reliability by solder property variation.

ProteinTrans-Splicing as a Means for Viral Vector-MediatedIn VivoGene Therapy

Inteins catalyze protein splicing in a fashion similar to how self-splicing introns catalyze RNA splicing. Splitinteins catalyze precise ligation of two separate polypeptides through trans-splicing in a highly specific manner. Here we report a method of using protein trans-splicing to circumvent the packaging size limit of gene therapy vectors. To demonstrate this method, we chose a large dystrophin gene and an adeno-associated viral (AAV) vector, which has a small packaging size. A highly functional 6.3-kb Becker-form dystrophin cDNA was broken into two pieces and modified by adding appropriate split-intein coding sequences, resulting in splitgenes sufficiently small for packaging in AAV vectors. The two split-genes, after codelivery into target cells, produced two polypeptides that spontaneously trans-spliced to form the expected Becker-form dystrophin protein in cell culture in vitro. Delivering the split-genes by AAV1 vectors into the muscle of a mouse model of Duchenne muscular dystrophy rendered therapeutic gene expression and benefits.

Production process options for IC package wire sweep in view of the matter element theory

The problematic wire sweep in the IC production bonding process acts as the 1st layer structure is a factor that critically affects product quality. Among the factors affecting IC packaging numerous contradictory interactions occur. The said influence is more significant due to the increasing number of IC lead legs and smaller package sizes. In this research, the Matter Element Model is adopted to implement Design of Experiment to reduce the possibility of wire sweep for various production process options. The Matter Element Model algorithm is adopted to attain the optimal results in the partial production process. The production process is examined using Computer-Aided Simulations; thus, the time spent for systematic experimental analysis is shortened for all available options.

Correlates of In-Store Promotions for Beer: Differential Effects of Market and Product Characteristics*

We estimated the strength and direction of the association between product characteristics (beer type, package size, and brand name) and market-area socioeconomic characteristics, and promoted sales of beer in grocery stores. Supermarket scanner data from 64 market areas across the United States over 5 years were used to estimate regression models of the share of beer sales that are promoted, controlling for beer price, packaging, and type; and for market-level age, race/ethnicity, income, unemployment rate, and percentage of the population living in an alcohol control state. Large-volume units, such as 144-oz and 288-oz packages, are more likely to be promoted than smaller package sizes. Malt-liquor beverages are less likely to be promoted than non-malt-liquor beverages. Age, race/ethnicity, income, and geographic location of the market area are not significantly related to promoted beer sales. Marketing research has shown that in-store merchandising and promotions can substantially increase beer sales and that purchasing large package sizes may increase total consumption. Our results suggest that high levels of promoted sales for large-volume beer packages may result in increased beer consumption.