Slew Rate Research Articles

Dynamic Response of Buck Converter With Auxiliary Current Control: Analysis and Design of Practical Implementation

An in-depth analysis on the load transient operation of a buck converter with auxiliary current control is presented in this article. The analysis quantifies the effects of nonideal characteristics, such as the equivalent series resistance, inductor current and output voltage ripples, time delay, and slew rate of the load current, on the fluctuation of the output voltage in a practical implementation. The analysis results reveals that some of the non-idealities may cancel each other out and become negligible in the implementation. A design considering the nonidealities can achieve the transient-wise capacitor charge balance of the output capacitor and minimize the output voltage deviation during the load transient. The agreement between the simulation and experimental results validates the effectiveness and precision of the proposed analysis and design.

High slew rate pulsed electromagnetic field enhances bone consolidation and shortens daily treatment duration in distraction osteogenesis

AimsDistraction osteogenesis (DO) is a useful orthopaedic procedure employed to lengthen and reshape bones by stimulating bone formation through controlled slow stretching force. Despite its promising applications, difficulties are still encountered. Our previous study demonstrated that pulsed electromagnetic field (PEMF) treatment significantly enhances bone mineralization and neovascularization, suggesting its potential application. The current study compared a new, high slew rate (HSR) PEMF signal, with different treatment durations, with the standard Food and Drug Administration (FDA)-approved signal, to determine if HSR PEMF is a better alternative for bone formation augmentation.MethodsThe effects of a HSR PEMF signal with three daily treatment durations (0.5, one, and three hours/day) were investigated in an established rat DO model with comparison of an FDA-approved classic signal (three hrs/day). PEMF treatments were applied to the rats daily for 35 days, starting from the distraction phase until termination. Radiography, micro-CT (μCT), biomechanical tests, and histological examinations were employed to evaluate the quality of bone formation.ResultsAll rats tolerated the treatment well and no obvious adverse effects were found. By comparison, the HSR signal (three hrs/day) treatment group achieved the best healing outcome, in that endochondral ossification and bone consolidation were enhanced. In addition, HSR signal treatment (one one hr/day) had similar effects to treatment using the classic signal (three three hrs/day), indicating that treatment duration could be significantly shortened with the HSR signal.ConclusionHSR signal may significantly enhance bone formation and shorten daily treatment duration in DO, making it a potential candidate for a new clinical protocol for patients undergoing DO treatments.Cite this article: Bone Joint Res 2021;10(12):767–779.

A Method for Endurance Testing of Enameled Round and Rectangular Wires for Motors Controlled by SiC-based Inverters

The purpose of this article is to propose a method for investigating the influence of the impulse voltage waveform generated by inverters based on wide bandgap semiconductors on the insulation endurance of magnet wires. In this regard, endurance tests of enamel insulation are performed on a designed test bench, which generates repetitive voltage pulses with ns-level rising and falling times corresponding to modern silicon carbide-based inverters. Furthermore, we suggest a novel specimen's shape for testing enameled rectangular section magnet wires which find their application in electric traction motors. Considerations related to the deterioration of dielectrics subjected to impulse voltage with high slew rates and high switching frequency are given.

Design of high speed 2-stage OTA for high capacitive load of 120 pF and 2.96 V

High speed operational transconductance amplifier (OTA) is used to drive high capacitive loads to reduce the charging time while providing adequate gain and stability. A 2-stage amplifier is proposed to provide high slew rate and sufficient gain and stability. 45 nm process technology is used to compare performance with differential and telescopic amplifier designs. Resistive feedback and noise-gain compensation techniques are used to drive 120 pF load of a row driver circuit used in an active pixel sensor and provide 2.96 V at output for a high slew rate of 2.2 V/μs.

A new slew rate enhancement technique for operational transconductance amplifiers

AbstractThis paper presents a new symmetric slew rate enhancement (SRE) circuit suitable for operational transconductance amplifiers (OTAs). The proposed SRE circuit is composed of two auxiliary circuits which are automatically activated during fast signal transitions (slewing) by comparing the input and output signals. The auxiliary circuits pump required current in/out the load capacitance. In this way, the slew rate of the amplifier is significantly improved without any extra static power dissipation. The proposed technique can be applied to a variety of operational amplifiers. However, incorporating the proposed SRE circuit into a folded‐cascode amplifier (FCA) results in 7× slew rate improvement and 66.6% settling time reduction, while the frequency response and small‐signal operation of the amplifier are not degraded. The proposed SRE circuit is designed and simulated in a 0.13‐μm Complementary Metal‐Oxide‐Semiconductor (CMOS) technology. Post‐layout simulation results show that the circuit has a slew rate of 1465 V/μs and 9.75‐ns settling time for a total 3‐pF load capacitance while the power consumption is 841 μW at 1.2‐V supply voltage; that indicates 7‐time SR improvement with lower power dissipation compared to the conventional FCA and an excellent FOML of 6.26 ([V/μs] × pF/μA). Moreover, simulation results of the circuit for worst corner and temperature cases as well as 10% supply variation verify the robustness of the circuit against PVT changes.

A 5-kV pulse generator with a 100-kV/µs slew rate based on series-connected 1700-V SiC MOSFETs for electrical insulation tests.

This study demonstrates a high-slew-rate 5-kV pulse generator for electrical insulation tests. Electrical equipment, such as electrical actuators and traction drive motors, are exposed to severe electrical stress because recent switching inverters have high-frequency outputs with high supply voltages using wide-bandgap power devices. For an advanced electrical insulation test, a high-voltage pulse generator is required with a high slew rate; however, such generators suffer from large switching noise, followed by measurement noise, such as ground voltage fluctuations and radiation noise, hindering the detection of partial discharge (PD) phenomena. In this study, we propose a 5-kV pulse generator based on series-connected 1700-V silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs). Four 1700-V SiC MOSFETs are connected in series as a 5-kV SiC switching module, constituting a half-bridge configuration for the pulse generator. The obtained switching waveforms exhibit fast rise times of 48 ns under 5 kV and 6.2 ns under 400 V with a low voltage overshoot and ringing owing to superior device characteristics and reduced parasitic inductances. Because of the low switching noise, we detect a clear PD signal with a 1500-V pulse when using the fabricated pulse generator for a PD test of a twisted pair. The proposed pulse generator uses a hard switching configuration such that the pulse generator can vary the pulse width from 150 ns to DC and increase the switching pulse cycle beyond 1 MHz by changing the control signals of the SiC MOSFETs.

A Novel Full Soft-Switching High-Gain DC/DC Converter Based on Three-Winding Coupled-Inductor

In this article, a new nonisolated full soft-switching step-up dc/dc converter is introduced with a continuous input current for renewable energy applications. The use of a three-winding coupled-inductor (TWCI) along with a voltage multiplier, enables the proposed converter to enhance the voltage gain with lower turns ratios and duty cycles. Also, a lossless regenerative passive clamp circuit is employed to limit the voltage stress across the power switch. In addition to zero current switching performance at the turn-on instant of the power switch, the turn-off current value is also alleviated by adopting a quasi-resonance operation between the leakage inductor of the TWCI and middle capacitors. Moreover, the current of all diodes reaches zero with a slow slew rate, which leads to the elimination of the reverse recovery problem in the converter. Soft-switching of the power switch and all the diodes in the proposed converter significantly reduces the switching power dissipations. Therefore, the presented converter can provide a high voltage gain ratio with high efficiency. Steady-state analysis, comprehensive comparisons with other related converters, and design considerations are discussed in detail. Finally, a 160 W prototype with 200 V output voltage is demonstrated to justify the theoretical analysis.

Frequency Response of Electronically Tunable Current-Mode Third Order High Pass and Low Pass Filter for Q = 10

The circuits using current-mode (CM) building blocks have received considerable attention in many filtering and signal processing applications. Compared to their voltage-mode(VM) counterparts, the current-mode building blocks are attractive because of their wider bandwidth, higher slew rate, and lower power consumptions. In IC technology, it is desirable to operate circuits at low voltages which can be achieved by using CM building blocks. As a large number of op-amp based circuits with elegant realization procedures are already available, it is worthwhile to convert them into the circuits based on current-mode building blocks. In this paper, a realization of a current mode third order high pass and low pass filter is described. The proposed circuit employs operational amplifier as the basic building unit. The filter circuit realizes quadratic work function. It provides electronically tuning capability of the filter characteristics. The proposed circuit works ideal for Center frequency fo= 10 k and Circuit merit factor Q > 1. The gain roll-off this configuration is 18dB/octave. The circuit is suitable for monolithic integration and high frequency operation. The filters developed were successful in obtaining passive sensitivities less than unity in magnitude and active sensitivities are half in magnitude, which is a noteworthy achievement. The circuit is suitable for high frequency operation and monolithic integration.

Optimal his bundle pacing programming in patients with permanent atrial fibrillation

Abstract Background Interest in permanent His bundle pacing (HBP) as a means of both preventing pacing-induced cardiomyopathy and providing physiological resynchronization by normalization of His-Purkinje activation is constantly growing. Current devices are not specifically designed for HBP, which gives rise to programming challenges. Purpose To evaluate the critical troubleshooting HBP options in patients with permanent atrial fibrillation (AF) and variable degree of atrio-ventricular block (AVB) who receive HBP through a lead connected to the atrial port, and an additional ventricular “backup”. Methods Between December 2018 and March 2021, 136 consecutive patients with indication for pacing underwent HBP. Among these, 24 had permanent AF with documented symptomatic pauses. Seven of them received a dual-chamber device which was used to place a backup right ventricle (RV) lead; in this scenario, the His lead is implanted in the right atrial (RA) port, the RV lead in the RV port. Depending on the presence of an additional left ventricle (LV) lead, either a dual-chamber and a CRT device can be used. Results In this context, the events marked as atrial sensed (As) or paced (Ap) are indeed ventricular, so that sensing is more complex. A clinical scenario is atrial activity oversensed on the His channel (As) leading to RV dyssynchronous pacing in the ventricular safety pacing (VSP) window. A second one is intrinsic QRS undersensing causing inappropriate His pacing with possible delivery of the RV pulse depending on capture of the His pulse. The interplay of intrinsic ventricular activity (rate, signal amplitude and slew rate on both the His and the ventricular channel) and of the HV interval may be of key importance to troubleshoot As-Vp (atrial sensed – ventricular paced) [Fig. 1A] as well as Vs-Ab (ventricular sensed – atrial blanking period) sequences [Fig. 1B]. Changing sensitivity and sensing configuration may help or fail to fix these issues depending on the abovementioned aspects, making it mandatory to check that the paced AV delay is appropriately set as to avoid inappropriate RV pacing on the T wave of an undersensed intrinsic event at the His channel. DVI(R) mode programming may indeed prove safer than DDD(R) in the setting of preserved intrinsic activity or in the event of intermittent His capture loss. Paced AV delay should be programmed slightly longer than H-V+QRS duration to avoid unnecessary RV pacing with pseudo-fusion (too short) and possibly R/T events (too long). Stability of H-V interval and of QRS duration must be verified at each device follow-up by decremental His pacing to ensure consistent sensitivity of the ventricular signal beyond stable His capture, that may be challenged by infra-hisian block. Conclusions Owing to the absence of HBP-specific devices, HBP shall be made safe and effective by careful troubleshooting, consisting of sensitivity setting, paced AV interval and mode programming. Funding Acknowledgement Type of funding sources: None. Different sensitivity settings for HBP

Improved reversed nested miller frequency compensation techniques using flipped and folded flipped voltage follower with resistor for three stage amplifier

This paper presents three circuits to improve frequency compensation in three stage amplifier for large capacitive load of 100 pF. The first proposed circuit introduces Flipped Voltage Follower (FVF) in inner loop of Reversed Nested Miller Compensation (RNMC) to combat RHP zero whereas both second and third proposed circuits employ A Folded Flipped Voltage Follower (FFVF). The third proposed circuit uses an additional resistor in the outer compensation loop for double pole-zero cancellation. Further feed forward path has been used in all proposed circuits to improve the large signal response. The functionality is verified using TSMC 0.18 µm CMOS technology parameters in Tanner tool. The simulation results show maximum gain-bandwidth product (GBW) of 30 MHz, minimum phase margin (PM) of 60° and slew rate (SR) of 10 V/µS, and minimum common mode rejection ratio (CMRR) of 37.2 dB at unity gain frequency. The input-referred noise of the proposed circuits varies from 16.6 nV/Hz to 18.2 nV/Hzat unity gain frequency. Corner analysis is also included to show the robustness of the circuits.

Layout-Based Ultrafast Short-Circuit Protection Technique for Parallel-Connected GaN HEMTs

Gallium-nitrideenhancement-mode high-electron-mobility transistors (GaN HEMTs) help to achieve high-power-density converter circuits due to their superior efficiency, higher switching speed, and small package size. However, increased switching speed results in a sharp increase in short-circuit (SC) current under a shoot-through fault with respect to other type of devices. GaN HEMTs can withstand the SC current only for several hundred nanoseconds. Therefore, fast SC protection solutions are critical for protecting power circuits. In this article, the voltage induced by high slew rate of SC current on the high-frequency power loop inductance resulting from the printed circuit board (PCB) layout is sensed to implement an ultrafast short-circuit protection technique. The proposed technique does not increase circuit parasitics and provides flexibility in layout design that makes it suitable for parallel-connected GaN HEMTs, which requires symmetric layout design for equal current sharing. A multipulse test is conducted under 1.56-MHz switching frequency, 400-V dc- bus voltage, and 40-A load current by using parallel-connected GaN HEMTs in a half-bridge configuration to verify the robustness and reliability of the proposed protection technique. Experimental results show that the proposed protection technique can detect SC fault within 40 ns and fault is completely cleared with a soft turn-off in 250 ns.

A QFGMOS-Based gm-Boosted and Adaptively Biased Two-Stage Amplifier Offering Very High Gain and High Bandwidth

A low voltage low power two-stage CMOS amplifier with high open-loop gain, high gain bandwidth product (GBW) and enhanced slew rate is presented in this work. The proposed circuit makes use of folded cascode gm-boosting cells in conjunction with a low voltage gain enhanced cascode mirror using quasi-floating gate (QFGMOS) transistors. QFGMOS transistors are also used in input pair and adaptive biasing, which facilitate large dynamic output current in the presented circuit. Consequently, the slew rate is enhanced without much increase in static power dissipation. The unity gain frequency (UGF) and dc gain of the circuit are 29.4[Formula: see text]MHz and 132[Formula: see text]dB, respectively. The amplifier is operated at 0.6[Formula: see text]V dual supply with 89[Formula: see text][Formula: see text]W power consumption and has a nearly symmetrical average slew rate of 51.5[Formula: see text]V/[Formula: see text]s. All simulations including Monte Carlo and corner analysis are carried out using 180-nm CMOS technology for validating the design with help of spice tools.

Multi-objective Optimization in Geometric Design of Active Magnetic Bearing based on Force Slew Rate, Overall Volume, and Total Losses Considerations through Genetic Algorithms

Multi-objective Optimization in Geometric Design of Active Magnetic Bearing based on Force Slew Rate, Overall Volume, and Total Losses Considerations through Genetic Algorithms

A silent gradient axis for soundless spatial encoding to enable fast and quiet brain imaging.

PurposeA novel silent imaging method is proposed that combines a gradient insert oscillating at the inaudible frequency 20 kHz with slew rate‐limited gradient waveforms to form a silent gradient axis that enable quiet and fast imaging.MethodsThe gradient insert consisted of a plug‐and‐play (45 kg) single axis z‐gradient, which operated as an additional fourth gradient axis. This insert was made resonant using capacitors and combined with an audio amplifier to allow for operation at 20 kHz. The gradient field was characterized using field measurements and the physiological effects of operating a gradient field at 20 kHz were explored using peripheral nerve stimulation experiments, tissue heating simulations and sound measurements. The imaging sequence consisted of a modified gradient‐echo sequence which fills k‐space in readout lanes with a width proportional to the oscillating gradient amplitude. The feasibility of the method was demonstrated in‐vivo using 2D and 3D gradient echo (GRE) sequences which were reconstructed using a conjugate‐gradient SENSE reconstruction.ResultsField measurements yielded a maximum gradient amplitude and slew rate of 40.8 mT/m and 5178T/m/s at 20 kHz. Physiological effects such as peripheral nerve stimulation and tissue heating were found not to be limiting at this amplitude and slew rate. For a 3D GRE sequence, a maximum sound level of 85 db(A) was measured during scanning. Imaging experiments using the silent gradient axis produced artifact free images while also featuring a 5.3‐fold shorter scan time than a fully sampled acquisition.ConclusionA silent gradient axis provides a novel pathway to fast and quiet brain imaging.

A roadmap for sole Cherenkov radiators with SiPMs in TOF-PET

Time of flight positron emission tomography can strongly benefit from a very accurate time estimator given by Cherenkov radiation, which is produced upon a 511 keV positron–electron annihilation gamma interaction in heavy inorganic scintillators. While time resolution in the order of 30 ps full width at half maximum (FWHM) has been reported using MCP-PMTs and black painted Cherenkov radiators, such solutions have several disadvantages, like high cost and low detection efficiency of nowadays available MCP-PMTs. On the other hand, silicon photomultipliers (SiPMs) are not limited by those obstacles and provide high photon detection efficiency with a decent time response. Timing performance of PbF2 crystals of various lengths and surface conditions coupled to SiPMs was evaluated against a reference detector with an optimized test setup using high-frequency readout and novel time walk correction, with special attention on the intrinsic limits for one detected Cherenkov photon only. The average number of detected Cherenkov photons largely depends on the crystal surface state, resulting in a tradeoff between low photon time spread, thus good timing performance, and sensitivity. An intrinsic Cherenkov photon yield of 16.5 ± 3.3 was calculated for 2 × 2 × 3 mm3 sized PbF2 crystals upon 511 keV γ-deposition. After time walk correction based on the slew rate of the signal, assuming two identical detector arms in coincidence, and using all events, a time resolution of 215 ps FWHM (142 ps FWHM) was obtained for 2 × 2 × 20 mm3 (2 × 2 × 3 mm3) sized PbF2 crystals, compared to 261 ps (190 ps) without correction. Selecting on one detected photon only, a single photon coincidence time resolution of 113 ps FWHM for black painted and 166 ps for Teflon wrapped crystals was measured for 3 mm length, compared to 145 ps (black) and 263 ps (Teflon) for 20 mm length.

A High Bandwidth-Power Efficiency, Low THD2,3 Driver Amplifier with Dual-Loop Active Frequency Compensation for High-Speed Applications

This paper presents a driver amplifier with high bandwidth-power efficiency, high capacitor-driving capacity, and low total harmonic distortion (THD). One complementary differential pair composed of self-cascode transistors is incorporated to obtain a full input voltage swing. Flipped voltage follower (FVF) buffers are applied as second stage to drive the last class-AB output stage. Moreover, a dual-loop active-feedback frequency compensation (DLAFC) is presented, which can stabilize the proposed multistage amplifier and keep the dominant pole on high frequency to obtain high-frequency total harmonic distortion (THD) suppression. To achieve a low-frequency phase margin protection (PMP), one left half-plane (LHP) zero is introduced to compensate for the nondominant pole caused by the load capacitor. Meanwhile, two high-frequency LHP zeros are injected to achieve high-frequency phase margin boosting (PMB) and reduce the amplifier’s settling time and integration area. This proposed amplifier is implemented in a standard DBH 0.18 μm 5 V CMOS process, and it achieves over 115-dB DC gain, 150–300 MHz GBW under 0–100 p load capacitors, ultra-high THD2,3 suppression ranges from 100 kHz to 10 MHz under 1–2 V output swing, and over 250 V/μs average slew rate, by only dissipating 12.5 mW at 5 V power supply.

Robust gain-scheduling [formula omitted] control of uncertain continuous-time systems having magnitude- and rate-bounded actuators: An application of full block S-procedure

This paper addresses a novel robust gain-scheduling(GS) state-feedback (SF) H∞ (induced L2) control method for uncertain continuous-time(CT) systems having actuators with hard rate and magnitude bounds. The proposed method relies on acceleration form representation of the uncertain CT system. The technique enables the user to represent the control signal and its slew rate as auxiliary outputs along with the main controlled output. Two different norms, namely the induced L∞ and L2 are used to control the system effectively. While the L∞ gain from the exogenous disturbance inputs to the control signal related outputs is used to deal with actuator saturation problem, L2 gain from the disturbance inputs to the performance outputs is utilised in attenuation of the effects of the disturbances. To achieve these goals with minimal conservatism, we develop new forms of dilated Matrix Inequality (MI) conditions for peak-to-peak gain and L2 gain with no additional conservatism. Then, we propose a novel robust GS control methodology to deal with the problem via dilated MIs and a modified full block S-procedure method (MFBSPM). The utilisation of MFBSPM ensures that the robust control design method of this note applies to any uncertain system having rational parameter dependence. Finally, the efficiency of the presented method is portrayed through extensive simulations of the responses of a marine vessel to wave excitations in which the vessel model is assumed to have magnitude and rate limited active fin stabiliser.

Electromagnetic Bearings With Power Electronic Control for High-Speed Rotating Machines: Review, Analysis, and Design Example

This article reviews electromagnetic bearings with power electronic control for high-speed machinery, which are termed active magnetic bearings (AMBs). AMB is a contactless-type bearing, which uses magnetic force to support the rotor. This is suitable for high-speed applications, harsh operating conditions, and also clean environments. However, the AMB has nonlinear characteristics and is inherently unstable. Due to recent advancements in fast-switching power devices, high-switching-frequency power converters, high-bandwidth current control, nonlinear control strategies, advanced digital controllers, and sensors, AMBs have become promising for high-speed aerospace, industrial, and energy applications. This article contains a brief tutorial on the AMB, covering its operating principle, system-level block diagram, magnetic-circuit-based analysis, dynamic load due to rotor mass unbalance, load capacity, force slew rate, and response to large force disturbance. Furthermore, a design example of an eight-pole AMB with four excitation coils is presented to achieve a load capacity of 180 N. A preliminary design, based on magnetic circuit analysis, is seen to fall short in terms of load capacity. Iterative changes to the AMB dimensions achieve the required load capacity, but the characteristics are still nonlinear. Finite-element analyses bring out the effects of magnetic saturation on load capacity, linearity between force and current, force slew rate, and relationships between maximum force generated and AMB dimensions. An improved design procedure is presented to achieve both desired load capacity and linear characteristics, while balancing the compactness requirement. The improved design also achieves the desired slew rate besides faster response and improved stability.

An Enhanced Input Differential Pair for Low-Voltage Bulk-Driven Amplifiers

This article presents a low-voltage high-transconductance input differential pair for bulk-driven amplifiers. The proposed structure employs two bulk-driven flipped voltage follower (FVF) cells as nonlinear tail current sources to enhance the slewing behavior. This method also increases the transconductance of the proposed amplifier two times against the conventional one. The enhanced topology is merged with a conventional bulk-driven input differential pair using cross-coupled connections to significantly increase the transconductance. These circuitry ideas lead to an improvement in the amplifier's specifications, such as dc gain, slew rate (SR), and input noise without any degeneration in other parameters. Moreover, thanks to the use of the bulk terminals as the input nodes and also a simple common-source structure as the second stage, rail-to-rail input, and output swings are achieved, respectively. The proposed amplifier was fabricated in TSMC 0.18- μm CMOS technology. Under a supply voltage of 0.5 V, the measurement results show that the proposed amplifier achieves a dc gain of 78 dB, a gain bandwidth of 7.5 kHz, and an SR of 8.6 V/ms with just 91-nA current dissipation.

A 1.8‐V 240‐MHz 2.19‐mW Four‐Stage CMOS OTA with a Segmenting Frequency Compensation Technique

A four-stage Operational transconductance amplifier (OTA) used in an infrared temperature sensor adopting the proposed Feed-forward Gm-stage and segmenting nested Miller compensation technique is presented. The purpose of the proposed segment compensation is primarily to make more amplifier stages concatenated. The circuit linked several transconductance stages to form a segment, and linked several segments to form a large multistage amplifier. For example, a two-stage amplifier linked with a three-stage amplifier can realize a five-stage amplifier, two three-stage amplifiers linked can realize a six-stage amplifier. A four-stage amplifier in the form of 2+2 (two stages and two stages) was used as an example to verify this compensation method. The proposed OTA is designed in the 180nm complementary metal oxide semiconductor process. It consists of two parts which ensure the stability and improve the bandwidth performance. The first part is a feed-forward transconductance stage, and the second part is the two-segment transconductance stages with the Miller compensation techniques employed within and between the two segments. Based on the small-signal model, stability analysis and theoretical derivation are performed in theory. On condition of a 2-pF load capacitance, a direct current gain of 109dB and a gain-bandwidth of 240MHz with a phase margin of 50° can be achieved. The proposed design consumes 2.19mW in a 1.8-V supply voltage. The transient simulation indicates that the settling time of the output is 19ns with the settling error being 1%, and the slew rate is 114V/μs.