A new slew rate enhancement technique for operational transconductance amplifiers

Abstract

AbstractThis paper presents a new symmetric slew rate enhancement (SRE) circuit suitable for operational transconductance amplifiers (OTAs). The proposed SRE circuit is composed of two auxiliary circuits which are automatically activated during fast signal transitions (slewing) by comparing the input and output signals. The auxiliary circuits pump required current in/out the load capacitance. In this way, the slew rate of the amplifier is significantly improved without any extra static power dissipation. The proposed technique can be applied to a variety of operational amplifiers. However, incorporating the proposed SRE circuit into a folded‐cascode amplifier (FCA) results in 7× slew rate improvement and 66.6% settling time reduction, while the frequency response and small‐signal operation of the amplifier are not degraded. The proposed SRE circuit is designed and simulated in a 0.13‐μm Complementary Metal‐Oxide‐Semiconductor (CMOS) technology. Post‐layout simulation results show that the circuit has a slew rate of 1465 V/μs and 9.75‐ns settling time for a total 3‐pF load capacitance while the power consumption is 841 μW at 1.2‐V supply voltage; that indicates 7‐time SR improvement with lower power dissipation compared to the conventional FCA and an excellent FOML of 6.26 ([V/μs] × pF/μA). Moreover, simulation results of the circuit for worst corner and temperature cases as well as 10% supply variation verify the robustness of the circuit against PVT changes.