SiO2 Passivation Layer Research Articles

Enhanced Visible Transmittance of Thermochromic VO₂ Thin Films by SiO₂ Passivation Layer and Their Optical Characterization.

This paper presents the preparation of high-quality vanadium dioxide (VO2) thermochromic thin films with enhanced visible transmittance (Tvis) via radio frequency (RF) sputtering and plasma enhanced chemical vapor deposition (PECVD). VO2 thin films with high Tvis and excellent optical switching efficiency (Eos) were successfully prepared by employing SiO2 as a passivation layer. After SiO2 deposition, the roughness of the films was decreased 2-fold and a denser structure was formed. These morphological changes corresponded to the results of optical characterization including the haze, reflectance and absorption spectra. In spite of SiO2 coating, the phase transition temperature (Tc) of the prepared films was not affected. Compared with pristine VO2, the total layer thickness after SiO2 coating was 160 nm, which is an increase of 80 nm. Despite the thickness change, the VO2 thin films showed a higher Tvis value (λ 650 nm, 58%) compared with the pristine samples (λ 650 nm, 43%). This enhancement of Tvis while maintaining high Eos is meaningful for VO2-based smart window applications.

Improved optical and electrical performances of GaN-based light emitting diodes with nano truncated cone SiO2 passivation layer

GaN-based light emitting diodes (LEDs) with nano truncated cone SiO2 passivation layer via laser interference lithography and inductively coupled plasma dry etching technology were fabricated. The sidewall profile of the nano truncated cones was optimized by adjusting the etching process to obtain high fill factor. The light output power and electroluminescence intensity of the LEDs with textured SiO2 surface show better results than the conventional LEDs without SiO2 layer. At an injection current of 20 mA, the enhancement of the light output power is about 64 %. Moreover, the reverse leakage current, under a reverse bias of −5 V, is obviously reduced in contrast to the conventional LEDs. The method of texturing the passivation layers is proved to be an alternative method to improve both the optical and electrical performances of GaN-based LEDs.

Intrinsic Photoconductive Switches Based on Semi-Insulator 4H-SiC

A high-purity semi-insulator 4H-SiC intrinsic photoconductive switch is presented. The photoconductive semiconductor switch device is fabricated as lateral structures with the electric contact on the same side. The effect of the SiO2 passivation layer has been investigated on the breakdown voltage. The minimum ON-state resistance is 16 $\Omega $ , and the breakdown voltage is 11 kV. A new phenomenon that two steps exist on the rising edge of the photocurrent is observed, and a model of resistor and capacitor in parallel is built to explain it.

TiO2 Nanoparticle/SiO2 Composite Back Reflector for Solar Cells

We have investigated a scattering back reflector(BR) using a TiO2 nanoparticles(NPs)/SiO2 composite film. The binder SiO2 is made from Perhydropolysilazane(PHPS), which is a an organosilicate polymer consisting of cyclic (SiH2-NH)n units. The PHPS changes into pure SiO2 by heat treatment less than 450°C, which can be easily coated on a substrate by spin coat. Compare to the conventional organic binders, SiO2 is quite stable and has a good transparency. The composite BR showed more than 90% of absolute reflectance at near infrared region. To improve a passivation property of BR, we inserted a thin liquid source SiO2 layer between the silicon surface and the composite BR. The composite BR using Al coated TiO2 NPs showed high effective lifetime with a combination of thin SiO2 passivation layer. This paper describes the light reflection property of TiO2 NPs/SiO2 composite film and the effect of inserting thin liquid source SiO2 passivation layer between the silicon surface and the composite BR layer on effective lifetime.

Effect of SiO<sub>2</sub> and SiO<sub>2</sub>/SiN<sub><italic>x</italic></sub> Passivation on the Stability of Amorphous Indium-Gallium Zinc-Oxide Thin-Film Transistors Under High Humidity

We studied the environmental stability of amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs) with single-layer (SiO2) and bilayer (SiO2/SiN x ) passivation under high-humidity (80%) storage. During the 30 days of investigation, all single-layer passivated TFTs showed negative turn-ON voltage shifts ( $\Delta V_{\mathrm{{\scriptstyle ON}}}$ ), the size of which increased with storing time. The negative $\Delta ~V_{\mathrm{{\scriptstyle ON}}}$ is attributed to donor generation inside the active a-IGZO caused by the diffusion of ambient hydrogen/water molecules passing through the SiO2 passivation layer. The X-ray photoelectron spectroscopy depth profile for the SiO2 passivated structures confirms that the concentration of oxygen vacancies, which is initially larger at the a-IGZO/SiO2 interface, compared with the bulk a-IGZO, decreases after 30 days of storage under high humidity. This can be explained as the passivation of oxygen vacancies by diffused hydrogen. On the other hand, all bilayer passivated TFTs showed good air stability at room temperature and high humidity (80%).

Fabrication and characterization of Mg<sub>2</sub>Si pn-junction Photodiode with a ring electrode

We have fabricated Mg2Si pn-junction photodiodes with an Au-ring electrode and a SiO2 passivation layer by means of a lift-off photolithography process. Current–voltage (I–V) characteristics of the photodiodes showed obvious rectifying behavior at room temperature. The ideality factor of n determined from the slope of I–V characteristics was 1.76–1.92. The photodiode showed a photoresponse with threshold energy of approximately 0.6 eV under a zero-bias condition. The intensity of peak photoresponse was improved approximately three times compared with the opaque Au-circular electrode type Mg2Si photodiode previously reported.

The impact of atomic layer deposited SiO2passivation for high-k Ta1−xZrxO on the InP substrate

Metal–oxide-semiconductor (MOS) capacitors with an amorphous Ta1−xZrxO composite gate dielectric film and a SiO2passivation layer were fabricated on an indium phosphide (InP) substrate.

Understanding of the annealing temperature impact on ion implanted bifacial n‐type solar cells to reach 20.3% efficiency

AbstractIon implantation has the advantage of being a unidirectional doping technique. Unlike gaseous diffusion, this characteristic highlights strong possibilities to simplify solar cell process flows. The use of ion implantation doping for n‐type PERT bifacial solar cells is a promising process, but mainly if it goes with a unique co‐annealing step to activate both dopants and to grow a SiO2 passivation layer. To develop this process and our SONIA cells, we studied the impact of the annealing temperature and that of the passivation layers on the electrical quality of the implanted B‐emitter and P‐BSF. A high annealing temperature (above 1000 °C) was necessary to fully activate the boron atoms and to anneal the implantation damages. Low J0BSF (BSF contribution to the saturation current density) of 180 fA/cm2 was reached at this high temperature with the best SiO2 passivation layer. An average efficiency of 19.7% was reached using this simplified process flow (“co‐anneal process”) on large area (239 cm2) Cz solar cells. The efficiency was limited by a low FF, probably due to contaminations by metallization pastes. Improved performances were achieved in the case of a “separated anneals” process where the P‐BSF is activated at a lower temperature range. An average efficiency of 20.2% was obtained in this case, with a 20.3% certified cell. Copyright © 2014 John Wiley & Sons, Ltd.

A Temperature-Compensated Gallium Nitride Micromechanical Resonator

A GaN bulk acoustic wave resonator is presented in this letter, showing fundamental thickness-mode resonance at 2.18 GHz, with a quality factor ( Q ) of 655 and a coupling coefficient ( \({k_{t}}^{2}\) ) of 1%. The resonator is integrated with an AlGaN/GaN high electron mobility transistor (HEMT); the integrated resonator/HEMT structure is coated with a silicon dioxide (SiO2) passivation layer. It is shown that a 400-nm-thick SiO2 layer reduces the temperature coefficient of frequency (TCF) of the GaN-based resonator by >50%, while improving Q and \({k_{t}}^{2}\) of the fundamental thickness-mode resonance. The effect of SiO2 passivation layer is studied on \({k_{t}}^{2}\) , Q , and TCF of the device. Furthermore, the effects of temperature and input RF power on the resonator performance are characterized.

Improved space survivability of polyhedral oligomeric silsesquioxane (POSS) polyimides fabricated via novel POSS-diamine

Polyhedral oligomeric silsesquioxane (POSS) surrounded by two amine groups, namely POSS-diamine, was prepared via hydrolytic co-condensation. POSS polyimide hybrid membranes were subsequently fabricated by co-polymerizing POSS-diamine with imide monomers. Hybrid membranes exhibit significantly improved space survivability. A hybrid membrane with 29.7wt% POSS loading shows the best atomic oxygen (AO) resistance with the lowest erosion yield of 0.9×10−25cm3·atom−1. The enhancement in AO resistance is attributed to the formation of a SiO2 passivating layer on the membrane surface upon AO exposure. POSS polyimides with desirable AO survivability may find wide usage in aerospace.

Process-Induced Degradation of SiO<inline-formula><tex-math>$_{\bf 2}$</tex-math></inline-formula> and a-Si:H Passivation Layers for Photovoltaic Applications

The passivation characteristics of thermally grown silicon dioxide (SiO 2 ) and hydrogenated amorphous silicon (a-Si:H) layers are investigated, using a combination of photoluminescence and capacitance-voltage analysis techniques. Key findings are the significant passivation degradation of SiO 2 and a-Si:H layers induced by metallization through electron beam evaporation. The degradation correlates with an increase in silicon dangling bond defect density at the interface with silicon (for both SiO 2 and a-Si:H) or in the passivation layer (a-Si:H). Performing the metallization by thermal evaporation is an effective method to avoid such process-induced damage, as is forming gas annealing at 450°C, which effectively recovers the interface characteristics of SiO 2 layers. Deposition of amorphous silicon on a thermal SiO 2 layer induces bulk and interface defects in the SiO 2 layer-but in this case, a 450°C forming gas anneal is not possible due to the thermal budget limitations of a-Si:H, thereby posing problems for solar cell structures which rely on a combination of PECVD a-Si:H and thermal SiO 2 passivation layers.

Passivation layer breakdown during laser-fired contact formation for photovoltaic devices

Low resistance laser-fired ohmic contacts (LFCs) can be formed on the backside of Si-based solar cells using microsecond pulses. However, the impact of these longer pulse durations on the dielectric passivation layer is not clear. Retention of the passivation layer during processing is critical to ensure low recombination rates of electron-hole pairs at the rear surface of the device. In this work, advanced characterization tools are used to demonstrate that although the SiO2 passivation layer melts directly below the laser, it is well preserved outside the immediate LFC region over a wide range of processing parameters. As a result, low recombination rates at the passivation layer/wafer interface can be expected despite higher energy densities associated with these pulse durations.

Self-aligned indium–gallium–zinc oxide thin-film transistors with SiNx/SiO2/SiNx/SiO2 passivation layers

Self-aligned top-gate amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistors (TFTs) with SiNx/SiO2/SiNx/SiO2 passivation layers are developed in this paper. The resulting a-IGZO TFT exhibits high reliability against bias stress and good electrical performance including field-effect mobility of 5cm2/Vs, threshold voltage of 2.5V, subthreshold swing of 0.63V/decade, and on/off current ratio of 5×106. With scaling down of the channel length, good characteristics are also obtained with a small shift of the threshold voltage and no degradation of subthreshold swing. The proposed a-IGZO TFTs in this paper can act as driving devices in the next generation flat panel displays.

Sputtered oxides used for passivation layers of amorphous InGaZnO thin film transistors

Four sputtered oxide films (SiO2, Al2O3, Y2O3 and TiO2) along with their passivating amorphous InGaZnO thin film transistors (a-IGZO TFTs) were comparatively studied in this paper. The device passivated by an Al2O3 thin film showed both satisfactory performance (μFE=5.3cm2/Vs, Ion/Ioff>107) and stability, as was probably related to smooth surface of Al2O3 thin films. Although the performance of the a-IGZO TFTs with a TiO2 passivation layer was also good enough (μFE=3.5cm2/Vs, Ion/Ioff>107), apparent Vth shift occurred in positive bias-stress tests due to the abnormal interface state between IGZO and TiO2 thin films. Sputtered Y2O3 was proved no potential for passivation layers of a-IGZO TFTs in this study. Despite unsatisfactory performance of the corresponding a-IGZO TFT devices, sputtered SiO2 passivation layer might still be preferred for its high deposition rate and excellent transparency which benefit the mass production of flat panel displays, especially active-matrix liquid crystal displays.

Parametric simulation of the back-surface field effect in the silicon solar cell

Recombination of minority carriers in the solar cell is a major contributing factor in the loss of quantum efficiency and cell power. While the surface recombination is dealt with by depositing a passivation layer of SiO2 or SiNx, the bulk recombination is minimized by use of nearly defect-free monocrystalline substrate. In addition, the back-surface field (BSF) effect has been very useful in aiding the separation of free electrons and holes in the bulk. In this study, the key BSF parameters and their effect on the performance of a typical p-type front-lit Si solar cell are investigated by use of Medici, a 2-dimensional device simulator. Of the parameters, the doping concentration of the BSF layer is found to be most significant. That is, for a p-type substrate of 1 × 1014 cm−3 acceptor concentration, the optimum doping concentration of the BSF layer is 1 × 1018 cm−3 or more, and the maximum cell power can be increased by 24%, i.e., 25.4 mW cm−2 vs. 20.5 mW cm−2, by using a BSF layer with optimum doping. With regards to the BSF layer thickness, the impact is less. That is, the maximum cell power is about 11% higher at 100 μm than at 5 μm, which translates to an increase of 1.2% μm−1. In practice, therefore, it would be better to rely on the control of the doping concentration than the thickness in maximizing the BSF effect in real Si solar cells.

A novel cavity-first process for flexible fabrication of MEMS on silicon on insulator (SOI) wafer

This paper reports a novel cavity-first approach for producing released MEMS from front side of the silicon on insulator (SOI) wafer. This approach eliminates the requirements to sacrificial layer or wet chemical etching, avoids the damage to other components by vapour-phase HF dry etching, and exhibits excellent compatibility to CMOS. In this approach, prior to metal or SiO2 passivation layer deposition, cavities were formed by using vapour-phase hydrofluoric (HF) acid dry etching to remove SiO2 box layer through release holes with a diameter of a few micrometers, and then an amorphous fluoropolymer thin film was used to re-fill release holes without entering into the cavities. After other processes, MEMS structure can be finally released by inductive coupled plasma reactive ion etching (ICP-RIE) from front side of the wafer. To present the process details and its unique merits, i.e. high efficiency, better thickness uniformity in device layer, and less proof mass loss, a piezoresistive planer MEMS vibration sensor was fabricated by using above approach and its performance was evaluated. The results demonstrated that this approach is considerably valuable to both MEMS flexible fabrication and MEMS–CMOS monolithic integration.

Analysis of failure of C-V characteristics of MIS structure with SiO2 passivation layer deposited on InSb substrate via Raman spectroscopy

ABSTRACTThe effect of interfacial phases on the electrical properties of Au/Ti/SiO2/InSb metal-insulator (oxide)-semiconductor (MIS or MOS) structures was investigated by capacitance-voltage (C-V) measurements. With increasing the deposition temperature of silicon oxide from 100 to 350°C using PECVD, the change in the interfacial phases between SiO2 and InSb were analyzed by resonant Raman spectroscopy to verify the relation between the breakdown of C-V characteristics and the change of interfacial phases. The shape of C-V characteristics was dramatically changed when the deposition temperature was above 300°C. The C-V measurements and Raman spectra represented that elemental Sb accumulation resulted from the chemical reaction of Sb oxide with InSb substrate was responsible for the failure in the C-V characteristics of MIS structure.

Atomic-layer Deposition for Improved Performance of III-N Avalanche Photodiodes

ABSTRACTWe have investigated surface modification methods for avalanche photodiodes using dielectrics deposited by atomic layer deposition (ALD). Arrays of mesa GaN APDs were fabricated, and ALD Al2O3 was used for sidewall passivation prior to completing the APD array. The use of ALD Al2O3 in this manner was observed to result in a large average improvement in APD dark current when compared with devices using more conventional SiO2 passivation layers produced by chemical vapor deposition. Co-processed metal-oxide-semiconductor (MOS) capacitors fabricated with the same passivation layers show significant improvement in electrical interface quality for devices with ALD Al2O3.

Ultrafast Optical Properties of Dense Electron Gas in Silicon Nanostructures.

We investigate the ultrafast dynamics of carriers in a silicon nanostructure by performing spectrally resolved femtosecond spectroscopy measurements with a supercontinuum probe. The nanostructure consists of a 158-nm-thick crystalline Si layer on top of which a SiO2 passivation layer leads to a very high quality of the Si surface. In addition, a dielectric function approach, including contributions from a Drude part and interband transitions, combined with the Transition Matrix Approximation is used to model the photogenerated carrier dynamics. The spectrotemporal reflectivity reveals two mechanisms. First, an electron–hole plasma is created by the pump pulse and lasts for a few picoseconds. Importantly, its spectral signature is either a positive or a negative change of reflectivity, depending on the probe wavelength. This is complementary to the already reported results obtained with degenerate frequency measurements. The second mechanism is a thermal diffusion of carriers which occurs during several hundreds of picoseconds. The overall dynamics at short and long delays in the whole visible spectrum is well explained with our model which shows that the main contribution to the reflectivity dynamics is due to the Drude dielectric function. The observation of this predominance of free carriers requires both a long lived high density of carriers as well as a little influence of surface scattering as provided by our thin crystalline Si layer with passivated Si/SiO2 interface.

Identifying the mechanisms of p-to-n conversion in unipolar graphene field-effect transistors

The mechanisms of p-to-n conversion and vice versa in unipolar graphene field-effect transistors (GFETs) were systematically studied using Raman spectroscopy. Unipolar p-type GFETs are achieved by decorating the graphene surface with a thin layer of titanium (Ti) film, resulting in a Raman D peak. The D peak is observed to recover by annealing the GFET in nitrogen ambient followed by silicon nitride (Si3N4) deposition, suggesting that the Ti adatoms are being partially removed. Furthermore, unipolar n-type GFETs are obtained after the passivation on p-type GFETs. The threshold voltage of the n-type GFET is dependent on the thickness of the Si3N4 layer, which increases as the thickness decreases. A comparison between the Si3N4 and SiO2 passivation layers shows that SiO2 passivation does not convert the GFET into n-type graphene, which identifies the significance of ammonia (NH3) for the formation of the n-type GFETs. This study provides an insight into the mechanism of controlling the conduction behavior of unipolar GFETs.