Sinusoidal Pulse Width Modulation Scheme Research Articles

An Improved SPWM Strategy for Effectively Reducing Total Harmonic Distortion

In the inverter circuit, the speed at which the MOSFET is impacted by the presence of a parasitic inductor within the printed circuit board (PCB) leads to a delay in the switching process. Furthermore, the parasitic inductor within the circuit can easily form an LC oscillation with the parasitic capacitor of the MOSFET. These two issues result in an inconsistency between the actual output of the MOSFET and the driving signal waveform, leading to distortion in the sinusoidal pulse width modulation (SPWM) waveform and an increase in total harmonic distortion (THD). It is a common practice to mitigate gate oscillation by introducing a resistor at the gate of the MOSFET. However, elevating the resistance leads to deceleration in the charging process of the MOSFET’s parasitic capacitor, consequently causing an increase in the switching delay, and thereby increasing THD. Therefore, an effective strategy to reduce THD is proposed in this paper, while augmenting the gate resistance, computing the MOSFET switching delay, and applying corrective compensation. In this way, the inherent issues of the switch are addressed, resulting in inverter output waveforms that closely resemble sine waves and reduced THD. Through a combination of simulation and empirical experimentation, the efficacy of the proposed approach in significantly reducing THD in the inverter’s output waveform has been empirically substantiated.

Buck–Boost DC–AC converter based on coupled inductors

In this paper, a single stage buck–boost DC–AC converter based on coupled inductors is presented for renewable energy and electric vehicle applications. The proposed topology works with only three semiconductor switches, two diodes, and three coupled inductors to transfer input DC voltage to a high gain or low gain output AC voltage. A coupled inductor is used instead of normal inductors, which will reduce core and size requirements. The sinusoidal pulse width modulation strategy is used in this paper for controlling the main switch. There are many merits in the presented topology, like high gain up to five times of input voltage, compact size, less number of components, which results in reducing the overall cost, reducing switching loss, and increasing the converter efficiency. The simulation study is carried out using MATLAB/SIMULINK to simulate the operation of the proposed converter. Also, an experimental setup is built up to examine the actual operation of the proposed converter. There is a good agreement between simulation and experimental results which increases the validation and confidence of the model.

A grey wolf optimization-based modified SPWM control scheme for a three-phase half bridge cascaded multilevel inverter

The Multilevel inverter (MLI) plays a pivotal role in Renewable Energy (RE) systems by offering a cost-effective and highly efficient solution for converting DC from Photovoltaic (PV) sources into AC at high voltages. In addition, an innovative technology holds immense significance as it not only enables the seamless integration of PV systems into the grid but also ensures optimal power generation, thereby contributing to the widespread adoption of RE and fostering a sustainable future. This paper presents a modified sinusoidal pulse width modulation (SPWM) control scheme for a three-phase half-bridge cascaded MLI-powered PV sources. The selection of the MLI configuration is motivated by its reduced number of switching components, which enhances system reliability and simplifies experimental implementation. Compared to the SPWM schemes which require (m−1) carriers that make the generation of the pulse circuit very complex, the proposed control scheme requires only three signals: a carrier signal, a triangular waveform, and a modulating signal. This approach significantly reduces the complexity of control and facilitates practical implementation. The proposed control scheme simulation is verified using MATLAB/SIMULINK Software. The grey wolf optimization (GWO) algorithm is implemented to determine the optimal switching angles of the proposed control scheme. The Total Harmonic Distortion (THD) objective is selected to be the fitness function to be minimized for improving the quality of the output waveforms. For verification, the results of the proposed GWO-based modified SPWM control scheme are compared with those obtained using both the Particle swarm Optimization (PSO) and Genetic algorithm (GA) used in the literature. Simulation results declared that the proposed control scheme improves performance, especially THD which is minimized to 6.8%. Experimental validation has been conducted by building a laboratory prototype of the proposed system. The experimental and simulation results gave acceptable and limited convergent results considering the experimental difficulties.

Asymmetrical multi‐level inverter by using space vector pulse width modulation technique for low and medium power applications

SummaryA DC to AC converter is developed in this paper. This proposes a single‐phase five‐level inverter is developed in such a way that one DC source is used. The structure of the inverter is modular and the capacitor has self‐voltage balancing capability, which eliminates the need for sensors or an additional control loop. This paper presents the schematic diagram of the proposed topology, principle of operation, and the concepts of sinusoidal pulse width modulation (SPWM) for single‐phase and space vector pulse width modulation (SVPWM) for three‐phase. To further prove the advantage, power loss, and parameter computations are calculated mathematically. Low‐voltage stress is achieved in the proposed topology because the blocking voltages of all the switches are constrained to the input voltage. A comparison table is presented between SPWM and SVPWM schemes in three‐phase inverter. The proposed asymmetrical five‐level configuration setup is constructed, and experiments are performed inside the laboratory. The controller of the converter has been implemented in the field‐programmable gate array (FPGA) platform. In order to confirm the viability of the suggested topology, experimental results are provided for single‐phase arrangement. By using the FPGA platform, real‐time implementation is done for a three‐phase inverter topology.

A Single-Stage, Multi-Port Hybrid Power Converter Integrating PV and Wind Sources for a Standalone DC System

In this paper, a hybrid PV–wind-source- based multi-port converter focused on a standalone DC system is proposed. The proposed configuration is able to perform simultaneous three-phase AC–DC conversion and DC–DC conversion, ensuring simultaneous power extraction from these combined sources. The proposed converter is a single-stage converter that enhances dependability and eliminates redundant conversion stages with regard to the earlier configurations for the hybrid PV–wind sources. The operational aspects of the proposed converter are depicted, illustrating the regulation of load voltage and load power because of the dynamic output capability of PV–wind sources. Furthermore, the comprehensive control architecture to govern the concurrent conversion operations with the generation of three-phase modulating signals and duty ratio signal in accordance with the load voltage control is elaborated. Additionally, the modified sinusoidal PWM scheme for the proposed converter is elaborated, showing the unification of three-phase modulating signals and duty ratio signal for the generation of PWM pulses which facilitates the simultaneous power conversion processes. Finally, to validate the suitability of the proposed converter, the performance of the converter under various scenarios is investigated through simulation and experimental case studies.

A Single-Stage Closed Loop Control of SC-Based Inverter

This work presents a closed loop five-Level grid-connected inverter. The inverter is based on the switched capacitor approach. The suggested architecture has a lower number of components and is able to maintain a voltage balance across the various capacitors in the system. The construction that has been presented offers a number of benefits, including the capacity to produce five-level voltage output, lower current THD, and enhanced efficiency. Additionally, leakage-current in the circuit is eliminated due to the common grounding configuration. The current injected into the grid is controlled by a PI controller. As a result, a carefully controlled current of the desired quality can be injected into the system using just one renewable energy source. In order to test the suggested topology, the level-shifted sinusoidal pulse width modulation scheme is adopted. The design of switched capacitors as well as the computation of power loss in switches is offered. The performance of this suggested inverter topology is evaluated in comparison to other topologies that are recently presented in the literature. In addition, the power losses and efficiency are calculated using thermal modeling of the topology in PLECS software. MATLAB-2018/Simulink is used to simulate and analyze the PV-connected grid system.

Application of Nanotechnology in Waste Water Treatment

In the past few years, there has been a growing concern about the pollution caused by fossil fuels, leading to a significant interest in photovoltaic power generation due to its clean and environmentally friendly features. However, suppressing leakage currents is a major problem for Non-isolated PV inverters. This paper focuses on the leakage current suppression methods, summarises three main leakage current suppression paths and systematically analyses and classifies the DC-bypass topology, the H5 topology and the Neutral Point Clamped (NPC) three-level topology. In order to address the issue mentioned above, several approaches can be taken. Firstly, a suitable sinusoidal pulse width modulation strategy is implemented. Additionally, alterations are made to the common mode impedance Z. Furthermore, efforts are made to ensure a proper match of circuit parameters. The analyses in this paper are all carried out based on bridge-type inverters to provide a reference for the study of leakage current suppression in Non-isolated Inverter. Future studies will be more efficient when similar issues arise.

Analysis and classification of Non-isolated inverter leakage currents for photovoltaic systems

In the past few years, there has been a growing concern about the pollution caused by fossil fuels, leading to a significant interest in photovoltaic power generation due to its clean and environmentally friendly features. However, suppressing leakage currents is a major problem for Non-isolated PV inverters. This paper focuses on the leakage current suppression methods, summarises three main leakage current suppression paths and systematically analyses and classifies the DC-bypass topology, the H5 topology and the Neutral Point Clamped (NPC) three-level topology. In order to address the issue mentioned above, several approaches can be taken. Firstly, a suitable sinusoidal pulse width modulation strategy is implemented. Additionally, alterations are made to the common mode impedance Z. Furthermore, efforts are made to ensure a proper match of circuit parameters. The analyses in this paper are all carried out based on bridge-type inverters to provide a reference for the study of leakage current suppression in Non-isolated Inverter. Future studies will be more efficient when similar issues arise.

Integrated Three-Level Dual-Phase Inverter

In view of reducing the number of inverter legs that provide dual-phase, three-level output voltages (as may be needed in an uninterruptible power supply), and that also provide a wide range of output frequencies (as needed in an advanced motor drive system with wide speed ranges), a three-level, dual-phase inverter topology is presented in this paper. Its three-level attribute was based on the F-type inverter topological concept, and its dual-output feature was based on the common representation of the inverter-leg concept. The proposed inverter could deliver single- and three-phase voltages to corresponding one- and three-phase loads, in common or different frequency modes of operation. A boundary between these modes of operation was established for the proposed inverter. An additional possibility of either operation in the one-phase or the three-phase system was offered by the inverter configuration. A modified carrier-based sinusoidal pulse-width modulation scheme is presented for the control of the inverter topology. The performances of the dual-phase inverter are given in the simulation results and demonstrated with a hardware prototype.

Low Switching Frequency SPWM Strategies for Open-Winding Machine With Low Current Harmonics

In this article, two novel sinusoidal pulsewidth modulation (SPWM) strategies with simple implementation are proposed for an open-winding machine fed by isolated dc-bus dual two-level three-phase inverters to reduce switching frequency and current harmonics. The proposed strategies utilize zero sequence voltage injection and unbalanced reference voltage distribution to generate discontinuous PWM with low current harmonics and less switching action. Two different zero sequence voltages are introduced in this article corresponding to two proposed PWM strategies with different switching actions in a PWM cycle. The novelty of this article is low current harmonics and less switching actions in a PWM cycle compared with the conventional SPWM strategy. Moreover, compared with the subhexagonal center PWM strategy, the proposed SPWM strategies have advantages of easy implementation and half switching commutations with the same current harmonic characteristics. The superiority of the proposed SPWM strategies is validated by simulation and experiment results.

Design of a New Duty Cycle Modulation to Improve the Energy Quality of an Insulated Production System

In this article, we propose a new strategy for controlling three-phase inverters of renewable energy sources, based on the Duty Cycle Modulatiom (DCM) control using the Park and Fortescue transformation (DCM-dq-dih). Our goals in setting and using this strategy are, on the one hand, to induce a lower harmonic rate as compared to the SPWM (Sinusoidal Pulse Width Modulation) strategy and on the other hand, this control technique enables the inverter to deliver balanced voltages, be it in the event of load unbalance. Our design is built on the basis of the known mode of DCM control of single-phase inverters. Thus, the control of our three-phase inverter is carried out by three DCM modules whose set-points come from the direct, reverse and homopolar strings reconstructed in a Park landmark. This new strategy was tested on the MATLAB Simulink environment for a load of 160 kW. The test results show a reduced Total Harmonic Distorsion (THD) of 2.7 times compared to the THD produced by the SPWM control strategy. In addition, regulation of the symmetrical components during load unbalance is ensured so that the inverter always delivers constant and balanced voltages.

A nine-switch nine-level converter new topology with optimal modulation control

<span lang="EN-US">Multilevel power converters are becoming increasingly used in several sectors: energy, grid-tie renewable energy systems, High voltage direct current (HVDC) power transmission, and a multitude of industrial applications. However, the multilevel converters consist of several drives and a high number of power switches, which leads to a considerable cost and an increased size of the device. Thus, a novel topology of a multilevel bidirectional inverter using a reduced number of semiconductor power components is proposed in this paper. Without any diode clamped or flying capacitor, only nine switches are used to generate nine voltage levels in this new topology. The proposed multilevel converter is compared with the conventional structures in terms of cost, the number of active power switches, clamped diodes, flying capacitors, DC floating capacitors, and the number of DC voltage sources. This comparative analysis shows that the proposed topology is suitable for many applications. For optimum control of this multilevel voltage inverter and to reduce switching losses in power semiconductors, a hybrid modulation technique based on fundamental frequency modulation and multi-carrier-based sinusoidal pulse-width modulation schemes is performed. The effectiveness of the proposed multilevel power converter is verified by simulation results.</span>

A Hybrid Nearest Level Combined With PWM Control Strategy: Analysis and Implementation on Cascaded H-Bridge Multilevel Inverter and its Fault Tolerant Topology

This paper presents a hybrid control strategy which combines the nearest level control technique with PWM control technique on a cascaded H-Bridge Multilevel Inverters (MLI). MLIs have become very popular due to its several advantages in the application areas like industrial drives and grid-connected renewable energy generation systems. With the reduced number of switches, driver circuits, conduction losses, switching losses, voltage stresses, size, and cost of the system, MLI has outperformed its two-level counterpart in terms of power quality issues. Reduction in the Harmonics and consequently the Total Harmonic Distortion (THD) in the output voltage has added to the benefits of MLI. Topological advancements in MLI require a satisfactory output voltage control strategy. In this work, a hybrid control strategy for a smooth and wider range of control of output voltage is proposed. The hybridized scheme enhances the control range of the voltage considerably. Moreover, the THD is also reduced compared to the conventional sinusoidal PWM scheme. A thorough analysis of the scheme has also been presented in the paper. SIMULINK/ MATLAB environment is used for testing the simulation model of the proposed control scheme. This hybridized controlling technique is also simulated for thermal modelling on PLECS software and power loss analysis is performed. The mathematical and simulation analyses are validated on an experimental prototype using a TMS320F28335 DSP controller card. The hybrid scheme has also been tested for a fault tolerant model of the cascaded H-bridge inverter. The performance of the hybrid scheme under different fault condition has also been shown to work satisfactorily.

Modelling and Simulation of an Asymmetrical Modular Multilevel Inverter with Less Number of Components

ABSTRACT This paper presents a modified topology for asymmetric modular multilevel inverter as a fundamental block. It consists of eight switches (including six bidirectional-conducting unidirectional-blocking switches and two bidirectional-conducting bidirectional-blocking switches) and four DC sources with unequal magnitudes, which generates 13-level output voltage. The proposed topology offers special features such as reduced number of switches, isolated DC sources, economical and less complexity with modular structure as compared to other contemporary topologies. Moreover, significant reduction in switch voltage can be achieved. The comparative study of proposed topologies with the conventional and recent topologies have been presented in terms of power switches, gate drivers, isolated DC voltage sources and total standing voltage on the switches. A multicarrier-based sinusoidal pulse width modulation scheme is adopted for generating the gate pulses using real-time simulation with dSPACE DS 1104. The proposed topology offers a fewer number of ON-state switches which lead to the reduction in power loss. The feasibility of proposed multilevel inverter, the simulation and experimental results are analysed under steady state and dynamic states.

A Novel Zero-Sequence Current Elimination PWM Scheme for an Open-Winding PMSM With Common DC Bus

This paper introduces a novel pulsewidth modulation (PWM) scheme for an open-winding permanent magnet synchronous machine (OW-PMSM) driven by dual two-level three-phase inverter with common dc bus, which can effectively deal with the inherent zero-sequence current (ZSC) problem. Based on the conventional symmetrical unipolar double-frequency sinusoidal PWM scheme with an appropriate phase shift, the common mode voltage (CMV) of two inverters remains same and cancel out each other to eliminate the modulated zero-sequence voltage (ZSV) disturbance source. In this case, the double-frequency effect can be retained to reduce the ac side current ripple and suppress both corresponding motor vibration and acoustic noise, which is advantageous to improve the synthetic performance of motor. The dc-bus voltage utilization of the novel PWM scheme is proved to reach the same maximum value comparing to the conventional modulated ZSV elimination scheme. Meanwhile, a zero-sequence controller is designed to suppress ZSC by further adjusting the two CMVs to counteract other zero-sequence disturbance sources. To verify the analysis, the proposed PWM technique associated with the control method is implemented in an OW-PMSM experimental setup to validate the superiority of the proposed method.

Three-Phase Symmetric Cascading Z-Source Seven Levels Multilevel Inverter Excited by Multi Carrier Sinusoidal Pulse Width Modulation Scheme

The Multilevel Z sources Inverter have been documented as attractive topologies used for elevated voltage adaptation. As the digit of levels improved, the synthesized set of steps output waveform have many ladder, imminent the preferred sine waveform but the major weakness of MLI be its amplitude of ac output voltage is imperfect to DC input sources voltage summing up. To conquer this drawback seven level cascading symmetric multilevel inverter based Z source inverter have been projected. This work focuses on different multi-carrier sinusoidal PWM scheme for the seven level three phase Z source symmetric cascading inverter. Performance parameters of seven level three phase Z source symmetric cascading inverter has been analyzed. A simulation circuit model of seven level three phase Z source symmetric cascading inverter urbanized using MATLAB/SIMULINK and its presentation have been urbanized.

Zero-Voltage-Switching Sinusoidal Pulsewidth Modulation Method for Three-Phase Four-Wire Inverter

A zero-voltage-switching (ZVS) sinusoidal pulsewidth modulation (SPWM) method for a three-phase four-wire inverter is proposed in order to achieve higher efficiency and power density. With the proposed modulation scheme, the ZVS operation of all switches, including the main switches and the auxiliary switch, can be realized. Besides, all seven switches operate at a fixed frequency. The ZVS SPWM scheme is introduced by considering the various combinations of the polarities in three-phase filter inductor currents and the analysis of operating stages is presented. ZVS condition of the ZVS SPWM scheme is derived and discussions of ZVS condition for typical three-phase loads are also provided. In addition, the resonant parameters design and loss analysis are briefly investigated. Finally, the proposed ZVS SPWM scheme is verified on a 10-kW inverter prototype with SiC mosfet devices.

A Sinusoidal Pulsewidth Modulation (SPWM) Technique for Capacitor Voltage Balancing of a Nested T-Type Four-Level Inverter

In this letter, a new control method based on the sinusoidal pulsewidth modulation scheme is proposed to control capacitor voltages of a T-type four-level nested neutral-point-clamped (NNPC) inverter. The T-type four-level NNPC inverter has a lower number of switches and components compared with other four-level classic and advanced inverters, which make this topology attractive for high-power medium-voltage applications. This topology has been proposed and studied with the assumption of constant dc sources instead of flying capacitors. In this letter, a simple single-phase modulator is developed to balance flying capacitor voltages. The performance and the feasibility of the proposed control technique are evaluated experimentally under a steady-state and transient conditions and for different modulation indexes and loads. The experimental results demonstrate the effectiveness of the developed control method to control the capacitors’ voltages.

Utilization of Self-Excited Three-Phase Induction Generator System

In this paper the analysis of a three phase self-excited induction generator system under transient and steady states with various load conditions are presented. In rare area where assumed no national grid is present, but hydro or wind energy may be available a cheap prime mover, such as micro hydro or wind turbine may be applied, which has fluctuating speed. In order to obtain self-excitation, a voltage source inverter based on sinusoidal pulse width modulation strategy has been proposed. The generated voltage and frequency are regulated by adjusting modulation index value. The value of modulation index depends also on the DC voltage level obtained from batteries or solar panels. The proposed system has been also examined without main dc power source , but with the existence of bank capacitor located at the dc link side of the inverter, in this case the generated active power should be equal to/or greater than the required active load power. DC chopper load has thus been utilized to absorb the extra active power, this will control the DC voltage across the capacitor while modulation index will control the system AC output voltage. The generated voltage waveform contains harmonic orders around and higher than the switching frequency, therefore three-phase high passive filter has been used to eliminate the harmonics effects. As a result the machine terminal voltage and frequency values are regulated and maintained constant for different types of loads at different prime mover speed cases. In all these cases, total harmonic distortion values are within the standard values.

Buck–Boost Dual-Leg-Integrated Step-Up Inverter With Low THD and Single Variable Control for Single-Phase High-Frequency AC Microgrids

To support the development of high-frequency ac microgrids in terms of compact design, high-voltage gain and low total harmonic distortion (THD), a buck–boost dual-leg-integrated step-up inverter is proposed in this paper. The inverter is formed by integrating a buck–boost converter into a conventional single-phase full-bridge inverter by sharing the upper switch and the body diode of the lower switch in both bridge-legs. Consequently, the component count is significantly reduced over the step-up inverter counterparts. In addition, to address the drawbacks of hybrid modulation methods adopted by existing dual-leg-integrated inverters, such as double-variable control, and high THD of output voltage/current at high input voltage and heavy load conditions, unipolar frequency doubling sinusoidal pulse width modulation scheme is adopted in this inverter. As a result, the modulation ratio M becomes the only control variable to regulate the output voltage/current and the control is simplified. The THD of the proposed inverter output can remain low throughout the entire input voltage range and load power range. This paper presents the topology derivation procedure, operation principle, and steady-state characteristics of the proposed inverter. To validate the effectiveness of theory, experimental results of a 400 W hardware prototype, where the output voltage frequency is at 500 Hz, are reported.