Single-electron Devices Research Articles

Electrostatically Interacting Wannier Qubits in Curved Space

A derivation of a tight-binding model from Schrödinger formalism for various topologies of position-based semiconductor qubits is presented in the case of static and time-dependent electric fields. The simplistic tight-binding model enables the description of single-electron devices at a large integration scale. The case of two electrostatically Wannier qubits (also known as position-based qubits) in a Schrödinger model is presented with omission of spin degrees of freedom. The concept of programmable quantum matter can be implemented in the chain of coupled semiconductor quantum dots. Highly integrated and developed cryogenic CMOS nanostructures can be mapped to coupled quantum dots, the connectivity of which can be controlled by a voltage applied across the transistor gates as well as using an external magnetic field. Using the anti-correlation principle arising from the Coulomb repulsion interaction between electrons, one can implement classical and quantum inverters (Classical/Quantum Swap Gate) and many other logical gates. The anti-correlation will be weakened due to the fact that the quantumness of the physical process brings about the coexistence of correlation and anti-correlation at the same time. One of the central results presented in this work relies on the appearance of dissipation-like processes and effective potential renormalization building effective barriers in both semiconductors and in superconductors between not bended nanowire regions both in classical and in quantum regimes. The presence of non-straight wire regions is also expressed by the geometrical dissipative quantum Aharonov–Bohm effect in superconductors/semiconductors when one obtains a complex value vector potential-like field. The existence of a Coulomb interaction provides a base for the physical description of an electrostatic Q-Swap gate with any topology using open-loop nanowires, with programmable functionality. We observe strong localization of the wavepacket due to nanowire bending. Therefore, it is not always necessary to build a barrier between two nanowires to obtain two quantum dot systems. On the other hand, the results can be mapped to the problem of an electron in curved space, so they can be expressed with a programmable position-dependent metric embedded in Schrödinger’s equation. The semiconductor quantum dot system is capable of mimicking curved space, providing a bridge between fundamental and applied science in the implementation of single-electron devices.

Needle in a haystack: Efficiently finding atomically defined quantum dots for electrostatic force microscopy.

The ongoing development of single electron, nano-, and atomic scale semiconductor devices would greatly benefit from a characterization tool capable of detecting single electron charging events with high spatial resolution at low temperatures. In this work, we introduce a novel Atomic Force Microscope (AFM) instrument capable of measuring critical device dimensions, surface roughness, electrical surface potential, and ultimately the energy levels of quantum dots and single electron transistors in ultra miniaturized semiconductor devices. The characterization of nanofabricated devices with this type of instrument presents a challenge: finding the device. We, therefore, also present a process to efficiently find a nanometer sized quantum dot buried in a 10 × 10 mm2 silicon sample using a combination of optical positioning, capacitive sensors, and AFM topography in a vacuum.

Analytical Modelling and Performance Characterization of Single Electron Transistor

One important component of the present nanotechnology research field is single electron transistor (SET) which has unrealized quality to operate at breakneck speeds with ultralow power consumption. The single electron transistor is a novel nanoscale switching device that can regulate the motion of a single electron in addition to maintaining its scalability down to the atomic level. In this context, scalability refers to the ability of electronic device to function better as their dimensions get smaller. The basic device properties that this single electron transistor (SET) operates on "quantized current-voltage (I-V) characteristic," "single electron tunneling effect," and "Coulomb blockade," are also covered. This study presents some of the key SET-related topics, such as modelling and simulation methods. Simulation of Nanostructures Method (SIMON) is circuit simulator for tunneling device with just a single electron device based on Monte Carlo approach. It enables simulation of any kind of circuits with voltage source, junctions in tunnels and capacitors in quasi stationary mode and transient mode. The most significant feature of SET that is applied in the research work is Coulomb blockade oscillation, so at the conclusion of this paper, a number of simulations utilizing the SIMON simulator are shown. The simulation results show that for gate capacitance CG = 2af, C∑ = 3af, IBIAS = 2nA, tunnel barrier resistance RT > 4.1KΩ and operating temperature T=21K the model reflects real SET characteristic with maximum voltage gain.

Analytical Modelling and Performance Characterization of Hybrid SET-MOS

Gordon Moore's "Moore's Law" suggests chip functionality demand doubles every 1.5-2 years, with global semiconductor technology roadmap recommending sub-nanometer ranges for IC production in nano-electronics. The single electron transistor (SET) is a promising nano-scale device that can be co-integrated with CMOS technology to improve performance. The paper explores the tunnelling effect between nanoparticles in single electron transistors (SET), revealing coulomb blockade transactions and resistance increases with reduced bias. It focuses on single electron transistors and pre-terminal devices, discussing IV characteristics, coulomb diamond plots, and metallic quantum dots. This research also explores the hybrid SET-FET based model, focusing on developing a room temperature SET in CMOS comparable technology with a Field Effect Transistor (FET). Prediction models and exploratory studies guide the integration of SET-FET technology. SIMON is a comprehensive simulator designed for single-electron devices and circuits. The output current is not impacted by capacitances up to 1 pF, and FET size in the micron range are appropriate for SET signal amplification up to 4 µA. This research explores the modelling of SET-FET technology in highlighting its ability to mitigate drawbacks in low drive current when combined with a FET. It also explores device variability mitigation in nanoscale array configurations, finding that SET-FET significantly reduces variability in larger arrays, despite the impact of capacitance and resistance.

Terahertz resonant-tunneling-diode oscillator with two offset-fed slot-ring antennas

We proposed and fabricated a terahertz resonant-tunneling-diode oscillator integrated with two offset slot-ring antennas for high-output power and high-directivity radiation. In this device, the length of the antenna, approximately half the wavelength of the oscillation frequency, enables efficient terahertz radiation. The increased radiation conductance, resulting from the offset and the two slot-ring antennas, enables higher output power. Additionally, radiation directivity can be improved by using two slot-ring antennas. The fabricated device generated high-power oscillation of 1.29 mW at 412 GHz. This is the highest output power of a single electronic device oscillator in the 400 GHz range.

A Wireless Potentiostat Exploiting PWM-DAC for Interfacing of Wearable Electrochemical Biosensors in Non-Invasive Monitoring of Glucose Level

In this paper, a wireless potentiostat code-named ElectroSense, for interfacing of wearable electrochemical biosensors, will be presented. The system is devoted to non-invasive monitoring of glucose in wearable medical applications. Differently from other potentiostats in literature, which use digital-to-analog converters (DACs) as discrete components or integrated in high-end microcontrollers, in this work the pulse width modulation (PWM) technique is exploited through PWM-DAC approach to generate signals. The ubiquitous presence of integrated PWM peripherals in low-end microcontrollers, which generally also integrate analog-to-digital converters (ADCs), enables both the generation and acquisition of read-out signals on a single cheap electronic device without additional hardware. By this way, system’s production costs, power consumption, and system’s size are greatly reduced with respect to other solutions. All these features allow the system’s adoption in wearable healthcare Internet-of-things (IoT) ecosystems. A description of both the sensing technology and the circuit will be discussed in detail, emphasizing advantages and drawbacks of the PWM-DAC approach. Experimental measurements will prove the efficacy of the proposed electronic system for non-invasive monitoring of glucose in wearable medical applications.

Characteristics of the single-electron conduction properties of randomly distributed metal nanodot arrays

Multi-dot single-electron devices (SEDs) have been fabricated using very thin Fe films by vacuum deposition on thermally oxidized or sputter-deposited SiO2 substrates. Although the SEDs fabricated on the two substrates showed very different conductance, Coulomb blockade (CB) oscillation clearly appeared in certain Fe thickness ranges for both cases. The CB oscillation changed from complex to simple with increasing Fe thickness, indicating that the decrease of the number of dots contributed to the CB oscillation. While the simple CB monotonically disappeared by the drain voltage (V D), the complex CB was robust against V D because V D distributed over the array composed of plural dots. The CB property change from complex to simple appeared in different thickness ranges for the two substrates, but in similar conductance ranges. This demonstrates that the conductance influenced by the inter-dot distance is an important factor for the CB characteristics of randomly distributed multi-dot SEDs.

Modularized Inductive Power Transfer Systems With Inherent Impedance Decoupling for High-Power Applications

Due to the capacity and costs of single power electronic devices, the modularized inductive power transfer systems (MIPT) are widely used in high-power electronic applications. To achieve safe and efficient operation of high-power IPT technology, this paper proposes a modularized topology design method with inherent impedance decoupling feature. When the module number changes, the current and voltage stresses of the devices in the proposed system remain unchanged inside modules at the rated power. Moreover, the impedance of any module will not be affected by neighboring modules, especially in cases where the module number may change abruptly. Such a desired feature significantly improves the reliability of high power IPT systems. A 15 kW MIPT prototype with 3 modules connected in parallel is implemented to verify the validity of the proposed method. The result clearly shows that both the impedance and device stress are decoupled with the module number. The system exhibits peak efficiency of 95.1% and over 92.4% when the power is between 2kW and 15kW.

Universality and Multiplication of Gigahertz-Operated Silicon Pumps with Parts Per Million-Level Uncertainty.

The universality of physical phenomena is a pivotal concept underlying quantum standards. In this context, the realization of a quantum current standard using silicon single-electron pumps necessitates the verification of the equivalence across multiple devices. Herein, we experimentally investigate the universality of pumped currents from two different silicon single-electron devices which are placed inside the cryogen-free dilution refrigerator whose temperature (mixing chamber plate) was ∼150 mK under the operation of the pump devices. By direct comparison using an ultrastable current amplifier as a galvanometer, we confirm that two pumped currents are consistent with ∼1 ppm uncertainty. Furthermore, we realize quantum-current multiplication with a similar uncertainty by adding the currents of two different gigahertz (GHz)-operated silicon pumps, whose generated currents are confirmed to be identical. These results pave the way for realizing a quantum current standard in the nanoampere range and a quantum metrology triangle experiment using silicon pump devices.

Correlation of ventricular pacing burden and left ventricular function in patients with heart failure with reduced ejection fraction.

Pacemaker-induced cardiomyopathy is a well described phenomenon in patients with preserved ejection fraction at the time of permanent pacemaker implant. One of the identified risk factors for pacemaker-induced cardiomyopathy is the degree of ventricular pacing burden. However, it is unclear how a high right ventricular pacing burden affects patients with depressed left ventricular function at the time of pacemaker implantation. We sought to assess the relationship between right ventricular pacing and change in left ventricular function over time. We conducted an analysis of all patients who had received either a single or dual lead cardiac implantable electronic devices, excluding biventricular devices, and had a prior transthoracic echocardiogram demonstrating an ejection fraction of less than 50%. The primary end-point was the correlation between the percentage of ventricular pacing and the change in LV ejection fraction. Fifty eight patients with preceding heart failure had pacemakers implanted and had follow up echocardiograms. There was no correlation between the degree of ventricular pacing and the absolute change in LV function (r = .04, p = .979). None of the previously identified risk factors for pacemaker induced cardiomyopathy were predictive of a significant fall in ejection fraction. The degree of RV pacing and other established risk factors for pacemaker-induced cardiomyopathy in patients with normal left ventricular function at the time of implantation do not appear to carry the same risk in patients with pre-existing heart failure who receive either single or dual lead pacemakers.

Electron and Spin Delocalization in [Co6 Se8 (PEt3 )6 ]0/+1 Superatoms.

Molecular clusters can function as nanoscale atoms/superatoms, assembling into superatomic solids, a new class of solid-state materials with designable properties through modifications on superatoms. To explore possibilities on diversifying building blocks, here we thoroughly studied one representative superatom, Co6 Se8 (PEt3 )6 . We probed its structural, electronic, and magnetic properties and revealed its detailed electronic structure as valence electrons delocalize over inorganic [Co6 Se8 ] core while ligands function as an insulated shell. 59 Co SSNMR measurements on the core and 31 P, 13 C on the ligands show that the neutral Co6 Se8 (PEt3 )6 is diamagnetic and symmetric, with all ligands magnetically equivalent. Quantum computations cross-validate NMR results and reveal degenerate delocalized HOMO orbitals, indicating aromaticity. Ligand substitution keeps the inorganic core nearly intact. After losing one electron, the unpaired electron in [Co6 Se8 (PEt3 )6 ]+1 is delocalized, causing paramagnetism and a delocalized electron spin. Notably, this feature of electron/spin delocalization over a large cluster is attractive for special single-electron devices.

Abstract 12595: Vascular and Cardiac Ultrasound as the Primary Imaging Tool to Safely Deliver Pacing Leads While Implanting Single Chamber Cardiac Implantable Electronic Devices. RADICAI USE Investigators

Introduction: Conventional Cardiac implantable electronic devices (CIEDs) implantation requires fluoroscopy. Risks involved with implantation include pneumothorax, lead dislodgement, and perforation of the right ventricular wall. In addition, there are long-term risks of malignancy associated with prolonged and repeated use of radiation over the decades of operators’ employment and mechanical injuries related to heavy personal protection equipment. To reduce these risks, we aimed to study the utilization and safety of ultrasound (US) for the entire procedure to implant single-chamber devices. Methods: The RADICAI USE study (Reduction or Elimination of Radiation Use in Single Chamber Cardiac Devices using ultrasound) is a prospective, single-arm and multi-operator case series enrolled patients awaiting a single-chamber CIED. A fluoroscopic cut-off time of 20 seconds was used to define the success (Group A) or failure (Group B) of using the US for the entire implant duration. Patients were followed up at 1 week, 1 month and 1-year post-implant. Results: The study enrolled 63 patients, with 50 pacemakers and 13 ICDs, a mean age of 79.5 ± 13.8 years (95% CI = 76.1 - 82.9), and a mean weight of 74.1 ± 14.6 (95% CI = 70.5 - 77.7). Overall, 53 (84.1%) CIEDs were successfully implanted with a radiation time of less than 20 seconds (Group A). Fluoroscopic over 20 seconds was required due to poor echocardiographic windows, challenging access, or anatomy. No iatrogenic new or worsening of tricuspid regurgitation was noted. The mean procedure time including US setup time was 65.2 ± 20.2 (95% CI = 60.2 -70.2) minutes. Fluoroscopic time was significantly reduced in Group A compared to Group B (5.8 ± 4.5s vs 109.5 ± 92.9s, p = 0.004). Follow-up showed no device-related complications, with only two patients requiring lead revisions due to poor sensitivity, one unrelated to US use and another probably related. Conclusions: US-guided implantation of single-chamber CIEDs is feasible and safe, reducing the need for fluoroscopic guided implantation and subsequent risks of higher radiation exposure. Further studies are required to evaluate the cost-effectiveness and to explore fluoroscopic-free single-chamber CIED implantations using the US.

Graphene/aluminum oxide interfaces for nanoelectronic devices

In this work, we study theoretically and experimentally graphene/aluminum oxide interfaces as 0D/2D interfaces for quantum electronics as the nature of the interface is of paramount importance to understand the quantum transport mechanism. Indeed, the electronic transport is driven either by a channel arising from a strong hybridization at the interface, or by tunneling across a van der Waals interface, with very different electric characteristics. By combining electronic spectroscopy and scanning microscopy with density functional theory calculations, we show that the interface is of weak and van der Waals nature. Quantum transport measurements in a single electron transistor confirm this result. Our results provide a first insight into the interfacial properties van der Waals materials based single electron device, and the key role played by the control of the interface states. The weak van der Waals coupling reported is promising for single electron device, where the control of the environmental charges is known to be a key challenge towards applications. Moreover, the unique vertical device architecture, enabled by the dual role of graphene including its vertical electric field transparency, opens the doors for a new class of single electron devices with higher scaling capability and functionalities. This work paves the way to new atomic environment control in single electron device.

Moiré Synaptic Transistor for Homogeneous-Architecture Reservoir Computing

Reservoir computing has been considered as a promising intelligent computing paradigm for effectively processing complex temporal information. Exploiting tunable and reproducible dynamics in the single electronic device have been desired to implement the “reservoir” and the “readout” layer of reservoir computing system. Two-dimensional moiré materials, with an artificial lattice constant many times larger than the atomic length scale, are one type of most studied artificial quantum materials in community of material science and condensed-matter physics over the past years. These materials are featured with gate-tunable periodic potential and electronic correlation, thus varying the electric field allows the electrons in the moiré potential per unit cell to exhibit distinct and reproducible dynamics, showing great promise in robust reservoir computing. Here, we report that a moiré synaptic transistor can be used to implement the reservoir computing system with a homogeneous reservoir-readout architecture. The synaptic transistor is fabricated based on an h-BN/bilayer graphene/h-BN moiré heterostructure, exhibiting ferroelectricity-like hysteretic gate voltage dependence of resistance. Varying the magnitude of the gate voltage enables the moiré transistor to switch between long-term memory and short-term memory with nonlinear dynamics. By employing the short- and long-term memories as the reservoir nodes and weights of the readout layer, respectively, we construct a full-moiré physical neural network and demonstrate that the classification accuracy of 90.8% can be achieved for the MNIST (Modified National Institute of Standards and Technology) handwritten digits database. Our work would pave the way towards the development of neuromorphic computing based on moiré materials.

Performance Analysis of an Efficient Router using X Y Algorithm

As more and more functions are expected to be performed by a single electronic device (such as a smartphone, smart television, etc.), the need to have more and more components on SoC is increasing, posing new difficulties for NoC. The majority of NoC designs utilise mesh, torus, or other topologies to ensure a robust router. Most solutions, however, fall short when it comes to addressing key issues like throughput, area overhead, and latency, as well as QoS and congestion. The current paper proposes a concept for a reconfigurable router that can be used in No C settings. For the suggested router's design, we use Verilog, formal language for describing hardware (Verilog HDL). The four-channel router presented here has an east-west-north-south orientation and a crossbar switch connecting the two pairs of channels. Each channel consists of a multiplexer and a FIFO buffer. The input and output are handled by multiplexers, and the data is stored in FIFO buffers. The FIFO and multiplexer architectures for the south channel are developed initially. Afterwards the remaining three channels and the crossbar switch are made. Routers use channels, FIFO buffers, multiplexers, and crossbar switches in their overall design. Simulating the proposed design in Modelsim and obtaining the RTL view in Xilinx ISE 14.0 are the two primary methods of approaching this problem. The suggested reconfigurable router's power consumption is greatly reduced by employing the Power gating technique.. The XPower Analyzer application is used to determine the total power. As demonstrated by the findings obtained, the proposed design uses less energy than conventional reconfigurable routers.

Restriction of residual defects of indium phosphide nanowires: Integration into single nanowire electronic device and gas sensing

Indium phosphide nanowires (InPNWs) with an average diameter size of 87 nm were successfully synthesised through thermal chemical vapour deposition (CVD) method. The InPNWs were synthesised by reacting indium metalloid and red phosphorus at 600 °C. They were synthesised possessing residual stress defects such as stacking faults. However, in this study we demonstrated how to control the generation and distribution of these defects by using indium metalloid catalyst and a modified synthesis technique. The synthesis technique was optimised to control the crystal structure, morphology, and size distribution. A single indium phosphide nanowire back-gated electronic device was fabricated using electron beam lithography. The device had resistivity of 50 Ω.cm, which confirmed that the electrical properties of indium phosphide nanowire was intact despite the presence of residual defects. The InPNWs were tested for gas sensing, and they were found to have response time of 320 s for nitric oxide gas (NO2)

Revolutionizing ECG interpretation with AI-powered universal smartphone technology

To connect digital and physical devices a highly connected global network is termed as Internet. The objective of internet is extended by Internet of Thing (IoT) by connecting devices from different domain. Millions of devices are used for information collection and communication in IoT. Integration of nanotechnology with IoT termed as Internet of Nano Things (IoNT) and plays an Important role in growth of compact devices. The requirement of feature and functionality in compact, handheld and battery operated devices increasing day by day. The battery life is an important factor for these devices. The battery life of these devices can be increased by reducing the power consumption. Single electron devices can play an important role in limiting the power consumption of these devices. In this paper a Si dot Single Electron Transistor is designed with nano scale channel length. Si dot is placed between gate and island to improve electrical properties of device. The characteristics of Si dot SET is compared with a SET without Si dot and capacitance is calculated for both the devices. It is found that device with Si dot possess higher charging energy so it is capable of room temperature operation. This paper also discusses the role of nano devices in IoNT as well as application areas and challenges of IoNT.

Si dot single electron transistor for Internet of nano things

To connect digital and physical devices a highly connected global network is termed as Internet. The objective of internet is extended by Internet of Thing (IoT) by connecting devices from different domain. Millions of devices are used for information collection and communication in IoT. Integration of nanotechnology with IoT termed as Internet of Nano Things (IoNT) and plays an Important role in growth of compact devices. The requirement of feature and functionality in compact, handheld and battery operated devices increasing day by day. The battery life is an important factor for these devices. The battery life of these devices can be increased by reducing the power consumption. Single electron devices can play an important role in limiting the power consumption of these devices. In this paper a Si dot Single Electron Transistor is designed with nano scale channel length. Si dot is placed between gate and island to improve electrical properties of device. The characteristics of Si dot SET is compared with a SET without Si dot and capacitance is calculated for both the devices. It is found that device with Si dot possess higher charging energy so it is capable of room temperature operation. This paper also discusses the role of nano devices in IoNT as well as application areas and challenges of IoNT.

Non-equilibrium thermodynamics in a single-molecule quantum system

Thermodynamic probes can be used to deduce microscopic internal dynamics of nanoscale quantum systems. Several direct entropy measurement protocols based on charge transport measurements have been proposed and experimentally applied to single-electron devices. To date, these methods have relied on (quasi-)equilibrium conditions between the nanoscale quantum system and its environment, which constitutes only a small subset of the experimental conditions available. In this paper, we establish a thermodynamic analysis method based on stochastic thermodynamics, that is valid far from equilibrium conditions, is applicable to a broad range of single-electron devices and allows us to find the difference in entropy between the charge states of the nanodevice, as well as a characteristic of any selection rules governing electron transfers. We apply this non-equilibrium entropy measurement protocol to a single-molecule device in which the internal dynamics can be described by a two-site Hubbard model.

Top-Gate Transparent Organic Synaptic Transistors Based on Co-Mingled Heterojunctions

The rapid development of electronics and materials science has driven the progress of various electronic devices, and the new generation of electronic devices, represented by wearable smart products, has introduced transparent new demands on the devices. The ability of biological synapses to enhance or inhibit information when it is transmitted is thought to be the biological mechanism of artificial synaptic devices. The advantage of the human brain over conventional computers is the ability to perform efficient parallel operations when dealing with unstructured and complex problems. Inspired by biologically powerful neural networks, it is important to simulate biological synaptic functions on a single electronic device, and organic artificial synaptic transistors are artificially intelligent and very suitable artificial synaptic devices. Therefore, this paper proposes an organic artificial synaptic transistor with transparency (≥75%), provides a new solution for transparent top-gate synapses, and shows their promise for the next generation of organic electronics.