Single-chip Digital Signal Processor Research Articles

Design and control of a brushless DC limited-angle torque motor with its application to fuel control of small-scale gas turbine engines

This paper presents techniques for design and control of a brushless direct-current (DC) limited-angle torque motor (LATM) with its application to fuel control of gas turbine engines. Given the desired specifications, a two-pole brushless DC LATM with a toroidally wound armature is designed using selected ferromagnetic material and rare-earth permanent magnets; its electromagnetic characteristics is then computationally found and well tuned using the finite element method (FEM) in order to ensure whether the design meets the performance specifications. To achieve the simple and inexpensive semi-closed-loop fuel control, a robust position controller (including a proportional-integral-derivative (PID) controller with a prefilter) is synthesized for providing the required positioning performance for the developed motor, thereby achieving an inexpensive semi-closed-loop fuel control. A closed-loop fuel controller associated with the proposed position controller and a flow meter is then proposed based on multi-loop control structure in order to achieve required linear input–output relationship. All the proposed fuel control laws were implemented using a stand-alone single-chip digital signal processor (DSP). Experimental results are conducted to show the efficacy and usefulness of the developed limited-angle torque motor with its application to an experimental gas turbine fuel control test platform.

AN EFFICIENT DESIGN FOR MOTION-JPEG2000 SYSTEM IN REAL-TIME VIDEO ENCODING

Motion-JPEG2000 is derived from Part 1 of the JPEG2000 standard and provides high quality image compression in video coding system. This paper presents a real-time Motion-JPEG2000 encoding which is built on a fixed-point digital signal processor (DSP) as a single-chip implementation. The design addresses on the system-level design considerations. Among several modules in JPEG2000, Embedded Block Coding with Optimized Truncation (EBCOT) algorithm contains the highest computation complexity and also becomes the bottleneck of JPEG2000. Two speed-improved methods are proposed to significantly reduce the processing time of EBCOT. The fast algorithm is used by processing the three coding passes in sequential and is very suitable to the execution on programming-based processor. For Motion-JPEG2000 implementation, a real-time encoding system is built on the single-chip DSP processor without any extra hardware support. The optimization techniques are also applied to enhance the performance. Due to the contribution on algorithm and implementation issue, the complexity of Motion-JPEG2000 is largely reduced. Simulation results show that the proposed system can process 30 frames per second in CIF size (352 × 288 pixels) with 4:2:0 video sequences. For SDTV size resolution (760 × 480 pixels), the system can achieve near 20 frames per second.

A method of tracking the peak power points for a variable speed wind energy conversion system

In this paper, a method of tracking the peak power in a wind energy conversion system (WECS) is proposed, which is independent of the turbine parameters and air density. The algorithm searches for the peak power by varying the speed in the desired direction. The generator is operated in the speed control mode with the speed reference being dynamically modified in accordance with the magnitude and direction of change of active power. The peak power points in the P-/spl omega/ curve correspond to dP/d/spl omega/=0. This fact is made use of in the optimum point search algorithm. The generator considered is a wound rotor induction machine whose stator is connected directly to the grid and the rotor is fed through back-to-back pulse-width-modulation (PWM) converters. Stator flux-oriented vector control is applied to control the active and reactive current loops independently. The turbine characteristics are generated by a DC motor fed from a commercial DC drive. All of the control loops are executed by a single-chip digital signal processor (DSP) controller TMS320F240. Experimental results show that the performance of the control algorithm compares well with the conventional torque control method.

Synchronous-frame harmonic control for high-performance AC power supplies

In order to achieve the reduction of voltage distortion in AC power supplies (ACPSs), this paper describes an implementation of synchronous-frame control for selected frequencies in the output voltage. The regulation of the fundamental output voltage, as well as that of some low-order harmonics, is achieved using a synchronous-frame controller for each selected frequency in addition to a conventional control. The conventional part conserves good dynamic performance under load changes, while rotating-frame controllers allow a slow, but very precise compensation of the residual errors within the assumption that the harmonics produced by distorting load are slowly varying. Moreover, motivated by a fixed-point implementation, a set of refinements and modifications of the original scheme is proposed, allowing a reduction of signal processing requirements and a new control algorithm structure less sensitive to quantization and rounding errors. This solution is particularly effective for high-power fully digitally controlled ACPSs, where the voltage loop bandwidth is usually not large enough to provide regulation at harmonic frequencies. The proposed control scheme has been implemented using a fixed-point single-chip digital signal processor (ADMC401 by Analog Devices). Experimental results on a 3-kVA three-phase converter prototype show the effectiveness of the proposed approach.

Single integrated DSP with TBC for camera/recorders

We have developed a single chip DSP (digital signal processor) for camera/recorders with low cost and high picture quality. We realized an internal TBC (time base corrector) essential for outputting a digital picture signal recorded on a tape as an analog format. This DSP also features the digital interface based on ITU-R BT.656.

Adaptive repetitive control of PWM inverters for very low THD AC-voltage regulation with unknown loads

An adaptive repetitive control scheme is proposed and applied to the control of a pulsewidth-modulated (PWM) inverter used in a high-performance AC power supply. The proposed control scheme can adaptively eliminate periodic distortions caused by unknown periodic load disturbances in an AC power supply. The proposed adaptive repetitive controller consists of a voltage regulator using state feedback control, a repetitive controller with tuning parameters and an adaptive controller with a recursive least-squares estimator (LSE). This adaptive repetitive controller designed for AC voltage regulation has been realized using a single-chip digital signal processor (DSP) TMS320C14 from Texas Instruments. Experimental verification has been carried out on a 2 kVA PWM inverter. Simulation and experimental results show that the DSP-based adaptive repetitive controller can achieve both good dynamic response and low total harmonic distortion (THD) under large-load disturbances and uncertainties.

DSP-based system for real-time video communications

This article describes the architecture of a digital signal processor (DSP)-based real-time video communications system and the implementation of the ITU-T H.263 video coding standard on the system. The system incorporates a Texas Instruments TMS320C80 Multimedia Video Processor (MVP), a high-performance, single-chip multiprocessor-based DSP that is optimized for image and video operations. Our implementation of the ITU-T H.263 is optimized to make full use of the special features of the TMS320C80 MVP. The various related processing tasks have been efficiently distributed on the parallel processing elements within the TMS320C80 MVP. © 1999 John Wiley & Sons, Inc. Int J Imaging Syst Technol 10: 47–53, 1999

Fuzzy-tuning current-vector control of a three-phase PWM inverter for high-performance AC drives

This paper proposes a new discrete fuzzy-tuning current-vector control (FTC) scheme for three-phase pulsewidth modulation (PWM) inverters. The proposed current control scheme can achieve fast transient responses and, at the same time, have very low total harmonic distortion in output current during steady-state operation. The proposed FTC scheme generates quasi-optimum PWM patterns by using a closed-loop control technique with instantaneous current feedback. The proposed FTC scheme has been realized using a single-chip digital signal processor (TMS320C14) from Texas Instruments. Experimental results are given to verify the proposed fuzzy-tuning current control strategy for three-phase PWM inverters.

Full control of a PWM DC-AC converter for AC voltage regulation

The design and implement action of a DSP-based fully digital-controlled single-phase pulsewidth modulated (PWM) dc-ac converter for ac voltage regulation is described. The proposed multiloop digital controller (MDC) consists of a current controller, a voltage controller, and a feedforward controller. This MDC was realized using a single-chip digital signal processor (DSP). The PWM gating signals are determined at every sampling instant by the proposed multiloop digital control scheme using a set of detected feedback signals. A software current control; scheme has been developed to achieve fast current control of the PWM inverter and decouple the inductor of the output filter. Experimental results have been given to verify the proposed digital control scheme. The constructed DSP-based PWM dc-ac converter system can achieve fast dynamic response and with low total harmonic distortion (THD) for rectifier type of loads.

High-performance programmable AC power source with low harmonic distortion using DSP-based repetitive control technique

This paper proposes a new control scheme based on a two-layer control structure to improve both the transient and steady-state responses of a closed-loop regulated pulse-width-modulated (PWM) inverter for high-quality sinusoidal AC voltage regulation. The proposed two-layer controller consists of a tracking controller and a repetitive controller. Pole assignment with state feedback has been employed in designing the tracking controller for transient response improvement, and a repetitive control scheme was developed in synthesizing the repetitive controller for steady-state response improvement. A design procedure is given for synthesizing the repetitive controller for PWM inverters to minimize periodic errors induced by rectifier-type nonlinear loads. The proposed control scheme has been realized using a single-chip digital signal processor (DSP) TMS320C14 from Texas Instruments. A 2-kVA PWM inverter has been constructed to verify the proposed control scheme. Total harmonic distortion (THD) below 1.4% for a 60-Hz output voltage under a bridge-rectifier RC load with a current crest factor of 3 has been obtained. Simulation and experimental results show that the DSP-based fully digital-controlled PWM inverter can achieve both good dynamic response and low harmonics distortion.

DSP-based robust control of an AC induction servo drive for motion control

A design method based on the internal model control (IMC) theory has been developed for the robust control of a low-power AC induction servo drive in application of high-performance motion control systems. Indirect vector control with software current control technique has been developed to achieve fast response decoupling control of the induction motor. An equivalent model representing the control dynamics of the decoupled AC induction motor is used for the analysis and synthesis of the IMC controller. To improve the control performance of the servo drive with given frequency-domain robustness specifications, a design procedure for the servo controller is developed based on the IMC theory. The proposed control scheme has been realized using the Texas Instruments TMS320C14 single-chip digital signal processor. Experimental results are given to verify the proposed design method.

An adaptive pole-shifting algorithm and its implementation for reference tracking of a DC drive using a DSP chip

A strategy for the design of a single-input and single-output self-tuning controller for reference-signal tracking is described in this paper. An existing algorithm for shifting the closed-loop poles radially towards the origin in the z-domain for regulation has been utilized for reference-signal tracking, by combining it with a well-known control law. The use of a self-searching pole-shifting technique increases the flexibility of the strategy when applied to varying operating conditions encountered in various industrial applications. A self-tuning controller has been implemented using a single-chip digital signal processor (DSP). The result is a reduction of system hardware, cost and calculation time.

A DSP-based power integrated circuit controller/driver board for stepper motors

This article proposes the use of a DSP56001 digital signal processor in a multi-axis controller for stepper motors. Traditionally, these controllers have been based on microprocessors or special purpose integrated circuits. The proposed technique was implemented using the DSP56001 board from Motorola, and 32 stepper motors of various types. There are three innovative aspects of this work. First, the proposed controller was implemented using a single-chip digital signal processor (DSP). Second, the number of power driver integrated circuits was drastically reduced. This improvement reduced the cost and power consumption of the controller, and also improved its reliability. Finally, this concept can be expanded to simultaneously and independently control hundreds of motion devices such as stepper motors, D.C. motors, relays and solenoids.

Implementation of self-tuning algorithms for reference tracking of a DC drive using a DSP chip

This paper describes the implementation of two self-tuning control algorithms for the speed control of a permanent magnet DC motor. The algorithms minimize a cost function incorporating system input, output, and set-point variation for reference tracking. Variable forgetting factor using data normalization with constant trace has been utilized. Self-tuning controllers have been implemented using a single-chip digital signal processor (DSP). It results in reduction of system hardware, cost, and calculation time.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Use of a single chip fixed-point DSP for multiple speech channel vocoders

In this paper, the use of an advanced digital signal processor (DSP) makes possible the parallel real-time implementation of more than one speech coder on a single-chip DSP. Thus, many speech channels can share a single digital communications channel at low cost. Besides the hardware requirements, the algorithms' implementation is considered for multi-channel single-pitch excited LPC vocoders. The Motorola DSP56000/DSP56001 is selected and the execution times are presented. A variable length coding scheme for reduced bit-rate is also described. Up to 10 vocoders are simultaneously implemented on a single DSP and the algorithms can be used as the basis for the implementation of more sophisticated speech coders.

DIGITAL SIGNAL PROCESSOR-BASED INVESTIGATION OF CHUA'S CIRCUIT FAMILY

This paper is concerned with exploiting the architecture of a single-chip digital signal processor for integrating piecewise-linear ODEs. We show that DSPs can be usefully applied in the study of Chua's circuit family provided that one chooses a multistep integration algorithm which exploits their unique single-instruction multiply-and-accumulate feature.

A real-time NMR image reconstruction system using echo-planar imaging and a digital signal processor

A real-time NMR image reconstruction system using echo-planar imaging (EPI) and a single-chip digital signal processor (TMS320C30) has been developed. The image reconstruction time for one 64*64-pixel image is about 50 ms. This system has achieved image refresh intervals of less than 100 ms for 64*64 pixel images using the EPI sequence with a data acquisition time of about 40 ms. An experiment performed using a sphere falling through static water has demonstrated that this system is a powerful tool for interactive observation of unsteady phenomena for long periods.

An adaptive controller for a direct-drive SCARA robot

A direct adaptive controller for trajectory tracking of high-speed robots such as a direct-drive SCARA robot is presented. In this robot, nonlinear effects due to centrifugal, Coriolis, and inertial forces are more important than friction and gravity forces, unlike most industrial robots. The control law of the adaptive scheme consists of a PD regulator plus feedforward compensation of full dynamics. The feedforward terms are adjusted by an adaptation law so that the steady-state position errors are zero. With this adaptive controller, the joint acceleration measurement is not required and no inversion of the estimated mass matrix is involved. The tracking performances of the controller applied to a two-degree-of-freedom SCARA is illustrated by a real-time implementation based on a single-chip digital signal processor (DSP). >

Evaluation of digital speech coding strategies for the Nucleus 22-electrode cochlear implant.

Two new processing strategies have been implemented on a cochlear implant digital speech processor (CIDSP) for the Nucleus 22-electrode cochlear prosthesis using a single chip digital signal processor (TMS320C25, Texas Instruments). The first approach, pitch excited sampler (PES), is based on the classical channel vocoder concept whereby the spectral energy of a number of logarithmically spaced frequency bands is transformed into appropriate electrical stimulation parameters for up to 22 electrodes using a voice pitch synchronous pulse rate at any electrode. The second approach, continuous interleaved sampler (CIS), uses a maximally high pitch-independent stimulation pulse rate on a selected number of electrodes. Optimization and fine-tuning of processing parameters for these coding strategies is based on a number of psychophysical experiments and some additional constraints. Evaluation experiments with seven cochlear implant users resulted in significantly improved performance in consonant identification tests with the new processing strategies as compared with the subjects own wearable speech processors whereas improvements in vowel identification tasks were rarely observed. Scores were strongly dependent on carefully selected modifications of the basic PES- and CIS-strategies. [Work supported by the Swiss National Research Foundation.]

Long pipelines in single-chip digital signal processors-concepts and case study

The effectiveness of long pipelines in single-chip digital signal processors for complex algorithms was studied using a processor model with 25 pipeline stages. The processor is based on a Harvard architecture. Pipelining is used to reduce the instruction cycle time compared to current signal processors. Key features of the processor model are data-stationary pipeline control, local resolution of pipeline hazards with buffering, multiple branch prediction, a mixed relative-incremental addressing scheme, and asynchronous communication between pipeline and environment. The processor is implemented as a software model. The results show that high pipeline utilization can be achieved for a variety of algorithms leading to a significantly higher performance than achieved by conventional single-chip signal processors with Harvard architecture. >