Simplified Space Vector Pulse Width Modulation Research Articles

A seven-level cascaded multilevel inverter based on simplified SVPWM method

The multilevel converters are extremely widespread alternatives within megawatt power level as well as medium voltage level applications due to their excellent execution than the typical two-level converters. The widely applied control strategies aimed at inverters are Sine Pulse Width Modulation (SPWM) and Space Vector Pulse Width Modulation (SVPWM) strategies. In between these two PWM methods, the SVPWM strategy has excellent execution as compared to the SPWM strategy as a result of improved DC link voltage use as well as a decrease in Total Harmonic Distortion (THD) in output voltages. A traditional SVPWM strategy owns numerous weaknesses like computational complications in terms of identification of the reference voltage vector position, to identify sector, triangle and also it requires large memory for storing look up tables used for switching vectors. This paper presents, an innovative modified SVPWM strategy aimed at Cascaded H-Bridge Multilevel Inverter (CHBMLI). The novel modified SVPWM strategy has overwhelm the downsides of traditional SVPWM strategy. A seven-level CHBMLI is used for the implementation of this simplified SVPWM method to assess performance and as well to made comparison with the SPWM strategy. A MATLAB software is used for the simulation.

A Simplified Space Vector Pulse Width Modulation Algorithm of a High-Speed Permanent Magnet Synchronous Machine Drive for a Flywheel Energy Storage System

A space vector pulse width modulation (SVPWM) algorithm is an important part of the permanent magnet synchronous machine (PMSM) drive to achieve direct current (DC) to alternating current (AC) conversion. The execution of the conventional SVPWM algorithm is a complex process which will limit the sampling frequency of the high-speed PMSM drive. Low sampling frequency will cause high current total harmonic distortion (THD) and eddy current loss. To increase the sampling frequency, this paper proposes a novel simplified SVPWM algorithm. The proposed SVPWM algorithm turns the vector composition problem of the conventional SVPWM algorithm into an optimization problem of the dwell time of the basic vector. The proposed SVPWM algorithm has an optimal vector dwell time (OVDT). The dwell time of the basic vector can be directly calculated by solving the optimization problem. The proposed SVPWM algorithm does not need sector identification compared to the conventional algorithm. The experiments of the proposed SVPWM algorithm are performed in a high-speed PMSM drive of a flywheel energy storage system (FESS). Compared to the conventional SVPWM algorithm, the execution time of the proposed SVPWM algorithm is reduced by 38%. By using the proposed SVPWM algorithm, the sampling frequency can be increased from 33 kHz to 40 kHz. With the higher sampling frequency, the current THD is reduced by 25.6%. The effectiveness of the proposed simplified SVPWM algorithm is verified experimentally.

A Simplified and Generalized SVPWM Scheme for Two-Level Multiphase Inverters With Common-Mode Voltage Reduction

Multiphase space vector pulsewidth modulation (SVPWM) method has gained much attention with the growing interest in multiphase motor drives. Conventional multiphase SVPWM becomes more complex with the increase of phases, while simplified multiphase SVPWM is required for industrial applications. In addition, common-mode voltage (CMV) is the main cause of motor bearing damage and winding insulation breakdown for electrical drives. In this article, a simplified and generalized SVPWM method with CMV reduction is proposed for multiphase drives. The proposed SVPWM is intuitive and universal for arbitrary two-level multiphase inverters with odd phases, and CMV is restricted within ± <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dc</sub> /2 <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i> ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i> is phase number). Experimental results verify theoretical analysis and effectiveness of the proposed method.

Simplified SVPWM-based SoC balancing strategy for three-phase cascaded H-bridge multilevel converter in off-grid energy storage systems

This paper proposes a state of charge (SoC) balancing strategy based on the simplified multilevel space vector pulse width modulation (SVPWM) for cascaded H-bridge multilevel converter (CHMC) in off-grid energy storage systems (ESS). The simplified multilevel SVPWM selects base voltage vectors and mathematically represents the base voltage vectors and their switching state combinations, which will ensure high expansibility and low complexity of the proposed strategy. Base on the simplified multilevel SVPWM, the clustered balancing of the proposed strategy is realized by directly calculating the switching state combinations with an introduced SoC balancing speed factor, while the individual balancing is achieved by using a SoC balancing influence operator. In addition, the “clockwise-counterclockwise circulation” is provided to adjust the sequence of voltage vectors, which reduces the switching loss in ESS. The superior features of the proposed strategy in balancing speed, voltage waveform and efficiency are confirmed by simulations and experiments.

A simplified SVPWM method for cascaded multilevel inverters

A highly popular alternative in medium voltage and high-power applications is multilevel converters because of their superior performance over conventional two-level converters. The most commonly used control methods in the case of multilevel inverters are sine pulse width modulation (SPWM) and space vector pulse width modulation (SVPWM) methods. Among these two control strategies, SVPWM has superior performance over SPWM in terms of DC bus voltage utilization along with a reduction in total harmonic distortion (THD) of line voltages. The classical SVPWM method has various drawbacks such as computational complexity for identifying the location of reference voltage vector, sector identification, region identification, memory requirement to store lookup tables for switching vectors. The novel simplified SVPWM technique is presented for cascaded H-Bridge multilevel inverter (CHBMLI) in this paper. This simplified SVPWM method has overcome the drawbacks of the classical SVPWM method. This new technique has been implemented into a five-level CHBMLI to evaluate performance and also to compare with the SPWM method. The simulation has been performed in MATLAB software.

Amplitude Sampled Reference-Based Space Vector Pulse Width Modulation for Control of Voltage Source Converters

Memory, speed, reliability, and efficiency are the main characteristics of concern in new contemporary control techniques of electric power converters. Space vector pulse width modulation (SVPWM) is a widespread digital compute-intensive control technique used in the control of power converters. This study aims to overcome the large number of calculations needed by the SVPWM algorithm, which limits its implementation in many advanced industrial applications. This paper presents a low-cost software implemented simplified SVPWM technique. The proposed strategy generates the inverter switching times in a straightforward manner with no need for complicated and time-consuming sector identification and look-up switching tables. A simulation study has been done using MATLAB/SIMULINK environment for the three-phase voltage source converter (VSC). The results in terms of total harmonic distortion (THD) in the converter line voltage are compared for the proposed technique, conventional SVPWM, and space pulse width modulation (SPWM). The execution time is reduced considerably with a slight increase in the value of THD and about 14.4 percent DC-link voltage utilization over the SPWM.

Design and implementation of three-level T-type inverter based on simplified SVPWM using cost-effective STM32F4 board

This paper investigates the design and validation of simplified space vector pulse width modulation (SVPWM) as a switching control for a three-phase three-level T-type inverter using STM32F4 board interfaced with MATLAB/Simulink environment. Usually, the SVPWM algorithm implemented using either DSP card or Dspace platform, which affects the cost of the system. On the contrary, the proposed algorithm offers a great reduction of computations compared with the conventional one, which grants an easy digital implementation. Thanks to the geometrical symmetry of six sectors, in which exists a close relationship between on-time calculations and on-time arrangement of the switching states. This can be exploited for the remaining sectors based on a single computation that relies on the first sector only. The proposed algorithm has been validated in both simulation and experimental tests. The results show the ability and the flexibility of using the STM32F4 board to drive a three-level T-type inverter.

A Simple Space Vector Modulation Method With DC-Link Voltage Balancing and Reduced Common-Mode Voltage Strategy for a Three-Level T-Type Quasi-Z Source Inverter

Single-stage converters based on an impedance source (IS) network merged with a multilevel inverter remain a trending research topic, from both the topological and control perspectives, because of their potential in applications involving renewable energy. This paper presents a new, simplified space vector pulse-width modulation (SVPWM) for a three-phase three-level T-type quasi-impedance source inverter (3L-T-type qZSI). The benefits of the proposed modulation strategy include functionalities, such as boosting the input voltage and controlling the neutral-point (NP) voltage using the redundant small vectors, to mitigate the inner capacitors voltages imbalance. The proposed SVPWM guarantees a minimum common-mode voltage while preserving a very simple implementation, thus reducing the complex computations and cascaded proportional-integral (PI) control loops of the conventional SVPWM methods. The proposed algorithm can be applied to different multilevel inverter configurations combined with an IS network. A comprehensive simulation study and experimental results demonstrated the good performance of the proposed control method for dynamic response and imbalance conditions.

Design and implementation of three-level T-type inverter based on simplified SVPWM using cost-effective STM32F4 board

This paper investigates the design and validation of simplified space vector pulse width modulation (SVPWM) as a switching control for a three-phase three-level T-type inverter using STM32F4 board interfaced with MATLAB/Simulink environment. Usually, the SVPWM algorithm implemented using either DSP card or Dspace platform, which affects the cost of the system. On the contrary, the proposed algorithm offers a great reduction of computations compared with the conventional one, which grants an easy digital implementation. Thanks to the geometrical symmetry of six sectors, in which exists a close relationship between on-time calculations and on-time arrangement of the switching states. This can be exploited for the remaining sectors based on a single computation that relies on the first sector only. The proposed algorithm has been validated in both simulation and experimental tests. The results show the ability and the flexibility of using the STM32F4 board to drive a three-level T-type inverter.

Design and Validation of a Generalized Multilevel Inverter with Simplified Switching Technique

—This paper proposes a generalized 3-phase cascaded multilevel inverter (CMLI) along with a simplified space vector pulse width modulation (SVPWM) based on 2-level inverter (2LI) topology. While conventional cascaded H-bridge inverters (CHBIs) call for a number of DC sources which increase the cost and complexity of their implementation, the proposed CMLI requires one DC source only. On the other hand, the complexity of SVPWM lies in the switching diagram that consists of a large number of triangles comprising uneven numbers of switching vectors. The generalized 3-phase CMLI proposed in this paper is aimed at reducing the number of switching vectors of each triangle. The hypothesis of the proposed CMLI-SVPWM is firstly illustrated through extensive simulation analysis using MATLAB/SIMULINK software. Feasibility of the proposed inverter is then validated through experimental measurements on a hardware prototype. Results reveal the superiority of the proposed inverter over existing ones in terms of the quality of the output voltage and current waveforms and the overall efficiency.

Fast and simple space vector modulation method for multilevel converters

This study proposes a simplified space vector pulse-width modulation (SVPWM) method for multilevel converters. To avoid unnecessary coordination transformations, firstly, a further derivation is conducted on the basis of the 60° coordinate transformation. Then, all the nearest three vectors (NTVs), duty cycles and optimal switching sequence within one switching period can be identified through a simple comparison of three-phase modulation waves. To further reduce the switching frequency, detailed steps to achieve the minimum number of transitions among different NTVs are constructed. Combined with the optimal switching sequence within one switching period, the minimum number of transitions within a fundamental period can be achieved easily. Finally, a thorough discussion is conducted to simplify the procedure further and the flowchart for the proposed SVPWM is also presented. Compared with the previous methods, the proposed method does not require any iterative calculation or coordinate transformation. To the best of the authors' knowledge, the calculation amount is reduced by almost seven times compared with the methods proposed. In addition, the switching frequency and total harmonic distortions remain at the same level without any deterioration. Finally, the simulation and experiment for modular multilevel converter are performed to verify the correctness and efficiency of the proposed method.

Development and Analysis of Pulse Width Modulation Techniques for Induction Motor Control

SVPWM (Space Vector Pulse Width Modulation) technique is type of traditional PWM method that efficiently utilizes its dc link voltage and generates high voltage pulses with low harmonic content and high modulation index. VSI (Voltage Source Inverter) with SVPWM generates adjustable voltage and frequency signals for VSDs (Variable Speed Drives). This research work presents the simplified SVPWM technique for controlling the speed and torque of induction motor. The performance of developed SVPWM technique is analyzed in terms of its switching losses and harmonic content and compared with SPWM (Sinusoidal Pulse Width Modulation). Mathematical modeling for induction motor control through two-level VSI with SVPWM and SPWM is presented. The voltage and current TDHs (Total Harmonic Distortions) of the drive with SVPWM technique are 73.23 and 63.3% respectively as compared to 101.99 and 77.89% with SPWM technique. Similarly, the switching losses with SVPWM technique are 178.79 mW and that of with SPWM are 269.45 mW. Simulink modeling and laboratory setup are developed to testify the efficacy of SVPWM and SPWM techniques. The modulation factor of SVPWM technique is 0.907 which is higher as compared to SPWM technique with 0.785 modulation factor.

A Simplified Space Vector Pulsewidth Modulation Scheme for Three-Phase Cascaded H-Bridge Inverters

A simplified space vector pulsewidth modulation (SVPWM) for three-phase cascaded H-bridge (CHB) inverters is presented in this article. Treating each unit as a three-level inverter and adopting serial calculation mode, a CHB inverter is modulated unit by unit using three-level SVPWM. Duty cycles of real sector are obtained by mapping duty cycles of sector 1, in which the calculation of three-level SVPWM is done. The process of implementing multilevel SVPWM is simplified to the process of implementing three-level SVPWM. By reusing field-programmable gate array (FPGA) chip resource that is used for the calculation of three-level SVPWM, the presented SVPWM can be easily adopted for a CHB inverter with different number of units, while the FPGA chip resource utilization is reduced significantly. In addition, the presented SVPWM provides an effective switching frequency higher than the switching frequency of IGBTs. Simulation and experimental results are provided to verify the feasibility of the presented SVPWM.

Effect of center voltage vectors (CVVs) of three-level space plane on the performance of dual inverter fed open end winding induction motor drive

Dual inverter fed open end winding induction motor (IM) drive offers many advantages over other multilevel inverter fed IM drives. Pulse width modulation (PWM) techniques are employed for the control of output voltage and frequency. Space vector base PWM techniques are popular among all the PWM techniques. A simplified space vector PWM method with simple and small look-up table approach is presented for dual inverter configuration. Moreover the proposed space vector based PWM technique provides freedom in selecting the center voltage vector (CVV) by which different PWM techniques will be derived. The implementation of all these PWM techniques is generalized by using a constant a <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">o</sub> . The derived PWM techniques show superior performance in reducing the zero sequence voltage (ZSV) by maintaining the same quality of output voltage. The performance of all these PWM techniques are evaluated theoretically and verified in real time through dSPACE 1104 control board.

Highly Reliable Back-to-Back Power Converter Without Redundant Bridge Arm for Doubly Fed Induction Generator-Based Wind Turbine

In this paper, a highly reliable back-to-back (BTB) power converter is proposed for doubly fed induction generator-based wind turbines (DFIG-WTs). When a power switch open-circuit fault is encountered in either the grid-side converter (GSC) or the rotor-side converter (RSC), a four-switch three-phase (FSTP) topology is formed to avoid using redundant bridge arms, which reduces the power circuit complexity and minimizes the conduction and switching losses. A simplified space vector pulsewidth modulation technique is used to eliminate sector identification and complex trigonometric calculations. In addition, the influence of dc-bus capacitor voltage unbalance on the electromagnetic torque is analyzed in detail. The offset current components are calculated, and they are deducted from the reference values in the modified control strategies to suppress the dc-bus voltage deviation. Moreover, the power loss model of a BTB converter is analyzed in detail, and the efficiency study is performed in various post-fault situations. Simulations in MATLAB/Simulink are carried out to verify the performance of a DFIG-WT based on a FSTP BTB converter. Furthermore, the control hardware-in-the-loop setup with RSC and GSC separately simulated in a digital real-time simulator is applied for experimental verification of the proposed control strategy.

A Simplified Space Vector Pulse Width Modulation Implementation in Modular Multilevel Converters for Electric Ship Propulsion Systems

The modularity, fault-tolerability, and voltage scalability features allow the modular multilevel converter (MMC) to be a promising topology for modern electric ship applications. Arm voltage and submodule (SM) capacitor voltage balancing controllers with conventional high-frequency modulation schemes are indispensable for reliable and stable operation of an MMC. This requires an additional external arm controller and the control complexity increases for an MMC with a large number of SMs. Alternatively, the space-vector pulse width modulation (SVPWM) schemes provide more freedom in selecting the voltage vectors to achieve multiple objectives, thus eliminating the arm voltage balancing controller. In this paper, a simplified SVPWM implementation for an $n$ -level MMC is proposed. This scheme utilizes all the available switching states and calculates switching timings by mapping to a two-level space-vector structure. The computational burden of the proposed scheme is independent of converter voltage level, therefore it is computationally efficient and well suited to the MMC with any number of SMs. Experimental results are presented to show the performance of an MMC system using the proposed scheme under steady-state, rapid acceleration and speed-reversal conditions.

Fault-Tolerant Operation of DFIG-WT With Four-Switch Three-Phase Grid-Side Converter by Using Simplified SVPWM Technique and Compensation Schemes

In this paper, in response to the open-circuit fault scenario in the grid-side converter (GSC) of doubly fed induction generator-based wind turbines (DFIG-WTs), a fault-tolerant four-switch three-phase (FSTP) topology-based GSC is studied. Compared with other switch-level fault-tolerant converter topologies, fewer switches, less switching and conduction losses, and simpler converter structure are derived. A simplified space vector pulse width modulation (SVPWM) technique is proposed to improve the output current quality and reduce the computational complexity in the control process. Unified expressions of duty ratios for the two remaining healthy bridge arms are obtained. In addition, the three-phase unbalance phenomenon caused by the capacitive impedance in the faulty phase is analyzed from the ac point of view, and a current distortion compensation scheme is illustrated. Furthermore, a dc-bus voltage deviation suppression strategy is proposed to maximize the dc-bus voltage utilization rate and mitigate the damage to the dc-link capacitors. Simulations are carried out in MATLAB/Simulink2017a to demonstrate the validity of the proposed SVPWM technique and compensation schemes in FSTP GSC for a 1.5-MW grid-connected DFIG-WT when different working conditions are considered.

A Simplified Modulation Strategy of Nine-Switch Inverter to Cut Off Half of Switching Modes

Nine-switch inverters were designed by sharing three-switches to realize dual-outputs, which are normally realized by two three phase inverters with 12 power semiconductors. Therefore, its modulation strategy is very complex and hard to implement. For this reason, a simplified modulations strategy for the nine-switch inverter is proposed. Based on the switched system model, m-modes controllability of the nine-switch inverter is first proposed to design a simplified space vector pulse width modulation (SVPWM) strategy. Compared with the conventional SVPWM strategies, the newly proposed switching scheme cannot only reduce half of the operating modes but also reduce the switching frequencies. It is significant since it can simplify the control, increase power efficiency and reduce economy cost. Finally, a prototype is designed to verify the proposed modulation strategy.

Sensorless Control of Late-Stage Offshore DFIG-WT with FSTP Converters by Using EKF to Ride through Hybrid Faults

A hybrid fault scenario in a late-stage offshore doubly-fed induction generator (DFIG)-based wind turbine (DFIG-WT) with converter open-circuit fault and position sensor failure is investigated in this paper. An extended Kalman filter (EKF)-based sensorless control strategy is utilized to eliminate the encoder. Based on the detailed analysis of the seventh-order dynamic state space model of DFIG, along with the input voltage signals and measured current signals, the EKF algorithm for DFIG is designed to estimate the rotor speed and position. In addition, the bridge arm open circuit in the back-to-back (BTB) power converter of DFIG is taken as a commonly-encountered fault due to the fragility of semiconductor switches. Four-switch three-phase (FSTP) topology-based fault-tolerant converters are employed for post-fault operation by considering the minimization of switching losses and reducing the circuit complexity. Moreover, a simplified space vector pulse width modulation (SVPWM) technique is proposed to reduce the computational burden, and a voltage balancing scheme is put forward to increase the DC-bus voltage utilization rate. Simulation studies are carried out in MATLAB/Simulink2017a (MathWorks, Natick, MA, USA) to demonstrate the validity of the proposed hybrid fault-tolerant strategy for DFIG-WT, with the wind speed fluctuation, measurement noises and grid voltage sag taken into consideration.

Open-End Multilevel Six-Phase Machine Drive System With Five Three-Leg Converters

This paper proposes and investigates a multilevel ac six-phase motor drive. The system is composed of five isolated three-leg voltage source inverters feeding the open-end windings of an asymmetrical six-phase induction motor (SPIM), which is adequate to generate multilevel voltages for high-power systems with voltage rating restrictions. A simple space vector pulse-width modulation (PWM) based on three similar individual planes and its implementation by means of equivalent level-shifted PWM are presented. A space vector pattern with a high number of voltage vectors redundancies is obtained. These redundancies and the application sequence of the voltage vectors are selected to minimize the amount of changes in the switching states and to decrease the harmonic distortion of the generated voltages. The vector pattern of this optimal modulation is obtained by analyzing only one plane and applied in the same way to the three planes as if they were independent. The developed PWM techniques have low computational complexity and are suitable for low-cost hardware implementations. Simulation results are used to compare the proposed topology with a conventional configuration in terms of harmonic distortion and semiconductor losses. Experimental results demonstrate the feasibility of the proposed drive system.