Silicon Technology Research Articles

Lateral Monolayer MoSe2 -WSe2 p-n Heterojunctions with Giant Built-In Potentials.

2D transition metal dichalcogenides (TMDs) have exhibited strong application potentials in new emerging electronics because of their atomic thin structure and excellent flexibility, which is out of field of tradition silicon technology. Similar to 3D p-n junctions, 2D p-n heterojunctions by laterally connecting TMDs with different majority charge carriers (electrons and holes), provide ideal platform for current rectifiers, light-emitting diodes, diode lasers and photovoltaic devices. Here, growth and electrical studies of atomic thin high-quality p-n heterojunctions between molybdenum diselenide (MoSe2 ) and tungsten diselenide (WSe2 ) by one-step chemical vapor deposition method are reported. These p-n heterojunctions exhibit high built-in potential (≈0.7 eV), resulting in large current rectification ratio without any gate control for diodes, and fast response time (≈6 ms) for self-powered photodetectors. The simple one-step growth and electrical studies of monolayer lateral heterojunctions open up the possibility to use TMD heterojunctions for functional devices.

Relative stability of shielded top- and side-contact MLGNR interconnects

ABSTRACT In a recent nano and deep-submicron regime, the electromagnetic interference primarily plays an important role in determining the overall interconnect performance of an integrated circuit (IC). For instance, it can cause lower reliability, and stability in silicon technology. In order to mitigate these challenges, this work introduces a new technique of active shielding by introducing a jacketed side- (SC) and top-contact (TC) multi-layered graphene nanoribbon (MLGNR) interconnect to demonstrate the relative stability. Depending on the physical configuration, an accurate Pi-type electrical network is proposed for the shielded TC-and SC-MLGNR at 32 nm technology. Using the equivalent circuit model, a fifth-order transfer function is employed to demonstrate the relative stability of SC- and TC-MLGNR at global interconnect lengths.

Nonfullerene Acceptors: A Renaissance in Organic Photovoltaics?

AbstractEfficient, low‐cost, and low‐embodied energy photovoltaics are key enablers of the global decarbonization agenda. In addition to the market‐leading crystalline silicon technology, several other promising candidates are under active investigation with the perovskites leading the way with single‐junction efficiencies exceeding 25% at the lab‐scale. So‐called organic photovoltaics (solar cells based upon organic semiconductors), particularly those that can be solution processed, have long promised the Nirvana of ultralow cost and very short energy payback times. However, relatively low efficiencies, poor long‐term stability, and issues with manufacturing at scale have so far prevented truly meaningful commercialization of the technology. The recent emergence of the so‐called nonfullerene electron acceptors is potentially about to shift this dynamic—they have delivered a step change in performance in a relatively short period of time. In this Essay, the basic properties of these new materials, their pros and cons, what we know and what we do not know are explored.

High Curie Temperature Ferromagnetism and High Hole Mobility in Tensile Strained Mn‐Doped SiGe Thin Films

AbstractDiluted magnetic semiconductors based on group‐IV materials are desirable for spintronic devices compatible with current silicon technology. In this work, amorphous Mn‐doped SiGe thin films are first fabricated on Ge substrates by radio frequency magnetron sputtering and then crystallized by rapid thermal annealing (RTA). After the RTA, the samples become ferromagnetic semiconductors, in which the Curie temperature increases with increasing Mn doping concentration and reaches 280 K with 5% Mn concentration. The data suggest that the ferromagnetism comes from the hole‐mediated process and is enhanced by the tensile strain in the SiGe crystals. Meanwhile, the Hall effect measurement up to 33 T to eliminate the influence of anomalous Hall effect reveals that the hole mobility of the annealed samples is greatly enhanced and the maximal value is ≈1000 cm2 V−1 s−1, owing to the tensile strain‐induced band structure modulation. The Mn‐doped SiGe thin films with high Curie temperature ferromagnetism and high hole mobility may provide a promising platform for semiconductor spintronics.

Intelligent Solar Tracker Vehicle for Supply Channel of Electric Vehicle Need Using Image Processing and Mobile Network

Harnessing the renewable energy sources in efficient way is the present day need when the nonrenewable sources are depleting in alarming rate. Many available renewable sources are hardly harnessed due to high conversion cost and sophisticated technical need. Solar is one of the reliable renewable resource and it is environment friendly and easy to convert into other forms i.e. heat and electric. The electricity generation in solar is based on silicon technology and its production and implementation is of low cost. And embedding the pros of other related technology can increase the productivity which can be used to recharge a battery pack in less duration. In the present era of electric vehicle implementation need for stored electrical energy reserve is increasing but its supply chain is not developed efficiently. To replace the petroleum-based vehicles completely the electric battery supply system should be implemented in large and efficient quantity with low investments. The main issue is of recharging the battery which is economically infeasible with domestic power supply system. In present digitalized world these resources are expected to be a mobile service and automated system. In this paper we mainly propose an effective solution for these problems with the use of image processing and robotics technologies. In the paper the solution is validated implementing a prototype of the proposed system and presenting its performance analysis.

Pipeline Synthesis and Optimization from Branched Feedback Dataflow Programs

Large dataflow designs are a result of behavioral specification of modern complex digital systems and/or a result of unfolding and transforming looped and branched programs. Since deep-submicron silicon technology provides large amounts of available resources, pipelining optimization without (or with minimal) resource sharing can give significant advantages in performance. High-level synthesis of CAL-programs is particularly popular in computation intensive applications (e.g., image and video processing, cryptography, wireless communication, etc.) where feedback actors with data flows at input and output ports represent loop-like behavior. In this work, we propose techniques for transforming, analysis, speculatively pipelining and optimizing large branched feedback dataflow programs. We develop an accurate algorithm and introduce fast dynamic and mixed static / dynamic heuristics that firstly minimize the number of pipeline stages for a given pipeline-stage time-period, and secondly minimize the overall pipeline registers size by means of appropriate assignment of feedbacks and instructions to pipeline stages. We also propose a genetic algorithm for tuning the heuristics for a particular design. The experimental results show the algorithms we propose give quickly solutions that are very close to accurate solutions and overcomes the earlier developed algorithms regarding computing time and pipeline parameters.

On the design of the channel region in 4H-SiC JBS diode through an analytical model of the potential barrier

In this paper, we propose a tool for the design of 4H-polytype Silicon Carbide Junction Barrier Schottky, JBS, diodes, which are promising devices for their low on-state resistance and their high blocking voltage. Our tool calculates the width of the channel region in terms of the geometrical and physical parameters and of the doping concentration in order that the device shows forward electrical characteristics similar to that of Schottky Barrier Diode. Their operating principle is defined by the control of the flow of electron carriers through a potential barrier, which is located in the n-type region under the Schottky metal contact surrounded by the p+-type regions. Indeed, if the electric fields of the p+-n junctions extend for the whole channel region under equilibrium conditions, the height of the induced potential barrier can be higher than that of the conventional Schottky built-in potential and can affect the electrical characteristics of the device, for example increasing the turn-on voltage. Although they have been firstly developed in Silicon technology, 4H-SiC JBS diodes are easier to fabricate because the electric fields of 4H-SiC p–n junctions have a wider space charge region for the same values of the doping concentrations with respect to Si JBS devices, resulting in a more relaxed design constrain of the channel geometry. Our analytical model can calculate the potential barrier height as function of the geometrical and physical parameters of the device and can evaluate the maximum channel width for which the potential barrier is higher than Schottky built-in voltage. The analytical results are compared through numerical simulations obtained from ATLAS Silvaco software.

Three PV plants performance analysis using the principal component analysis method

This paper presents a comparative analysis of the performance of three grid-connected photovoltaic power plants, of about 2kWp for each plant, using the principal component analysis (PCA) method. These systems include three silicon technologies. The analysis is based on the performance parameters described in the international standard IEC 61724. To perform this comparative analysis, the energy production, the operational and the meteorological data are first collected for a period of time. The performance evaluation of PV plants is then performed based on several performance indicators such as Final Yield, Performance Ratio, System Losses, Capture Losses, Array Efficiency and Capacity Factor. Using the PCA method, the correlation between the performance parameters and the meteorological variables is then studied and analyzed. The resulting analysis shows that the Polycrystalline silicon technology is the most performing one. The annual average values of the Performance Ratio were found to be 86.66% for the polycrystalline against 84.76% and 83%, for the monocrystalline and amorphous, respectively. For the daily data, the PCA method reveals that the Performance Ratio is independent of the solar irradiation but it has a slight correlation with temperature and System Losses and a strong correlation with Capture Losses. The result shows also that the temperature acts slightly on the amorphous compared to the crystalline ones.

Double-Gate MoS2 Field-Effect Transistor with a Multilayer Graphene Floating Gate: A Versatile Device for Logic, Memory, and Synaptic Applications.

2D materials with low-temperature processing hold promise for electronic devices that augment conventional silicon technology. To meet this promise, devices should have capabilities not easily achieved with silicon technology, including planar fully-depleted silicon-on-insulator with substrate body-bias, or vertical finFETs with no body-bias capability. In this work, we fabricate and characterize a device [a double-gate MoS2 field-effect transistor (FET) with hexagonal boron nitride (h-BN) gate dielectrics and a multi-layer graphene floating gate (FG)] in multiple operating conditions to demonstrate logic, memory, and synaptic applications; a range of h-BN thicknesses is investigated for charge retention in the FG. In particular, we demonstrate this device as a (i) logic FET with adjustable VT by charges stored in the FG, (ii) digital flash memory with lower pass-through voltage to enable improved reliability, and (iii) synaptic device with decoupling of tunneling and gate dielectrics to achieve a symmetric program/erase conductance change. Overall, this versatile device, compatible to back-end-of-line integration, could readily augment silicon technology.

Scale-free ferroelectricity induced by flat phonon bands in HfO2.

Discovery of robust yet reversibly switchable electric dipoles at reduced dimensions is critical to the advancement of nanoelectronics devices. Energy bands flat in momentum space generate robust localized states that are activated independently of each other. We determined that flat bands exist and induce robust yet independently switchable dipoles that exhibit a distinct ferroelectricity in hafnium dioxide (HfO2). Flat polar phonon bands in HfO2 cause extreme localization of electric dipoles within its irreducible half-unit cell widths (~3 angstroms). Contrary to conventional ferroelectrics with spread dipoles, those intrinsically localized dipoles are stable against extrinsic effects such as domain walls, surface exposure, and even miniaturization down to the angstrom scale. Moreover, the subnanometer-scale dipoles are individually switchable without creating any domain-wall energy cost. This offers unexpected opportunities for ultimately dense unit cell-by-unit cell ferroelectric switching devices that are directly integrable into silicon technology.

Machine Learning Computers With Fractal von Neumann Architecture

Machine learning techniques are pervasive tools for emerging commercial applications and many dedicated machine learning computers on different scales have been deployed in embedded devices, servers, and data centers. Currently, most machine learning computer architectures still focus on optimizing performance and energy efficiency instead of programming productivity. However, with the fast development in silicon technology, programming productivity, including programming itself and software stack development, becomes the vital reason instead of performance and power efficiency that hinders the application of machine learning computers. In this article, we propose Cambricon-F, which is a series of homogeneous, sequential, multi-layer, layer-similar, and machine learning computers with same ISA. A Cambricon-F machine has a fractal von Neumann architecture to iteratively manage its components: it is with von Neumann architecture and its processing components (sub-nodes) are still Cambricon-F machines with von Neumann architecture and the same ISA. Since different Cambricon-F instances with different scales can share the same software stack on their common ISA, Cambricon-Fs can significantly improve the programming productivity. Moreover, we address four major challenges in Cambricon-F architecture design, which allow Cambricon-F to achieve a high efficiency. We implement two Cambricon-F instances at different scales, i.e., Cambricon-F100 and Cambricon-F1. Compared to GPU based machines (DGX-1 and 1080Ti), Cambricon-F instances achieve 2.82x, 5.14x better performance, 8.37x, 11.39x better efficiency on average, with 74.5, 93.8 percent smaller area costs, respectively. We further propose Cambricon-FR, which enhances the Cambricon-F machine learning computers to flexibly and efficiently support all the fractal operations with a reconfigurable fractal instruction set architecture. Compared to the Cambricon-F instances, Cambricon-FR machines achieve 1.96x, 2.49x better performance on average. Most importantly, Cambricon-FR computers are able to save the code length with a factor of 5.83, thus significantly improving the programming productivity.

Morphology-Related Functionality in Nanoarchitectured GaN

Integrating silicon and III-nitride technologies for high-speed and large bandwidth communication demands optically interconnected active components that detect, process, and emit photons and electrons. It is imperative that multifunctional materials can enhance the performance and simplify fabrication of such devices. Spontaneously grown GaN in the nanowall network (NwN) architecture simultaneously displays unprecedented optical and electrical properties. A two-order increase in band-edge emission makes it suitable for high-brightness light-emitting diodes and laser applications. Decorating this NwN with silver nanoparticles further enhances emission through plasmonic interactions and renders it an excellent surface-enhanced Raman spectroscopy substrate for biomolecular detection. The observation of very high electron mobility (approximately 104 cm2/Vs) and large phase-coherence length (60 μm) is a consequence of two-dimensional (2D) electron gas formation applicable for high electron mobility transistors. Detecting ballistic transport in the nanowalls confirms proximity-induced superconductivity (<5 K and 8 T). Charge separation properties render it a device material for UV photodetectors, photoanodes for water splitting, and thermionic field emitters.

Method for Manufacturing Silicon X-Ray Masks Via Plasma Chemical Etching

A simple method for manufacturing silicon masks for deep X-ray lithography, conducted with the application of exposure radiation of the spectral range (0.5–7 A), is described. This method is based on planar silicon technology, which is widely used in the production of semiconductor devices. A significant difference between this method and previously known analogues is that it does not apply the creation of a stop layer by doping during formation of the support membrane of the mask. As the initial blank, a standard (100) oriented silicon wafer is used. The silicon support membrane of the mask is formed in the final stage of its manufacture by plasma-chemical etching of the rear-side of the wafer to a predetermined depth. The thus obtained X-ray masks on a silicon wafer are characterized by relative ease of manufacture, radiation and chemical resistance, geometric stability, and relatively high levels of mechanical strength and X-ray transparency of the support membrane, depending on its thickness, which can be manufactured with good accuracy and within a fairly wide range of ~2.5–50 μm, depending on the purpose of the mask.

Comparative Study on Power Module Architectures for Modularity and Scalability

Abstract Silicon carbide (SiC) wide bandgap power electronics are being applied in hybrid electric vehicle (HEV) and electrical vehicles (EV). The Department of Energy (DOE) has set target performance goals for 2025 to promote EV and HEV as a means of carbon emission reduction and long-term sustainability. Challenges include higher expectations on power density, performance, efficiency, thermal management, compactness, cost, and reliability. This study will benchmark state of the art silicon and SiC technologies. Power modules used in commercial traction inverters are analyzed for their within-package first-level interconnect methods, module architecture, and integration with cooling structure. A few power module package architectures from both industry-adopted standards and proposed patented technologies are compared in modularity and scalability for integration into inverters. The current trends of power module architectures and their integration into inverter are also discussed. The development of an eco-system to support the wide bandgap semiconductors-based power electronics is highlighted as an ongoing challenge.

Lattice performance during initial steps of the Smart-Cut™ process in semiconducting diamond: A STEM study

An alternative route for the development of diamond-based technologies is the Smart-Cut process. Such a process could make possible the combination of diamond and silicon technologies, as well as building alternative structures or manufacturing large diamond wafers. However, crystalline quality and implantation-related damages may alter the electronic properties of the diamond wafer. In fact, this is a critical bottleneck that needs to be analysed in order to develop a reliable diamond/Smart-Cut based technology. In this contribution, we present STEM-based experiments used to evaluate various key parameters such as the sharpness of the transition regions, the behaviour of the implanted region and diamond lattice performance in Smart-Cut processes. Indeed, an outstanding sp2/sp3 relation close to ideality (it is, that of undamaged diamond) is evidenced in the diamond-transfer region.

Toward Mobile Integrated Electronic Systems at THz Frequencies

This paper discusses advances related to the integration of future mobile electronic THz systems. Without claiming to provide a comprehensive review of this surging research area, the authors gathered research on selected topics that are expected to be of relevance for the future exploration of components for practical mobile THz imaging and sensing applications. First, a brief technology review of integrated mobile THz components is given. Advances in III-V technology, silicon technology, and resonant-tunneling diodes (RTD) are discussed. Based on an RTD source and a SiGe-HBT direct detector, low-cost and compact computed tomography is presented for volumetric continuous-wave imaging at around 300 GHz. Moreover, aspects of system integration of mobile THz MIMO radars are discussed. Thereby, a novel phase-locked loop concept utilizing a high-stability yttrium-iron-garnet-tuned oscillator to synthesize ultra-stable reference mmWave signals is shown, and an adaptive self-interference cancellation algorithm for THz MIMO in the digital domain based on Kalman filter theory is proposed.

Understanding and Advancing Bifacial Thin Film Solar Cells

Because bifacial solar cells increase the power generated per area, their market share is projected to increase over the next decade. While silicon technologies have implemented bifacial technology...

A foundation for complex oxide electronics -low temperature perovskite epitaxy

As traditional silicon technology is moving fast towards its fundamental limits, all-oxide electronics is emerging as a challenger offering principally different electronic behavior and switching mechanisms. This technology can be utilized to fabricate devices with enhanced and exotic functionality. One of the challenges for integration of complex oxides in electronics is the availability of appreciable low-temperature synthesis routes. Herein we provide a fundamental extension of the materials toolbox for oxide electronics by reporting a facile route for deposition of highly electrically conductive thin films of LaNiO3 by atomic layer deposition at low temperatures. The films grow epitaxial on SrTiO3 and LaAlO3 as deposited at 225 °C, with no annealing required to obtain the attractive electronic properties. The films exhibit resistivity below 100 µΩ cm with carrier densities as high as 3.6 · 1022 cm−3. This marks an important step in the realization of all-oxide electronics for emerging technological devices.

Direct large-area growth of graphene on silicon for potential ultra-low-friction applications and silicon-based technologies

Deposition of layers of graphene on silicon has the potential for a wide range of optoelectronic and mechanical applications. However, direct growth of graphene on silicon has been difficult due to the inert, oxidized silicon surfaces. Transferring graphene from metallic growth substrates to silicon is not a good solution either, because most transfer methods involve multiple steps that often lead to polymer residues or degradation of sample quality. Here we report a single-step method for large-area direct growth of continuous horizontal graphene sheets and vertical graphene nano-walls on silicon substrates by plasma-enhanced chemical vapor deposition (PECVD) without active heating. Comprehensive studies utilizing Raman spectroscopy, x-ray/ultraviolet photoelectron spectroscopy (XPS/UPS), atomic force microscopy (AFM), scanning electron microscopy (SEM) and optical transmission are carried out to characterize the quality and properties of these samples. Data gathered by the residual gas analyzer (RGA) during the growth process further provide information about the synthesis mechanism. Additionally, ultra-low friction (with a frictional coefficient ∼0.015) on multilayer graphene-covered silicon surface is achieved, which is approaching the superlubricity limit (for frictional coefficients <0.01). Our growth method therefore opens up a new pathway towards scalable and direct integration of graphene into silicon technology for potential applications ranging from structural superlubricity to nanoelectronics, optoelectronics, and even the next-generation lithium-ion batteries.

Power Gallium Nitride Technology: The Need for Efficient Power Conversion

The biggest motivation and driver for semiconductor power device innovation is improved efficiency in power conversion. Power gallium nitride (GaN) technology shows the greatest performance benefits against other incumbent technologies, including silicon (Si) technology. A reduction in power losses is the key challenge industries are facing. Pressure from society and government legislation for reduced CO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> emission are all trending toward more efficient power conversion and electrification. Automotive electrification, telecom infrastructure, server storage, and industrial automation using power electronics are the biggest trends in the technology sector. GaN field-effect transistors (FETs) can enable us to achieve the best efficiency with lower system costs while making systems lighter, smaller, and cooler. Electrification in the automotive sector can be the biggest beneficiary of this new power GaN FET technology.