Silicon-on-nothing Research Articles

Close Range and High-Resolution Detection of Vibration by Ultrasonic Wave Using Silicon-on-Nothing PMUTs.

This article presents a novel method for close-range, high-resolution ultrasonic time-of-flight (ToF) ranging using piezoelectric micromachined ultrasonic transducers (PMUTs) operating below the device resonance in air. The proposed method involves cross correlation techniques to accurately detect the reflected echo signals despite the presence of ringdown signal interference. For the experiments, a high fill-factor array of silicon-on-nothing (SON) PMUTs was used to enhance the signal-to-noise ratio (SNR). A thorough investigation was conducted to determine the optimal driving frequency for below-resonance ToF ranging, to improve resolution and minimize detection errors. The results of the experiments showed that the system was able to accurately measure sub- μ m vibrations of a metal plate placed 13 mm away from the PMUT array. The system exhibited the ability to detect target object vibrations with a peak-to-peak displacement under 6 μ m and sub- μ m floor noise. Moreover, the maximum detectable vibration frequency reached up to 1 kHz. This study highlights the potential of the proposed ToF ranging method in noncontact vibration monitoring applications across various fields, such as robotics and predictive maintenance.

Stacked Si Nanosheets Gate-All-Around Transistors with Silicon-on-Nothing Structure for Suppressing Parasitic Effects and Improving Circuits’ Performance

We propose a novel silicon-on-nothing (SON) structure with an air sub-fin for suppressing the parasitic channel effects on stacked Si nanosheets (NS) gate-all-around (GAA) transistors and a systematic investigation is carried out by 3D TCAD simulation. The SON structure could be fabricated using a backside selective etching technique. The proposed SON NSFETs with a designed air sub-fin structure demonstrates systematic advantages, including 40% off-state current reduction in the sub-channel, and 51.37% promotion for on-off current ratio (ION/IOFF) and 7.04% reduction in effective capacitance. Moreover, there is approximately 21.62% power reduction under the same frequency, and about 16.30% energy reduction under the same delay in 17-stage ring oscillators (ROs). The SON NSFETs-based 6T-SRAM exhibits decreased read time and write time by 14.66% and 67.53%, respectively, compared with those of the conventional GAA NSFETs-based 6T-SRAM.

Fabrication of nanoscale stencils through focused ion beam milling and dry transfer of silicon-on-nothing membrane with perforations

Nanoscale stencil lithography, providing sub-micrometer resolutions, is being implemented as a reliable patterning technique within the nanotechnology domain. Despite their advantages such as no resist processing, easy manipulation and reusability, patterning using a nanoscale stencil often faces challenges due to the gap between the nanoscale stencil and the substrate. This tends to result in unwanted pattern blurring, typically dimension wider than intended design. To address this issue, we minimize the gap by conformally attaching the nanoscale stencil to the substrate, thereby effectively eliminating a key factor contributing to the blurring effect. The nanoscale stencil is fabricated by forming nanoslits on the 50 nm thick Silicon-on-Nothing (SON) membrane with perforations, using focused ion beam (FIB) milling. The transfer of this stencil onto a substrate enables conformal adhesion due to its 1012 times lower flexural rigidity of the stencil compared to bulk silicon. Upon deposition of chromium and gold through the transferred stencil, a metal pattern array with the full width at half maximum (FWHM) of 43 nm is produced, demonstrating the potential of our approach for fabricating uniform nanoscale patterns with enhanced pattern resolution.

Gate electrode stacked source/drain SON trench MOSFET for biosensing application

This work inspects a dielectrically modulated (DM) stacked source/drain SiGe dual-metal trench gate silicon on nothing (SON) metal–oxide–semiconductor field-effect transistor (SiGe-DMTG SON MOSFET) biosensor to enhance the sensing capability of the device. A nano-cavity is implanted in the either side of gate area for immobilization of biomolecules which can modulate the gate capacitance and dielectric constant of the nanocavity area. Thus the device undergoes a threshold voltage shift which has a great impact on device sensitivity. So SiGe-DMTG SON MOSFET biosensor is proposed to identify the sensing performance of various analytes like Uricase (k = 1.54), Streptavidin (k = 2.1), Biotin (k = 2.63), 3-aminopropyltriethoxysilane (APTES) (k = 3.57) and protein (k = 8) using DM technique. The electrostatic properties of the neutral biomolecules such as electrostatic potential, electric field, On current, switching ratio, threshold voltage, On current sensitivity, threshold voltage sensitivity, and subthreshold performance of SiGe-DMTG SON MOSFET biosensor have been evaluated using 2D ATLAS device simulator. Further, the parasitic capacitances of the proposed biosensor has been investigated for different biomolecules in the nano-cavity region in order to observe the sensing performance of the device. From the result analysis it has been observed that for protein (k = 8), the proposed SiGe-DMTG SON MOSFET biosensor offers a threshold voltage sensitivity of 0.581 and On current sensitivity of 1.765. Apart from this, protein (k = 8) offers a strong threshold voltage shift of 104.8 mV with respect to k = 1 shows best suited for biosensing application.

Subsurface Imaging of Microfabricated Silicon Membrane–Cavity Structures Using Near‐Infrared Interferometry

To characterize microfabricated resonators, fabricated membrane or cavity structures are often destructively examined with high‐resolution microscopy, although such an approach may cause structural or morphological changes. Herein, nondestructive and direct measurement of the thickness of the suspended membrane as well as the height of the underlying cavity in silicon‐on‐nothing (SON) structures by custom‐built near‐infrared (NIR) interferometry are demonstrated. While positions of the surface and all buried interfaces of the as‐fabricated single‐layered SON are detected by NIR interferograms, positions of the surface and the first three interfaces (i.e., except the deepest interface) of the as‐fabricated double‐layered SON structure are detected. While the submicrometer‐thick membrane thickness and the cavity height of the polished single‐layered SON are also measured, smoothened surface roughness allows multiply reflected rays to show up and counterintuitively complicates the detection of the buried interface. The NIR interferometry results in measurement errors ranging from 0.7% to 3.3% for the membrane thickness and those ranging from 2.2% to 13% for the cavity height, compared to scanning electron microscopy. It is thus anticipated that a NIR interferometry can be a versatile tool for characterizing a variety of microdevices.

Self-assembled silicon membrane resonator for high vacuum pressure sensing

In this paper, a mechanical vacuum gauge based on a circular membrane resonator is proposed and its high responsivity is verified in high vacuum down to a pressure of ∼6 × 10−7 mbar. A silicon-on-nothing (SON) resonator with a self-sealed cavity having a diameter of 150μm and a thickness of 1.55μm is fabricated through a high vacuum annealing process. After the fabricated membrane resonator is placed inside a custom vacuum chamber, its resonant characteristics are measured with a frequency sweep, and the vibration amplitudes are measured by resonance feedback using a laser and photodiodes at various vacuum pressures. Using quality factor (Q factor) measurement, the SON resonator shows a high responsivity (ΔQ/ΔP) of up to ∼3.7 × 108 mbar−1 in the high vacuum range. Both quality factor and amplitude are found to be effective vacuum indicators, and amplitude measurement is specifically useful for real-time vacuum monitoring.

Formation mechanism of a silicon-on-nothing structure using the level-set approach and molecular dynamics

The purpose of this article is to simulate the formation mechanism of the SON structure. Based on the silicon atom surface diffusion theory, we simulated the formation of a silicon-on-nothing (SON) structure using the “Level-Set” module in the COMSOL Multiphysics® software. From a macroscopic perspective, we analyzed the influence of the initial trench size and heating time on the formation of the SON structure. In addition, we used molecular dynamics simulation to study the migration process of silicon atoms during RTP (rapid temperature processing) for the formation of a SON structure from a microscopic point of view. Finally, we fabricated the SON structure under high vacuum at a temperature of 1150 °C. The SON formation process in the experiment is consistent with the simulation results, which verifies the correctness of the theoretical model used in the simulation and the rationality of the inference on the formation mechanism of the SON structure. This work will provide a reference for the fabrication of the SON structure.

Performance Investigation of Stepped Gate Recessed Channel SON (Silicon on Nothing) MOSFET for Improvement of SCEs

Performance Investigation of Stepped Gate Recessed Channel SON (Silicon on Nothing) MOSFET for Improvement of SCEs

Examining the Electrical characteristic for Triple Material Double-Gate Silicon-On-Nothing (SON) MOSFETs with High Dielectric Oxide: A Comparative Study

Demand for devices with higher processing speed and lower power consumption increase exponentially every year. The device industry achieved these demands by the down-scaling device structures. As device size decreases, the physical parameters also decrease. This results in several critical issues. One such an issue is the decreasing of device threshold voltage. This decrease in threshold voltage is the result of decrease in control by the gate above the channel region and source/drain charge sharing. Silicon-on-nothing (SOI) and Silicon-on-insulator (SON) are among some structural solutions to tackle this issue. In this paper, studies on the effects of various physical parameters to the threshold voltage of a double-gate SON metal oxide semiconductor field-effect transistor (MOSFET) has been presented. The concept of high dielectric material on the oxide layer and gate material engineering is also incorporated. A comparison between SON and SOI is also carried out on the ATLAS simulator.

Analysis of Stack Gate Oxide Nanogap Silicon on Nothing (SON) for Biosensing Application

This paper proposes the use of a stack gate oxide silicon on nothing (SON) MOSFET for biosensor application. The stack gate oxide with high-K provides the advantage of reducing the effective oxide thickness without affecting the channel characteristics. Here a nanogap in the gate has been introduced to let the interaction of biosensor and the biomolecules. SON has shown great scaling prospects with improving short channel effects in many previous studies. This paper tries to study and characterize it for use as a biosensor. Surface potential, threshold voltage, and sensitivity of the said device have been studied for different biomaterials having varied dielectric values and charges and comparison with SOI-based device characteristics is also presented. The study is based on the results obtained from 2-D TCAD simulations.

Grooved-gate silicon-on-nothing (SON) MOSFET: evidence for suppressing SCEs

This paper presents a simulation-based systematic characterization of a dual-metal-stack grooved-step-gate (DMS-GSG) silicon-on-nothing (SON) metal–oxide–semiconductor field-effect transistor (MOSFET) with stack buried oxide (SBO) for restraining short-channel effects (SCEs). Comparison was done between silicon-on-insulator (SOI) and SON SBO grooved-gate (GG) MOSFETs to realize the feasibility of the presented structure. Analysis of thermal stability over a wide range of temperatures was carried out for better characterization of the proposed structure. Further, the impact of structural parameters such as the negative junction depth and the influence of the work-function difference on the threshold voltage, drain current and drain-induced barrier lowering were analyzed. The investigation revealed that the DMS-GSG SON MOSFET is more prominent than other GG SOI MOSFETs in terms of switching behavior, SCEs, hot-carrier effect, intrinsic gain and early voltage. Further, the presence of air in the SBO of the DMS-GSG SON MOSFET suppresses the self-heating effect. Thus, this in-depth investigation is relatively beneficial to find out the performance improvement of SON structures over SOI ones for nanoscale short-channel devices.

Examining the Short Channel Characteristic and Performance of Triple Material Double Gate Silicon-on-Nothing Metal Oxide Semiconductor Field Effect Transistors with Grading Channel Concentration

A 2D surface potential analytical model of a channel with graded channel triple material double gate (GCTMDG) Silicon-on-Nothing (SON) MOSFET is proposed by intermixing the benefits of triple material in gate engineering and graded doping in the channel. The surface potential distribution function of the GCTMDG SON MOSFET is obtained by solving the Poisson's equation, applying suitable boundary conditions, and using a parabolic approximation method. It is seen in the proposed device that the Short Channel Effects (SCEs) are subdued due to the apprehensible step in the surface potential profile that screen the potential of the drain. The effects of the various device parameters are studied to check the merit of the device. For the validation of the proposed device, it is compared with the simulated results of ATLASTM, a device simulator from SILVACO.

Extended Design Space of Silicon-on-Nothing MEMS

Complex monolithic Si MEMS can be created using a single mask by extending the empty-space-in-silicon (ESS) or silicon-on-nothing (SON) technology. The fabrication combines isotropic and anisotropic etching with selective removal of passivation layers followed by hydrogen annealing. The resulting expanded design space includes multilayer structures and embedded cavities. The MEMS formation by the hydrogen annealing is simulated both at large scales and microscopic scales that together predict the shape of the finished MEMS. We demonstrate the accuracy of our process and simulations by fabricating single- and double-layer evacuated silicon voids that form Fabry-Perot optical pressure sensors with the sealed voids as pressure references. We also create multi-layered sensors with an integrated photonic crystals sensing diaphragm for improved optical readout. The sensors have a calculated 6.7 $\mu \text{V}$ /Pa sensitivity and low noise over a dynamic range of over 70.9 kPa. [2019-0091]

Germanium-on-Nothing for Epitaxial Liftoff of GaAs Solar Cells

Summary Solar cells from III-V materials offer outstanding light conversion efficiency and power densities and have a proven reliability record. Nevertheless, the utilization of III-V devices has been hindered by high production costs that partially stem from expensive substrates for the growth of III-V materials. Here, we present an ultrathin epitaxially ready single-crystal Ge membrane, formed by germanium-on-nothing (GON) technology, which employs morphological evolution of an arrayed porous Ge during hydrogen annealing. This new process, inspired by a silicon-on-nothing (SON) process, significantly improves the reformed Ge surface compared with previous porous Ge studies such that low-defect-density heteroepitaxy of GaAs is achievable. We demonstrated the growth of a 14.44% efficient GaAs solar cell on GON with nearly identical open circuit voltage to a control cell grown on a bulk Ge and successfully transferred it onto an inexpensive handle by employing the plate-like void under the Ge film as a release layer.

Fabrication of a Piezoresistive Barometric Pressure Sensor by a Silicon-on-Nothing Technology

This paper presents a piezoresistive barometric pressure sensor fabricated by using a Silicon-on-Nothing (SON) technology. Array of silicon trenches were annealed in hydrogen environment to form continuing crystalline silicon membrane over a vacuum cavity. Epitaxial growth on the silicon membrane is then completed for the desired thickness. All processes are CMOS compatible and performed on the front side of the silicon wafer. The piezoresistive barometric pressure sensor has been demonstrated with pressure hysteresis as low as 0.007%.

Temperature Induces Self-assembly of Silicon Nano/Micro-structure based on Multi-physics Approach

A three-dimensional dynamic model for nano/micro-fabrications of silicon was presented. With the developed model, the fabrication process of silicon on nothing (SON) structure was quantitatively investigated. We employ a diffuse interface model that incorporates the mechanism of surface diffusion. The mechanism of the fabrication is systematically integrated for high reliability of computational analysis. A semi-implicit Fourier spectral scheme is applied for high efficiency and numerical stability. Moreover, the theoretical analysis provides the guidance that is ordered by the fundamental geometrical design parameters to guide different fabrications of SON structures. The performed simulations suggest a substantial potential of the presented model for a reliable design technology of nano/micro-fabrications.

Design analysis of hybrid silicon-on-nothing photonic crystal–nanoantenna structures for engineering of midinfrared radiative properties

Electromagnetic (EM) behaviors of photonic crystals (PhCs) and nanoantenna (NA) arrays have been extensively studied and applied to a myriad of applications, including light absorption, surface-enhanced Raman scattering, light trapping in photovoltaics, and spectral narrowing of thermal emission. However, not many works have studied the integration of three-dimensional (3-D) PhCs and NA arrays into one structure mainly due to technical challenges in manufacturing 3-D PhCs. The present article reports the design analysis of a hybrid optical structure that has a gold rectangular NA array aligned on a 3-D silicon-on-nothing (SON) PhC substrate. By applying a continuous phase field model, we numerically simulate the formation of SON-PhC structures (i.e., a 3-D periodic array of spherical voids in silicon) during the high-temperature annealing process of a silicon substrate having vertical trenches. Photonic behaviors of the NA-on-SON PhC structure are computed using the finite-difference time-domain method. The obtained results exhibit the resonant absorption of midinfrared (mid-IR) light in the stopping bands of the SON-PhC (3.0 μm < λ < 7.5 μm) by photon coupling with the free electron oscillations in each NA structure. This PhC-mediated NA resonance is manifested by highly concentrated electric fields at NA corners; the corresponding local field enhancement factor is one order of magnitude greater than that of the NA array on a bare silicon substrate.

A study of morphological evolution of silicon microstructure based on phase field model

ABSTRACTA three dimensional model for a nano/microfabrications of silicon on nothing (SON) structure based on phase field model has been presented. The temperature induces morphological evolution of silicon substrate has been introduced and suggested as a great possibility for the evolution dynamics. Phase field model is employed to present the morphological evolution of silicon. The numerical simulations represent an efficient verification on the experimental work. The performed work could present a detailed process of the cavity formed in the silicon substrate under high temperature. The mechanism for making the cavity in the silicon substrate is the shape changes, which is caused by surface diffusion and driven by the minimization of their surface energy. The aim of this paper is providing a reliable fabrication process of silicon substrate in high temperature, and control the fabrication process when the annealing is performed. The performed simulation results are well consistent with the experimental works.

Exploring the short channel characteristics and performance analysis of DMDG SON MOSFET

A two-dimensional (2-D) analytical model for dual-material double gate (DMDG) Silicon-on-Nothing (SON) MOSFETs is developed to study the effect of variation of both the surface potential and threshold voltage on short channel effects (SCEs). Two dimensional (2-D) Poisson's equation with proper boundary conditions has been solved considering the parabolic potential approximation. The model includes the calculations of threshold voltage, electric field and subthreshold swing. The impact of variation of the device parameters such as gate length ratios, gate metal work functions on the performance of the device has been examined and the results are compared to that of dual-material double gate (DMDG) Silicon-on-Insulator (SOI) MOSFETs. The calculated results obtained have been validated with the numerical simulation data obtained from ATLAS, a 2-D device simulator from SILVACO.

Design of silicon-on-nothing structure based on multi-physics analysis

The formation of silicon-on-nothing (SON) structure during an annealing process from the silicon substrate including the trench structures has been considered as an effective technique to construct the structure that has an empty space under the closed flat surface. Previous studies have demonstrated the mechanism of the formation of SON structure, which is based on the surface diffusion driven by the minimization of their surface energy. Also, it has been fragmentarily shown that the morphology of SON structure can be affected by the initial design of trench (e.g., size, number) and the annealing conditions (e.g., temperature, pressure). Based on the previous studies, here, we report a comprehensive study for the design of the cavity-embedded structure (i.e., SON structure). To do this, a dynamic model has been developed with the phase field approach. The simulation results represent that the morphology of SON structures could be detailedly designed, for example the position and thickness of cavity, the thickness of top and bottom layer, according to the design parameters. This study will give us an advantage in the effective design of SON structures.