Abstract
Demand for devices with higher processing speed and lower power consumption increase exponentially every year. The device industry achieved these demands by the down-scaling device structures. As device size decreases, the physical parameters also decrease. This results in several critical issues. One such an issue is the decreasing of device threshold voltage. This decrease in threshold voltage is the result of decrease in control by the gate above the channel region and source/drain charge sharing. Silicon-on-nothing (SOI) and Silicon-on-insulator (SON) are among some structural solutions to tackle this issue. In this paper, studies on the effects of various physical parameters to the threshold voltage of a double-gate SON metal oxide semiconductor field-effect transistor (MOSFET) has been presented. The concept of high dielectric material on the oxide layer and gate material engineering is also incorporated. A comparison between SON and SOI is also carried out on the ATLAS simulator.
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