Silicon Carbide Metal Oxide Semiconductor Research Articles

Development of an inductive energy storage pulsed power supply using SiC semiconductor devices for ozone production by streamer discharges

An inductive energy storage (IES) pulsed power generator driven by a silicon carbide metal oxide semiconductor field effect transistor (SiC-MOSFET) with a blocking voltage of 1.2 kV was developed. The IES pulsed power generator consists of a capacitor, a pulsed transformer and the SiC-MOSFET used as an opening switch. The influence of the turn ratio of the pulsed transformer on the output voltage was evaluated. The output voltage amplitude increased with increasing secondary turn ratio. Under the conditions of no load, a peak output voltage of 13 kV and a pulse width of 120 ns were obtained with a voltage across the drain–source terminals of the MOSFET of 1 kV. The peak voltage increased, and the peak current and pulse width decreased, with increasing load resistance and decreased capacitance. The maximum energy transfer efficiency was obtained at 500 Ω and was approximately 56%.

High-temperature time-dependent dielectric breakdown of 4H-SiC MOS capacitors

—With the rapid applications of silicon carbide metal–oxide–semiconductor field-effect transistor (SiC MOSFET) power devices, further improving the performance of SiC MOSFET device through enhancing its gate oxide reliability is one of the crucial directions. The density of interface states in a SiC MOSFET is a significant parameter that affects the reliability of the gate oxide layer. In this paper, the SiC MOS capacitors (MOSCAPs) were prepared by the 1250 °C dry oxidation and 1350 °C NO annealing process. Then, we analyzed the mechanisms of the breakdown by two group of ramped experiment. And we still evaluated the reliability of oxide layer via the high-temperature time-dependent dielectric breakdown (TDDB) tests on the prepared MOSCAPs, meanwhile, the temperature effect on the reliability was considered. Furthermore, the E, 1/E, and E models with Weibull plotting were used to calculate the tBD lifetimes and failure analysis was carried on the failed samples finally. The results indicate that: (1) the impact of the generation and accumulation of the traps in the oxide, which is the main mechanisms of device failure; (2) The prediction of lifetime was calculated with three models at different acceleration factors; (3) at high-temperature, although the lower the density of interface states is, the Si epitaxial growth and C cluster will manifest in the oxide surface and lead to the breakdown of SiC MOSCAPs.

Asymmetric trench SiC MOSFET with integrated channel accumulation diode for enhanced reverse conduction and switching characteristics

A novel asymmetric trench Silicon Carbide Metal Oxide Semiconductor Field Effect Transistor (SiC MOSFET), featuring an integrated channel accumulation diode (CAD-MOS), has been proposed and investigated through numerical simulation. This innovative design aims to mitigate switching losses and eliminate the bipolar degradation of the body diode. The current spreading layer (CSL) channel, strategically positioned in the centre of the dummy gate, offers a low-barrier reverse conduction path. This represents a substantial advancement over the traditional PN body diode, significantly reducing the reverse conduction voltage drop from 2.84 V in the PN body diode to a mere 1.39 V in the CAD-MOS. Meanwhile, the reverse recovery charge of the CAD-MOS is reduced to 0.95 μC/cm2, and the peak reverse recovery current stands at 45 A/cm2. Compared to conventional asymmetrical trench SiC MOSFET (CON-MOS), the CAD-MOS exhibits a 68.1 % reduction in reverse recovery charge and a 63.4 % decrease in peak reverse recovery current. The split-gate design also reduces the device gate to source capacitance (CGS), resulting in a 17.4 % reduction in total switching losses to 3.64 mJ/cm2. CAD-MOS also exhibits a reduced gate turn-on charge and demonstrates an enhancement in high-frequency figure of merit (HF-FOM) by 8.1 %.

Precharge switch based on metal–oxide–semiconductor‐controlled thyristor for power relay assembly of battery electric vehicles

AbstractThe power relay assembly (PRA) is an essential component to ensure the safety of an electric vehicle. We propose a semiconductor‐based precharge switch to overcome the shortcomings of the conventional mechanical relay, which is currently used as the precharge switch in the PRA. The gate‐driving circuit uses a photocoupler instead of a gate‐driving integrated circuit to reduce complexity and cost. Five devices, namely, two insulated‐gate bipolar transistors (IGBTs), two silicon carbide metal–oxide–semiconductor field‐effect transistors (SiC MOSFETs), and one metal–oxide–semiconductor‐controlled thyristor (MCT) are tested as candidate precharge switches. Each device is analyzed under varying battery voltage and fixed measurement conditions. The IGBT and SiC MOSFET burn below 600 V, while the MCT exhibits normal operation up to 800 V. The MCT precharge switch can solve shortcomings of the conventional mechanical relay and increase the performance with a simple gate‐driving circuit. Furthermore, the PRA with an MCT precharge switch can reduce the volume, weight, and cost while improving reliability.

Multi-objective topology optimization design of silicon carbide metal oxide semiconductor field effect transistors power module liquid-cooled heatsink for electric vehicles

Silicon carbide (SiC) metal oxide semiconductor field effect transistors (MOSFETs) is gradually replacing silicon-based insulated gate bipolar transistor (IGBT) as the switching devices in electric vehicle power inverters due to its higher operating temperatures, switching speeds, and frequencyies. However, the high switching frequency of SiC MOSFETs can increase the losses of the power inverter, resulting in an increase in the temperature, which will limit the performance of power inverters. The improvement of power module performance is mainly controlled by optimizing its control methods during operation and improving its cooling system. Currently, the liquid-cooled heatsink used in power modules have disadvantages such as large flow resistance and poor heat dissipation performance. In order to enhance the performance of the heatsink, this study first established a three-dimensional finite element model of SiC MOSFETs power module based on a pin fin heatsink. The accuracy of the model was verified by numerical and experimental methods. Secondly, based on numerical analysis, a multi-objective topology optimization method for the power module liquid-cooled heatsink is proposed. This method takes heat exchange and fluid dissipation energy as the objective function and uses weight factors to adjust the influence of each on the objective functions. Additionally, the temperature distribution of the heatsink is considered to optimize its performance. Finally, the numerical results show that the topology-optimized heatsink exhibits better performance at high coolant volumetric flow rates. When the coolant volumetric flow rate is 14 L/min, the pressure drops of topology-optimized heatsink is reduced by 63.94 % and the junction temperature of the power module is reduced by 0.24 % compared with the pin fin heatsink. This topologically optimized heatsink could be helpful to improve the performance of existing power module heatsinks.

Transient turn-on characteristics of Si RBDT and SiC MOSFET under nanosecond current pulse range

With the development of pulse power supplies, solid-state semiconductor switches are required to have fast switching speeds and low losses. Both Reverse blocking diode thyristor (RBDT) and silicon carbide metal oxide semiconductor field effect transistor (SiC MOSFET) have fast turn-on speed, making them suitable candidates for short pulse generator. In this paper, the transient turn-on characteristics of Si RBDT and SiC MOSFET are analyzed theoretically and validated experimentally. Si RBDT and commercial 1.2 kV/81A SiC MOSFET are comparatively investigated in switching current pulse with a rise time of several hundreds of nanoseconds. (1) The anode current of RBDT could rise exponentially because of the latch-up effect of Si RBDT, while the drain current of SiC MOSFET tends to be saturated. (2) Utilizing the current rise time (Trise) to represent the switching speed, SiC MOSFET can switch faster when the current is lower than 400A. With the increase of the current, Si RBDT presents faster turn-on speed and lower switching loss due to the regenerative action of the two coupled transistors. (3) The transient characteristics of Si RBDT include a voltage-controlled inductance, while SiC MOSFET contains a current-controlled inductance based on the current rise time, respectively. With the increasing of the main voltage, the equivalent inductance of Si RBDT decreases and tends to be saturated when the main voltage is higher than half of the breakdown voltage of Si RBDT. For SiC MOSFET, the equivalent inductance increases until the drain current remains stable for a given gate voltage. This paper confirms the advantages of Si RBDT and SiC MOSFET in different situations.

The Effects of a Gate Bias Condition on 1.2 kV SiC MOSFETs during Irradiating Gamma-Radiation.

We investigated the effects of gate bias regarding the degradation of electrical characteristics during gamma irradiation. Moreover, we observed the punch through failure of 1.2 kV rated commercial Silicon Carbide (SiC) Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) due to the influence of gate bias. In addition, the threshold voltage (VT) and on-resistance (Ron) of the SiC MOSFETs decreased significantly by the influence of gate bias during gamma irradiation. We extracted the concentration of carriers and fixed charge (QF) in oxide using N-type SiC MOS capacitors and Transmission Line Measurement (TLM) patterns to analyze the effects of gamma irradiation. The Total Ionizing Dose (TID) effect caused by high-energy gamma-ray irradiation resulted in an increase in the concentration of holes and QF in both SiC and oxide. To analyze the phenomenon for increment of hole concentration in the device under gate bias, we extracted the subthreshold swing of SiC MOSFETs and verified the origin of TID effects accelerated by the gate bias. The QF and doping concentration of p-well values extracted from the experiments were used in TCAD simulations (version 2022.03) of the planar SiC MOSFET. As a result of analyzing the energy band diagram at the channel region of 1.2 kV SiC MOSFETs, it was verified that punch-through can occur in 1.2 kV SiC MOSFETs when the gate bias is applied, as the TID effect is accelerated by the gate bias.

Research and analysis of electromagnetic interference of a motor drive control system based on PMSM with SiC MOSFET for new energy electric vehicles

Sustainable development in the 21st century faces significant challenges due to finite reserves of fossil fuels and environmental pollution. In the context of new energy electric vehicles (NEEVs), the wide-bandgap semiconductor known as the silicon carbide–metal oxide–semiconductor field-effect transistor (SiC MOSFET) and the permanent magnet synchronous motor (PMSM) have emerged as advantageous sources. However, the use of these components gives rise to electromagnetic interference (EMI) issues, which impede the achievement of electromagnetic compatibility (EMC) standards in the motor drive control system. This paper aims to elucidate the generation mechanism, propagation path, and test infrastructure of EMI. Furthermore, it proposes a system-level conducted EMI equivalent circuit model for the motor drive control system, encompassing the power battery pack, busbar cable, LISN, three-phase inverter, and PMSM. Building upon this foundation, the principles for suppressing and optimizing EMI noise are discussed. The paper concludes with the validation of simulations and experimental results, which demonstrate the effectiveness of the proposed approach. It is anticipated that professionals with an interest in the field of EMI/EMC will find this paper to be of both theoretical and practical importance.

Characterization of nitrided SiC(1 [formula omitted] 00) MOS structures by means of electrical measurements and X-ray photoelectron spectroscopy

Interface nitridation in nitric oxide is a standard technique for improving the performance of silicon carbide (SiC) metal-oxide-semiconductor (MOS) devices. In this study, we focused on m-face SiC MOS structures and investigated the impact of nitridation by means of electrical measurements and X-ray photoelectron spectroscopy (XPS). Gate leakage characteristics were measured in a wide temperature range of about −150 – 100 °C, which clarified that nitridation leads to an unwanted increase in the Fowler-Nordheim leakage current. Scanning XPS measurements revealed that the amount of nitrogen incorporated at the m-face MOS interface could reach about 2.3 times higher than the Si-face MOS interface. The incorporation of nitrogen likely reduces the conduction band offset at the SiO2/SiC interface, thereby increasing the gate leakage. This conclusion was further corroborated in an analysis of band alignment based on synchrotron radiation XPS measurements. Therefore, while nitrided m-face SiC MOS devices exhibit superior on-state performances, they have a limitation in terms of reliability.

Improving the Efficiency of an Isolated Bidirectional Dual Active Bridge DC–DC Converter Using Variable Frequency

This article presents a control method for an isolated bidirectional dual active bridge DC–DC converter (IBDC) where single phase shift (SPS) and variable frequency (VF) modulations are combined simultaneously with the purpose of improving the efficiency of the converter applied to the bidirectional charging of electric vehicles batteries. A complete power characterization of the dual active bridge (DAB) converter is carried out. The combined control achieves lossless turn-on and turn-off on the primary bridge for a wide range of output powers. A comparative study of power losses between the traditional SPS control and the combined method proposed here was also carried out. A prototype with an output power of 10 kW was built based on Silicon Carbide (SiC) Metal Oxide Semiconductor Field-Effect Transistors (MOSFET), with which a peak efficiency close to 99% was obtained, thus verifying the viability of the method.

New SiC Kicker Power Supply for J-PARC

A new kicker power supply using silicon carbide metal–oxide semiconductor field-effect transistors (SiC-MOSFETs) is under development at the Japan Proton Accelerator Research Complex (J-PARC). SiC-MOSFETs fabricate compact high-speed pulse power supplies to replace the thyratron switch power supply. The base circuit of the new power supply uses the linear transformer driver (LTD) system, and the semi-conductor module circuit comprises a radial symmetry type that achieves low noise. The three main components of the current kicker power supply, i.e., the thyratron, pulse-forming network (PFN) circuit, and end clipper, can be assembled on a single board as the new module circuit board. The new power supply contains a 1.25 kV/2 kA main board that forms a trapezoidal pulse and a 0.1 kV/2 kA correction board, compensating for the flat section droop. The 32 main boards and 20 correction boards are hierarchically connected in series to achieve the waveform specifications required for the J-PARC rapid cycling synchrotron (RCS) kicker power supply: output voltage of 40 kV, output current of 2 kA, and pulse width of 1.2 μs. Furthermore, a 25 % power saving has been confirmed and an insulating cylinder for the conductor has been developed to suppress corona discharge and withstand continuous operation for a long time.

Design of SiO2/4H–SiC MOS interfaces by sputter deposition of SiO2 followed by high-temperature CO2-post deposition annealing

Oxidation of silicon carbide (SiC) is known to induce defects at the interface of the SiO2/SiC system. NO-annealing is a standard industrial method of nitridation, but oxidation may progress during NO-nitridation, which may generate interface defects. Here, we propose a new method of fabricating SiO2/SiC metal-oxide-semiconductor (MOS) devices: sputter deposition of SiO2 in an Ar/N2 gas mixture followed by high-temperature CO2-post deposition annealing to form SiO2 and incorporate nitrogen at the interface while suppressing oxidation of the SiC. We obtained the nitrogen depth profile by performing x-ray photoelectron spectroscopy and confirmed that most of the nitrogen atoms exist at the abrupt interface. While maintaining a low interface state density and good insulating property, we demonstrated much improved reliability of MOS devices compared to conventional NO-annealed samples, thanks to the well-designed SiO2/SiC interface by the proposed method.

Highly Efficient Three-Phase Bi-Directional SiC DC–AC Inverter for Electric Vehicle Flywheel Emulator

Flywheels are nowadays a solution for the dynamic charging of electric vehicles since they act as transient energy storage. The need for a top efficient reversible power converter for the flywheel system is crucial to assure high dynamic performance. The paper presents the design of a 50 kW highly efficient reversible three-phase DC–AC inverter involving the most recent silicon carbide metal oxide semiconductor field effect transistors, and its experimental validation on a home-made emulator. Highest efficiency in reversible mode, compactness, and thermal enhancement are the targeted objectives that have been achieved. The power converter prototype evaluated on an original pulse width modulation testing-bench is able to emulate the working of the flywheel system. High frequency pulse width modulation switching, speed cycle operating, and thermal losses are evaluated. In addition, an efficiency above 99% for the converter has been attained, enabling robust functioning of the flywheel system emulator to perform specific charging profiles for electric vehicles.

An Online Junction Temperature Monitoring Method for SiC MOSFET Based on Drain-source Voltage Change Rate During Turn-on Transient

This paper analyzes the turn-on transient of silicon carbide (SiC) metal oxide semiconductor field effect transistor (MOSFET) based on the basic physical equation, and the analysis model of drain-source voltage change rate (dv ds/dt ) during turn-on transient is derived. The change rule of dv ds/dt of SiC MOSFET during turn-on transient and its temperature-dependent characteristics are studied, and the calculations generally fit the measurements well. Experimental results show that the magnitude of turn-on dv ds/dt increases with increasing temperature and exhibits good linearity. The influence of driving conditions on the temperature dependence of the turn-on dv ds/dt is also analyzed through the model, finding that the temperature sensitivity can be improved by reducing the driving forward bias voltage and increasing the driving resistance. Finally, the online junction temperature monitoring experiments are used to verify the accuracy and effectiveness of the proposed method.

Outlook for Dielectric/SiC Interfaces for Future Generation MOSFETs

Silicon carbide (SiC) metal-oxide semiconductor (MOS) power devices such as metal-oxide semiconductor field-effect transistors (MOSFETs) require a stable and low defect-density interface, and a high-quality dielectric, for good device performance and reliability. Notably, the interface and dielectric properties determine the threshold voltage stability, the field-effect channel mobility, and the device lifetime as limited by dielectric breakdown in both the forward on-state and reverse blocking conditions. Here we discuss the present state of SiC MOS processing and properties and point to directions for future development. Important items to address are: 1) interface passivation approaches; 2) dielectrics; 3) device design; and 4) in-depth measurements of the interface quality and reliability.

An Electric Field Probe With High Immunity for SiC MOSFET Switching Voltage Measurement

Accurate measurement of switching voltage is the basis for evaluating the dynamic behavior of power devices. With the development of wide bandgap (WBG) devices, the high switching speed of the silicon carbide metal–oxide–semiconductor field-effect transistors (SiC MOSFETs) imposes high bandwidth and strong immunity requirements on the voltage probe. The electric field probe (EFP) based on the principle of electric field coupling has a naturally high bandwidth, which can be considered as a potential competitor. However, due to the noncontact suspended measurement method, the interference signal is easily coupled by the EFP and affects the measurement accuracy. Thus, this article proposes a high noise-immune structure for EFP to implement the measurement of SiC MOSFET switching voltage. The EFP is manufactured from the printed circuit board (PCB), which can provide a more accurate parameter design. Then, the shielded copper clad and via arrays structures are proposed, and the effectiveness of the shielding structure is verified by adding an interference source. Finally, through the double-pulse test, it is demonstrated that the performance of the proposed EFP is sufficient to measure the switching voltage of SiC MOSFETs.

Hybrid Si/SiC Switches: A Review of Control Objectives, Gate Driving Approaches and Packaging Solutions

Hybrid silicon (Si)/silicon carbide (SiC) switches are gaining increased attention for designing high-efficiency and high-power density energy conversion systems. They offer very good conduction and switching power loss performance compared to using only Si insulated gate bipolar transistor (IGBT) or SiC metal–oxide–semiconductor field effect transistor (MOSFET) devices as a result of combining the best properties of both devices. Several Si/SiC gate control strategies, gate driving approaches, and packaging considerations have been proposed in the literature. This article presents a comprehensive review and performance comparison of different Si/SiC gate control strategies, gate driver solutions, and packaging approaches that are already proposed in the literature. In addition, it aims to provide a general guideline for selecting the appropriate Si/SiC gate control approach that is suitable for different applications considering several Si/SiC switch design properties. It also aims to establish a general metrics for evaluating the performance of different Si/SiC gate driver solutions that are proposed in the literature in order to help the designer choose a suitable gate driver solution for different applications. Moreover, it highlights future research and development needs of hybrid Si/SiC switches in terms of gate control techniques, gate driver approaches, and packaging solutions in order to achieve further performance improvements and fully exploit their benefits.

Design and Implementation of a Paralleled Discrete SiC MOSFET Half-Bridge Circuit with an Improved Symmetric Layout and Unique Laminated Busbar

Silicon carbide (SiC) metal oxide semiconductor field effect transistors (MOSFETs) have many advantages compared to silicon (Si) MOSFETs: low drain-source resistance, high thermal conductivity, low leakage current, and high switching frequency. As a result, Si MOSFETs are replaced with SiC MOSFETs in many industrial applications. However, there are still not as many SiC modules to customize for each application. To meet the high-power requirement for custom applications, paralleling discrete SiC MOSFETs is an essential solution. However, it comes with many technical challenges; inequality in current sharing, different switching losses, different transient characteristics, and so forth. In this paper, the detailed MATLAB®/Simulink® Simpscape model of the SiC MOSFET from the datasheet and the simulation of the half-bridge circuit are investigated. Furthermore, this paper proposes the implementation of the four-paralleled SiC MOSFET half-bridge circuit with an improved symmetric gate driver layout. Moreover, a unique laminated busbar connected directly to the printed circuit board (PCB) is proposed to increase current and thermal capacity and decrease parasitic effects. Finally, the experimental and simulation results are presented using a 650 V SiC MOSFET (CREE) double-pulse test (DPT) circuit. The voltage overshoot problems and applied solutions are also presented.

Comparisons and Evaluations of Silicon and Wide Band Gap Devices at Cryogenic Temperature

In this article, the static and dynamic characterizations for semiconductors with different materials, including silicon (Si), silicon carbide (SiC), and gallium nitride (GaN), are evaluated and compared at room temperature and cryogenic temperature (liquid nitrogen temperature). For static characterizations, the on-state resistance and threshold voltage are evaluated. For dynamic characterizations, the turn-on switching loss, turn-off switching loss, and dynamic on-state resistance ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ds(on)</sub> ) are evaluated. The results demonstrate that Si and GaN based semiconductors have improved performances with lower on-state resistance and faster switching speed at low temperature operations. For SiC based semiconductors, the on-state resistance increases significantly at cryogenic temperature. The switching speed is reduced dramatically for the evaluated 1.2 kV SiC metal oxide semiconductor field effect transistors (MOSFETs) at cryogenic temperature. This makes it less attractive for cryogenic applications. For the evaluated 650 V and 900 V SiC MOSFETs, the switching speed remains almost unchanged at low temperature. GaN high electron mobility transistor (HEMT) demonstrates a fast turn-on switching speed at low temperature, where the device's <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dv/dt</i> and <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">di/dt</i> are almost doubled when compared with room temperature. In addition, the dynamic <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ds(on)</sub> of the evaluated GaN HEMTs also decreases at low temperatures. The evaluation results can serve as guidelines for cryogenic power electronics applications. Meanwhile, the future work for semiconductors cryogenic characterizations is discussed.

Proton induced radiation effect of SiC MOSFET under different bias

Radiation effects of silicon carbide metal–oxide–semiconductor field-effect transistors (SiC MOSFETs) induced by 20 MeV proton under drain bias (V D = 800 V, V G = 0 V), gate bias (V D = 0 V, V G = 10 V), turn-on bias (V D = 0.5 V, V G = 4 V) and static bias (V D = 0 V, V G = 0 V) are investigated. The drain current of SiC MOSFET under turn-on bias increases linearly with the increase of proton fluence during the proton irradiation. When the cumulative proton fluence reaches 2 × 1011 p⋅cm−2, the threshold voltage of SiC MOSFETs with four bias conditions shifts to the left, and the degradation of electrical characteristics of SiC MOSFETs with gate bias is the most serious. In the deep level transient spectrum test, it is found that the defect energy level of SiC MOSFET is mainly the ON2 (E c – 1.1 eV) defect center, and the defect concentration and defect capture cross section of SiC MOSFET with proton radiation under gate bias increase most. By comparing the degradation of SiC MOSFET under proton cumulative irradiation, equivalent 1 MeV neutron irradiation and gamma irradiation, and combining with the defect change of SiC MOSFET under gamma irradiation and the non-ionizing energy loss induced by equivalent 1 MeV neutron in SiC MOSFET, the degradation of SiC MOSFET induced by proton is mainly caused by ionizing radiation damage. The results of TCAD analysis show that the ionizing radiation damage of SiC MOSFET is affected by the intensity and direction of the electric field in the oxide layer and epitaxial layer.