Silicon Bipolar Process Research Articles

A comparison of GaAs HJBT and silicon bipolar technologies for high-speed analog-to-digital converters

The potential using the emerging GaAlAs/GaAs heterojunction bipolar transistor (HJBT) technology is all-parallel analog-to-digital (A/D) converters is studied. To put into perspective the HJBT predictions made, a comparison of the ultimate performance levels achievable with contemporary silicon bipolar processes is given. Optimized latched compensators were developed for each technology and simulations on SPICE were carried out to determine the maximum sample rate and large-signal analog bandwidths that would be achieved. As both technologies are produced in-house, models were available for processors in the latter stages of development, namely the standard 1- mu m silicon bipolar process, and the 4- mu m HJBT process, as well as processes at an earlier stage of development, the enhanced 1- mu m silicon bipolar processes and the 2.5- mu m HJBT process. This enabled the trend of performance improvements with time to be compared.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

1-Gword/s pseudorandom word generator

An integrated circuit that generates 16-bit pseudorandom words at up to 1 Gword/s is presented. The concept of a pseudorandom word sequence is introduced. The pseudorandom words shown have excellent properties for testing serial or parallel components and data links. If serialized, the words would form a pseudorandom bit sequence with a potential maximum serial bit rate of 16 Gb/s. The circuit was implemented in an advanced silicon bipolar process with an f/sub T/ of 10 GHz. The chip includes 16 output drivers, with adjustable amplitude and offset, capable of driving 25- Omega loads with 0.8-V swings and 400-ps rise times. Total chip dissipation is under 4 W on a 2-mm*2-mm die.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Investigation of single-event upset (SEU) in an advanced bipolar process

An extensive analytical and experimental study of SEU in an advanced silicon bipolar process was made. The modeling used process and device parameters to model the SEU charge, collection, and circuit response derived from a special version of PISCES in cylindrical coordinates and SPICE, respectively. Data are reported for test cells of various sizes. >

GHz-Band Monolithic Modem IC's

GHz-band monolithic modem IC's, such as a double balanced mixer IC, a 90° phase shifter IC, and a carrier switch IC, for high-speed QPSK modems have been developed using monolithic lumped constant circuit techniques and advanced silicon bipolar process technology and are discussed in this paper. A double balanced mixer with unbalance-balance converters and a common-mode feedback circuit has achieved an amplitude error of less than 0.2 dB/sub p-p/ and a phase error of Iew than 1.7° p-p at 1 GHz local oscillator frequency. A precise monolithic 90° phase shifter for the 1-GHz band was constructed by using variable RC phase stiifters. An ON/OFF ratio of more than 65 dB for frequencies below 1 GHz has been achieved by employing a carrier switch consisting of a differential stage with a cascode circuit configuration. These IC's are applicable to QPSK modems transmitting baseband signals to the extent of 400 Mb/s at 1 GHz local oscillator frequency.

High Gain Equalizing Amplifier Integrated Circuits for a Gigabit Optical Repeater

Equalizing amplifier circuits for a gigabit optical-fiber transmission system are integrated on two monolithic chips implementing an advanced silicon bipolar process. Several new circuit techniques such as a broad-band 50-/spl Omega/ matching amplifier and an electrically controlled and adjusted peaking technique are employed. It is clarified that the main degradation factors of circuit stability are parasitic capacitance between the input and output terminals, and the crosstalk occuring through the wire bonding inductance. The maximum gain and 3-dB down bandwidth of the equalizing amplifier IC's are 64 dB and 1.2 GHz, respectively. The noise figure obtained is 4.5 dB within the dc to 2-GHz range.

Bipolar monolithic amplifiers for a gigabit optical repeater

Main amplifier, AGC amplifier, and preamplifier ICs have been designed and fabricated using an advanced silicon bipolar process to provide the required characteristics of repeater circuits for a gigabit optical fiber transmission system. The bipolar technology used involved a separation width of 0.3 /spl mu/m between the emitter and the base electrode. New circuit techniques were also used. The differential type main amplifier has a peaking function which can be varied widely by means of DC voltage supplied at the outside IC terminal. A bandwidth which can be varied to about three times the value for a nonpeaking amplifier is easily obtained. The gain and maximum 3-dB down bandwidth were 4 dB and 4 GHz, respectively. The main feature of the AGC amplifier is that the diodes are connected to the emitters of the differential transistor pair to improve the linearity. The maximum gain and 3-dB down bandwidth were 15 dB and 1.4 GHz, respectively, and a dynamic range of 25 dB was obtained. The preamplifier has a shunt-series feedback configuration. Furthermore, a gain and 3-dB down bandwidth of 22 dB and 2 GHz, respectively, were achieved with an optimum circuit design. The noise figure obtained was 3.5 dB.

Very Wide-Band Silicon Bipolar Monolithic Amplifiers

We have developed very wide-band monolithic amplifiers, using an advanced silicon bipolar process called SST-2 which made it possible to lower base resistance and parasitic capacitance. Analog ICs, such as AGC and post amplifiers, for repeater circuits of a high speed optical fiber transmission system were fabricated, and the following excellent characteristics were obtained. (1) The gain and 3 dB down bandwidth of the post amplifier are 15 dB and 1.4 GHz, respectively. (2) The maximum gain, 3 dB down bandwidth and dynamic range of the AGC amplifier are 28 dB, 630 MHz and 30 dB, respectively.

Monolithic integrated amplifiers for 400 Mbit/s optical repeater

Introduction of monolithic integrated circuit technology to high bit rate optical repeater is studied. Monolithic integrated amplifiers are realised for a 400 Mbit/s optical repeater such as a preamplifier, AGC amplifier and postamplifier, using advanced silicon bipolar process technology. An equalising amplifier with four monolithic amplifiers got 66 dB maximum gain, 35 dB variable gain and 350 MHz band-width with 550 mW power consumption.

A versatile ECL multiplexer IC for the Gbit/s range

A new approach to digital multiplexing for communication systems operating in the Gbit/s range is presented. With a single function, monolithically integrated in the established silicon bipolar process, many operations required by the communication system's multiplex equipment are achieved at data rates of up to 3 Gbits/s. The IC is a four-channel multiplexer designed to interface readily with ECL families. Demonstrations of the ICs performance include pseudorandom pattern generation by multiplexing ECL inputs up to 2 Gbits/s, demultiplexing into ECL registers at 1 Gbits/s, clock extraction in a 560 Mbit/s coaxial cable transmission system, and a modulo-n divider technique for timing generation using ECL feedback shift registers for frequencies up to 1.6 GHz. The demonstrations highlight the multiplexer's ability to effectively extend the system speed limit of commercially available ECL from a few hundred Mbits/s to the Gbit/s range. An eight-input multiplexer using three chips in a hybrid assembly is demonstrated multiplexing a static input pattern up to 2.8 Gbits/s.