Significant Bit Research Articles

Generating pseudo-random numbers with a Brownian system

We use a deterministic dynamical system that simulates a Brownian movement over time to produce pseudo-random sequences of binary numbers. We show that the used Brownian system has two positive Lyapunov exponents, this characteristic is different of a chaotic system that has only one maximum positive Lyapunov exponent. The implementation of the random number generator uses fixed point arithmetic with numbers with 5 bits for the integer part and 58 bits for the fractional part. The eight least significant bits for each variable of the 3rd order Brownian system are concatenated to form the sequences of random bits. The generated sequences pass all the NIST and TestU01 statistical randomness tests. Furthermore, a hardware design in FPGA of the proposed pseudo-random generator is presented with a throughput equal to 1085.16 Mb/s. For the best of our knowledge, this is the first time a Brownian system is used as the core of a PRNG.

Enhancing Least Significant Bit Steganography Image Fidelity Using Brotli Compression

The rapid growth of technology has provided extensive convenience and openness in accessing information, yet this hasn't been balanced with an equivalent enhancement in information security. Steganography plays a crucial role in concealing and protecting data, with the Least Significant Bit (LSB) method being a commonly used algorithm that operates by substituting the least significant bits in the image pixels with the bits of the data to be hidden, aiming to preserve the image quality. This research aims to enhance the quality of the steganography result using LSB by employing the Brotli compression technique, coupled with increasing image's capacity. Brotli compression aims to reduce the size of the resulting stego image by combining embedded data that share identical values. Experiment results will be obtained by comparing the original image with the stego image using metrics like Mean Square Error (MSE), Peak Signal to Noise Ratio (PSNR), and Structural Similarity Index (SSIM). The experiments successfully demonstrated that the integration of LSB with Brotli compression outperformed the regular LSB method, showing a 6.64% increase in PSNR, followed by a decrease in MSE by approximately 63.79%, and an increase in SSIM by around 0.0039%. This was accompanied by a continuous increase in compression values depending on the input data size. These results indicate that the integration of LSB with Brotli compression was successfully implemented to enhance the fidelity of the stego image

Improving Data Embedding Capacity in LSB Steganography Utilizing LSB2 and Zlib Compression

In an increasingly advanced era, the exchange of information through digital tools has become a common practice. With easy access and advancing facilities, securely and covertly exchanging data has become a challenging task. Therefore, the technique of steganography can be used as a solution for data hiding and protection, enabling safer data exchanges. Steganography is a method to conceal data within a transmission object, which can be an image, video, audio, and more. In this research, steganography will be performed using images as the transmission object. This study is done to offer a modification of the Least Significant Bit (LSB) steganography technique by utilizing the LSB-2 method, along with the utilization of the Zlib compression algorithm. The modification and use of the Zlib compression algorithm aim to increase the message capacity that can be embedded in the transmission object while preserving the image quality. The results of the experiments will be presented in tabular form by comparing the original image with the steganography-processed image using metrics such as Mean Square Error (MSE), Peak Signal-to-Noise Ratio (PSNR), and Structural Similarity Index (SSIM) as measures of image quality. The experiments conducted results in an increase of capacity of approximately 36.54%, an increase in PSNR value of approximately 4.72%, accompanied by a decrease in MSE value in average of 49.19%, and SSIM values constantly at 0,99999 thus proving the proposed method successfully increased the embedded massage capacity while preserving even enhance the quality of the stego image produced by the embedding process

A Tbit/s parallel real-time physical random number scheme based on chaos optical frequency comb of Si<sub>3</sub>N<sub>4</sub> micro-ring

<sec>Physical random numbers (PRNs) own various advantageous characteristics, including unpredictability, non-repeatability, higher security and reliability. Meanwhile, laser chaos has attracted great attention in the field of PRN. In terms of single channel PRN, laser chaos schemes can achieve a much higher bit-rate than traditional quantum PRN schemes. So far, various laser chaos PRN schemes have been discussed in order to enhance the performance of single channel laser chaos PRN. However, considering the limited bandwidth of laser chaos, especially the bandwidth of digital electronic circuit, the development potential of single channel PRN should be limited and may fall into the trap of high performance and expensive cost. Recently, the applications of multi-channel parallel PRN schemes have been developed. These parallel types may balance the high performance of PRN in a low cost. Recent progress indicates that chaotic micro-comb may have good potential. The micro-comb exhibits highly nonlinear and complex dynamic characteristics, and each comb tooth may show chaotic oscillation. The wavelength division multiplexing technology enables large-scale optical parallel output, providing the possiblity for large-scale parallel PRN generation. However, most of these PRN schemes are offline rather than true online and real-time random numbers. Thus, the development of real, online real-time parallel PRN solutions has great interest and research value in related fields.</sec><sec>Herein we experimentally demonstrat an ultra-high-speed parallel real-time physical random number generator, which is achieved though the combination of chaotic micro-comb of chip-scale Si<sub>3</sub>N<sub>4</sub> ultra-high Q micro-resonator and a high-speed field programmable gate array (FPGA). The results show that the Si<sub>3</sub>N<sub>4</sub> ultra-high Q micro-resonator generates a micro-comb with hundreds of channels, each channel can route into an optically chaotic state, and become an excellent physical entropy source. Using FPGA onboard multi-bit analog-to-digital converter, the filtered optical chaos signal from the micro-comb is discretely sampled and quantized, and resulting in an 8-bit binary bitstream. Taking real-time self-delayed exclusive or (XOR) processing of bitstream and preserving 4 least significant bits, the qualified physical random bitstream with real-time 5 Gbits/s rate is realized experimentally. Considering that there are 294 chaotic comb teeths, our approach anticipates a throughput of 1.74 Tbits/s of real-time physical random bits. Our results could offer a new integrated and ultra-high-speed option for real-time physical random number sources.</sec>

Optimizing Digital Image Steganography through Hybridization of LSB and Zstandard Compression

In response to the growing need for secure digital communication globally, this research delves into an innovative strategy for enhancing data transmission security through steganography. This inventive approach involves the integration of the conventional Least Significant Bit (LSB) method with Zstandard (Zstd) compression to elevate the quality of stego images. The study carefully explores how the synergistic use of LSB and Zstd contributes to an improved equilibrium between embedding capacity and visual quality in stego images. This hybrid methodology capitalizes on the efficiency of Zstd in reducing file size, thereby facilitating more effective data concealment using LSB. The experimental outcomes showcase a notable 51.2% increase in embedding capacity, a 4.70% elevation in PSNR value, accompanied by a substantial 51.03% decrease in MSE value. Additionally, SSIM values hover around 0.007%, indicating a perceptually minimal difference between the original and steganographically modified images. These compelling results underscore the efficacy of the proposed method, highlighting its proficiency in preserving and enhancing the quality of stego images generated through the embedding process. This research signifies a significant stride in the realm of secure digital communication, demonstrating a promising fusion of traditional LSB with advanced Zstd compression for optimizing digital image steganographic.

Blind Steganalysis Method Using Image Spectral Density and Differential Histogram Correlative Power Spectral Density

Recent research has demonstrated the success of employing neural networks for the purpose of detecting image tampering. Nevertheless, the utilization of reference-free steganalysis has become increasingly popular as a result of the challenges associated with obtaining an annotated dataset. This dataset is crucial for the classification process using neural networks, which aims to detect and identify instances of tampering. This paper introduces a robust approach to blind steganalysis, utilizing image spectral density and differential histogram correlative power spectral density. The proposed method employed two distinct forms of image data, namely a gray-scale image and true-color image data. The results indicate that the proposed methodology successfully achieved the anticipated outcomes in identifying manipulated images as evidenced by its successful application on the two distinct datasets. In the experiment results, the proposed technique succeeded quite well in terms of accuracy at low embedding ratios. Also, it successfully recognized sequential and random least significant bit steganography.

An In-Depth Analysis of Steganography Techniques: From Classical Edge Detection to Adaptive Approaches

This paper delves into the realm of steganography, focusing on the evolution of techniques employed to conceal data within digital images. Beginning with an exploration of the motivations behind information security and the role of cryptography, the paper introduces adaptive steganography as a discreet means of incorporating private data into a cover medium. The discussion then shifts to the three key factors in image steganography - resilience, capacity, and imperceptibility - forming the foundation of effective data hiding. The spatial and frequency domain methods are compared, with specific emphasis on the classical Least Significant Bit insertion and more advanced adaptive steganography techniques. The paper further introduces edge-based steganography, highlighting the advantage of manipulating edge areas for increased imperceptibility. Moving beyond definitions and types, the paper provides a comprehensive analysis of notable research works in the field, elucidating their objectives, methodologies, results, strengths, and limitations. The conclusion reflects on the dynamic landscape of steganography, acknowledging both achievements and areas for improvement.

The Coupling of a Multiplicative Group and the Theory of Chaos in the Encryptions of Images

This study is centered on a significant scientific contribution within the realm of image cryptography. The chosen approach involves employing the bidimensional Arnold Cat Map transformation to reposition and modify pixel locations, guided by parameters derived from the original image. The construction of the multiplicative group Z/nZ, comprising equivalence classes modulo n, relies on a hyper-chaotic sequence derived from the 2D sinusoidal logistic modulation map. The correlation between this sequence and the preceding step yields an unpredictable blurring pattern, effectively altering the statistical properties of resulting matrices and distributing the influence of individual bits across the entire encrypted image. For each pixel, the encryption process entails an XOR operation with the Z/nZ group, followed by a right shift based on the three Least Significant Bits (LSB) of the preceding pixel. This meticulous procedure is iterated for every pixel, leaving no trace of similarity or association with the original plaintext image, effectively rendering it blurred and indecipherable. To gauge the efficacy of our algorithm, we subjected it to thorough evaluation utilizing diverse criteria, including histogram analysis, which unveiled a nearly uniform pattern in the encrypted images. Entropy values were found to be close to 8, while the correlation analysis exhibited a pronounced proximity to 0. Moreover, we subjected our approach to differential attacks, and the calculated values of the Number of Changing Pixel Rate (NPCR > 99.6) and the Unified Averaged Changed Intensity (UACI > 33.2) corroborated the strength and resilience of our methodology. In addition, to establish its comparative standing, we undertook a comprehensive assessment, meticulously comparing our method to various existing approaches from the literature, including those proposed by Hua, Es-sabry, and Faragallah. This systematic process accentuated the high level of responsiveness and sensitivity inherent in our approach, thus underscoring its innovative and promising nature

On the Joint Optimization of Signal Constellations and Bit Mappings

On the Joint Optimization of Signal Constellations and Bit Mappings

Design of Low Power SAR ADC with Novel Regenerative Comparator

This paper introduces two low-power design techniques for a successive approximation register (SAR) analog-to-digital converter (ADC) used in transmitting physiological signals. The first technique is called dual split switching, involving the use of a one-sided charge-scaling digital-to-analog converter (DAC) to minimize switching energy by reducing leakage in a dual transmission gate. The second technique, known as the set and reset phase, determines the amplification and comparison phases of the comparator. This approach reduces the delay time of the comparator through the use of a folded cascode pre-amplifier and a regenerative latch. The design includes a Serial-in-Parallel-Out (SIPO) N-bit register and SAR, implemented using negative edge-triggered D flip-flops (DFFs). To optimize power consumption, the supply voltage of the SAR ADC is set to 500 mV. The concept of a variable threshold is utilized throughout the design to enable operation with this lower supply voltage. The SAR ADC is designed to support a sampling rate of up to 1 Msps (mega-samples per second). The circuit is implemented using standard UMC180nm technology. According to the test results, the power consumption of the SAR ADC is only 29.06 uW, and the achieved sampling rate is 5 Ksps (kilo-samples per second). The maximum differential non-linearity (DNL) is measured to be +0.9/−0.82 least significant bits (LSBs).

Recovering sign bits of DCT coefficients in digital images as an optimization problem

Recovering unknown, missing, damaged, distorted, or lost information in DCT coefficients is a common task in multiple applications of digital image processing, including image compression, selective image encryption, and image communication. This paper investigates the recovery of sign bits in DCT coefficients of digital images, by proposing two different approximation methods to solve a mixed integer linear programming (MILP) problem, which is NP-hard in general. One method is a relaxation of the MILP problem to a linear programming (LP) problem, and the other splits the original MILP problem into some smaller MILP problems and an LP problem. We considered how the proposed methods can be applied to JPEG-encoded images and conducted extensive experiments to validate their performances. The experimental results showed that the proposed methods outperformed other existing methods by a substantial margin, both according to objective quality metrics and our subjective evaluation.

DEVELOPMENT OF NOVEL COMPARISON BASED STEGANOGRAPHY ALGORITHMS ON MULTIMEDIA TO HIDE PRIVATE DATA

Throughout history, humanity has had secrets to safeguard, information that needed to be conveyed to allies in a way that enemies couldn't decipher. To achieve this goal of safeguarding important and valuable information, cryptography and steganography have been frequently used methods both in the past and in today's world. This article introduces a steganographic algorithm designed for hiding data in the color images, along with two different algorithm designs derived from this method. The bits of the hidden message are embedded sequentially into each pixel using the bit comparison. The comparison method works by matching the bits of the image and the message. The least significant bits (LSB) of the carrier (cover) image bytes change depending on the number of matching bits between the carrier image and the hidden message. The proposed method has the potential to hide 1 byte of data within 5 bytes under optimal conditions. The designed algorithms have been tested on a series of color images, and satisfactory results have been achieved in terms of embedding a sufficient amount of data into the images without compromising image quality. The results have been compared with the results of the LSB technique and similar methods based on various performance criteria.

HSB based reversible data hiding using sorting and pairwise expansion

Reversible data hiding (RDH) continues to advance in its applicability across diverse fields, including medical imaging, military applications, and cloud computing. In recent times, there has been a proliferation of RDH methods that focus on embedding in the higher significant bit (HSB) plane, as opposed to the least significant bit (LSB), in order to leverage the greater correlation, thereby achieving a larger embedding capacity (EC). This paper introduces a novel and efficient RDH approach that utilizes sorting and pairwise expansion. The proposed method initiates by partitioning the original image into HSB and LSB planes and then converting the HSB plane into a chessboard pattern. Subsequently, pixels are organized in ascending order based on their predicted values, forming groups of 1 × 3 pixels. The embedding process occurs in two passes: the first employs a difference expansion-based RDH, while the second pass employs pairwise expansion to minimize distortion. This method accomplishes an expanded EC while preserving the quality of the resulting image. Experimental results also demonstrate that the proposed approach maintains a significant lead of approximately 0.5 dB over the best-performing existing methods, underscoring its superior embedding efficiency.

Hybrid of Least Significant Bits and most Significant Bits for Improving Security and Quality of Digital Image Steganography

Hybrid of Least Significant Bits and most Significant Bits for Improving Security and Quality of Digital Image Steganography

Energy-efficient and fast IMPLY-based approximate full adder applying NAND gates for image processing

Today’s processing applications require frequent and energy-consuming data transfers between memory and processing elements. Reducing the dimensions of Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) brings essential problems. Therefore, applying emerging technologies should be considered as a solution. As a crossbar array compatible technology, memristors can play the computing and memory device roles. Therefore, it is suitable for In-Memory Computing (IMC). The issue of changing the computation method to achieve higher efficiency can also be considered. Today, approximate computing is of great interest for error-tolerant applications. These two concepts are applied, and an approximate serial full adder based on the Material Implication (IMPLY) method is introduced. The proposed Serial Approximate Full Adder using NAND gates (SAFAN) reduces the number of steps and energy consumption by up to 30% and 26% compared to approximate ones, 70% and 68% compared to exact ones, respectively. The error analysis results show that the accuracy decreases to a reasonable level by applying the SAFAN to the least significant bits (LSBs) of an approximate 8-bit adder. Image analysis criteria evaluated the functionality of the SAFAN in image processing applications, and the results showed the suitable performance of the SAFAN in error-tolerant applications.

Performance Analysis of The Last Significant Bit (LSB) Method in Steganography for Data Hiding in Image Data

Technology as a means of conveying information can have significant implications for the security and confidentiality of data and information content. When a sender wishes to convey a message to someone and does not want the message to be easily visible, the concealment of this message becomes crucial for the sender. One commonly used method for data concealment is the Least Significant Bit (LSB) method in steganography. The LSB method is preferred for its simplicity, fast process, and greater capacity. Messages are embedded by replacing the least significant bit in the host image with the message bits, with the rule that the number of message bits does not exceed the number of bits in the host image. Based on research findings, the results of steganography are difficult to distinguish from the original content through visual observation. Therefore, it can be concluded that the steganography method is highly effective for concealing a message.

Securing the Future: A Resourceful Jamming Detection Method Utilizing the EVM Metric for Next-Generation Communication Systems

This paper addresses the escalating threat of malicious jamming in next-generation communication systems, propelled by their continuous advancement in speed, latency, and connectivity. Recognizing the imperative for communication security, we propose an efficient jamming detection method with distinct innovations and contributions. Motivated by the growing sophistication of jamming techniques, we advocate the adoption of the error vector magnitude (EVM) metric, measured in IQ symbols, deviating from traditional received signal strength and bit error rate-based measurements. Our method achieves enhanced jamming detection sensitivity, surpassing existing approaches. Furthermore, it introduces low complexity, ensuring resource-effective detection. Crucially, our approach provides vital jammer frequency information, enhancing counteraction capabilities against jamming attacks. It demonstrates stable results against varying system parameters, such as modulation type and code rate, thereby contributing to adaptability. Emphasizing practicality, the method seamlessly integrates into 5G and LTE systems without imposing additional overhead. Versatility is demonstrated through successful operations in diverse scenarios that are run by extended simulation conditions. Theoretical analysis substantiates these advantages, reinforcing the validity of our methodology. The study’s success is further validated through laboratory experiments, providing empirical evidence of its effectiveness. The proposed method represents a significant step toward fortifying next-generation communication systems against evolving jamming threats.

Rethinking the Encoding of Integers for Scans on Skewed Data

Bit-parallel scanning techniques are characterized by their ability to accelerate compute through the process known as early pruning. Early pruning techniques iterate over the bits of each value, searching for opportunities to safely prune compute early, before processing each data value in its entirety. However, because of this iterative evaluation, the effectiveness of early pruning depends on the relative position of bits that can be used for pruning within each value. Due to this behavior, bit-parallel techniques have faced significant challenges when processing skewed data, especially when values contain many leading zeroes. This problem is further amplified by the inherent trade-off that bit-parallel techniques make between columnar scan and fetch performance: a storage layer that supports early pruning requires multiple memory accesses to fetch a single value. Thus, in the case of skewed data, bit-parallel techniques increase fetch latency without significantly improving scan performance when compared to baseline columnar implementations. To remedy this shortcoming, we transform the values in bit-parallel columns using novel encodings. We propose the concept of forward encodings: a family of encodings that shift pruning-relevant bits closer to the most significant bit. Using this concept, we propose two particular encodings: the Data Forward Encoding and the Extended Data Forward Encoding. We demonstrate the impact of these encodings using multiple real-world datasets. Across these datasets, forward encodings improve the current state-of-the-art bit-parallel technique's scan and fetch performance in many cases by 1.4x and 1.3x, respectively.

Separable Reversible Data Hiding in Encrypted Images for Remote Sensing Images.

High security and effectiveness are critical performance metrics in the data transmission process for satellite remote sensing images, medical images, and so on. Previously, the receiver could gain a high-quality cover image (lossy) after decryption in a separable manner to balance embedding capacity (EC) and security. Completely separable, reversible data hiding in encrypted image (SRDH-EI) algorithms are proposed to address this issue. In this study, the cover image was preprocessed at the sender's end. The pre-embedded pixels and most significant bits (MSB) were compressed via two coding methods to reserve space. Additionally, the header data were embedded for marking. Finally, auxiliary data and secret data were embedded in a forward "Z" and reverse "Z" shape before and after encryption, respectively. The receiver could extract secret data and decrypt the cover image separately using the keys and markers. The experimental results demonstrate that the algorithm reached a high EC for remote sensing images by utilizing pixel correlation at multiple positions within the groups. The cover image could maintain its entropy during the data embedding process, ensuring security. The decrypted image could be recovered without distortion, furthermore, the receiver could achieve complete separability, so it has good application prospects for remote sensing images.

A 12~14-Bit SAR-SS Hybrid ADC with SS Bit Shifting Resolution Reconfigurable Method for Bio-Signal Processing

This paper presents a low-power, high-resolution reconfigurable hybrid ADC for bio-electrical signal processing. The proposed ADC contains a SAR ADC for the most significant bit (MSB) and a single-slope ADC for the least significant bit (LSB). To solve the issue of exponentially increasing sampling speed based on the resolution of the single-slope ADC, the SAR ADC is designed to be reconfigurable with a resolution of 8–10-bit, while the single-slope ADC is configured with a resolution of 4-bit. To achieve this resolution reconfiguration, the bit shifting method is proposed and implemented with reconfigurable SAR logic circuit and 4-bit single-slope digital ramp generator. Measurement results demonstrate the power consumption of 34.0 uW, which includes analog power of 23.8 uW and digital power of 10.2 uW, INL/DNL of ±3.5 LSB and −1.0/+2.5 LSB. The ENOB and FoM are measured to be 10.8 bits and 53 fJ/step, respectively.