SiC SiC Schottky Barrier Diode Research Articles

Recovery at room temperature annealing on 4H–SiC SBDs by gamma irradiation

The impact of gamma irradiation and subsequent recovery at room temperature on the device performance of commercial 4H–SiC Schottky barrier diodes (SBDs) was investigated through the analysis of the electrical properties and the deep level transient spectroscopy (DLTS). The ideality factor (n) of the SBDs increased from 1.01 to 1.13 with an increasing irradiation dose, but recovered after 7 days of room temperature annealing. To determine Schottky barrier heights (ΦB), both current-voltage (I–V) and capacitance-voltage (C–V) measurements were performed. The results of the combined I–V and C–V analysis showed that a little variations in ΦB were consistent with the variations in irradiation dose, except for the ΦB calculated by C–V measurement at 30 kGy. Similarly, the ΦB recovered after 7 days at room temperature. DLTS analysis revealed the presence of Z1/Z2 traps in the samples after 7 days at room temperature annealing. These traps exhibited activation energies ranging from 0.46 eV to 0.55 eV. The trap concentration (NT) increased from 9.48 × 1012 cm−3 to 2.23 × 1013 cm−3 with the increasing irradiation dose. These findings indicate that gamma irradiation-induced point defects were the primary cause of the degradation of 4H–SiC SBDs.

Measurement of radiation-induced current through a SiC Schottky barrier diode in a clinical carbon beam cancer therapy field

Real-time physical dose evaluation was performed using radiation-tolerant SiC Schottky barrier diodes (SBDs). The radiation-induced current (RIC) generated in the SBD was measured under clinical carbon beam irradiation. A SiC SBD semiconductor detector (epitaxial layer, 69 µm thick; impurity concentration, 9.1 × 1014 cm−3; electrodes, 1 mm2) was used. The SiC SBD was irradiated with carbon ions having energy of 290 MeV/n at a maximum flux of therapeutic intensity (1 × 109 particles per second) at the Gunma University Heavy Ion Medical Center. The transition of the RIC value at any depth point in the Bragg curve was evaluated by changing the thickness of a water tank placed in front of the SiC SBD. The RIC from the SiC SBD was obtained with an applied voltage of up to 100 V for each moderator thickness. The physical dose distribution was also measured using a commercial ionization chamber. The Bragg peak was determined from the RIC distribution, and the transition was similar to that observed using the commercial ionization chamber.

Ultra-thermostable embedded liquid cooling in SiC 3D packaging power modules of electric vehicles

As the enhanced acceleration performance of electric vehicles demands improved mileage capabilities, 3D packaging is a promising solution for developing high-power-density SiC power modules. However, 3D packaging causes instability owing to the increased heat flux and heat dissipation inside the power module. Thus, this paper proposes an ultra-thermostable embedded liquid cooling strategy for the thermal management of SiC 3D packaging power modules in electric vehicles. We constructed an embedded micro pin–fin (E-MPF) with non-uniform density in the SiC substrate to mount the SiC Schottky barrier diodes (SBDs). The thermostability and temperature uniformity of the SiC 3D packaging power modules containing E-MPF SiC and direct bond copper (DBC) substrates were verified. The results revealed that the SiC SBDs mounted on the E-MPF SiC substrate could stably operate up to a total power dissipation of 320 W at a 100 mL/min coolant (water) flow rate, whereas those attached on the DBC substrate could be operated only under 144 W (operation terminated at a maximum junction temperature of 175 ℃). Furthermore, the junction-to-coolant thermal resistance of the E-MPF SiC substrate could be reduced by 78.89 % compared to that of the DBC substrate. Moreover, the prepared 3D stacking package effectively improved the temperature uniformity of the SiC power modules by 68.69 %. The presented ultra-thermostable E-MPF substrate SiC power module can steadily render a motor torque elevation that is one magnitude greater than that required for sustaining the boiling-free condition on the DBC substrate. This embedded liquid-cooling architecture affords a feasible solution for the thermal management of upcoming high-power electric vehicle SiC inverters.

Critical electric field for transition of thermionic field emission/field emission transport in heavily doped SiC Schottky barrier diodes

In this study, n-type SiC Schottky barrier diodes (SBDs) with various doping concentrations (Nd=4×1015–1×1019cm−3) were fabricated, and their forward and reverse current–voltage (I–V) characteristics were analyzed focusing on tunneling current. Numerical calculation with the fundamental formula of tunneling current gives good agreement with experimental forward and reverse I–V curves in the heavily doped SiC SBDs (Nd>2×1017cm−3). The analysis of the energy where electron tunneling most frequently occurs revealed that field emission (FE) tunneling dominates conduction instead of thermionic field emission (TFE) under a higher electric field in reverse-biased heavily doped SiC SBDs, while forward I–V characteristics are described only by TFE. In addition, the critical electric field for the TFE–FE transition is quantitatively clarified by carefully considering the sharply changing electric field distribution in SiC with a high donor concentration.

A possible single event burnout hardening technique for SiC Schottky barrier diodes

SiC Schottky barrier diodes (SBDs) are sensitive to single event burnout (SEB) caused by the high-energy particle strikes, which greatly restricts their applications in the aerospace field. In this paper, we investigate the SEB performance of SiC SBDs with the electro-thermal coupled simulation model using the Sentaurus TCAD simulator. The simulation results show that reducing the reverse voltage can improve the SEB robustness because of the lower impact ionization rate and current density at lower reverse voltage. Based on this, we propose a novel SEB hardening technique of connecting two SiC SBDs in series. Since the voltage across the diode which is hit by the heavy ion can transfer to the other diode in time, the peak temperature attained is greatly reduced, and the SEB robustness is effectively improved for the hardening structure. Due to the low on-state resistance and power dissipation of SiC SBDs, the doubling of the on-state resistance for the series structure will not be a problem. In addition, with the advantages of simple implementation and strong recoverability, the hardening structure proposed in this paper is expected to be applied in practice. • A novel single event burnout hardening technique for SiC Schottky barrier diodes has been proposed. • The SEB robustness of SiC Schottky barrier diodes is effectively improved for the hardening structure. • The hardening structure has no special processing requirements and is easy to implement.

A Way to Reduce Leakage Current and Improve Reliability of Wire-Bonds for 300-A Multichip SiC Hybrid Modules

In this article, pressureless sintering of nanosilver paste is proposed to enhance the reliability of wire-bonds with SiC chips by both alleviating thermomechanical stresses and enhancing thermal coupling of bonding wires and chips. A multichip 1200-V/300-A SiC hybrid module with six Si IGBTs and 12 SiC Schottky barrier diodes (SBDs) is demonstrated. The lifetime of the wire-bonds with the SiC SBD bonded by the pressureless sintered nanosilver is ~27.9% longer than that by the high-temperature solder under power cycling with constant temperature swing. The lifetime of the wire-bonds with the IGBT also bonded by the pressureless sintered nanosilver is ~46.2% longer than that by the high-temperature solder under power cycling with constant conduction current. Furthermore, not only the cost of 1700-V SiC SBDs is quite similar to that of 1200-V ones but also the leakage current of the 1200-V/300-A SiC hybrid module can be reduced greatly using 1700-V SiC SBDs as free-wheeling diodes instead of the regular 1200-V ones. Considering the much larger leakage current of a SiC SBD compared with that of a Si p-i-n diode. It is feasible to use a SiC SBD with higher blocking voltage to reduce the significant leakage current of the free-wheeling SBD with almost no cost increase.

Analytical Model to Study Hard Turn-off Switching Dynamics of SiC mosfet and Schottky Diode Pair

Fast switching transient of SiC mosfet may lead to prolonged oscillations, spurious turn on, large device stress, and high amount of electromagnetic interference generation. For an optimal layout and gate driver design, study of switching dynamics is important. This article presents an analytical model that captures the turn-off switching dynamics of SiC mosfet and SiC Schottky barrier diode (SBD) pair using parameters obtained from device and gate driver datasheets and the values of external circuit parasitics. Unlike linear approximation, a detailed model of channel current is considered that captures the gradual transition from ohmic to saturation region and the transverse electric field effect. A comprehensive model of the transfer capacitance is used and the effect of external gate-drain capacitance is considered. This results in a better estimation of switching transition time, actual loss incurred, (dv/dt), (di/dt), and transient overvoltage. The behavioral simulation and experimental results confirm the accuracy of the presented analytical model over a range of operating conditions for two 1.2-kV discrete SiC mosfet and SBD pairs of different current ratings.

Analytical Estimation of Turn on Switching Loss of SiC mosfet and Schottky Diode Pair From Datasheet Parameters

Estimation of switching loss at the early stages of design is essential for determination of switching frequency and selection of power devices. Analytical estimation similar to gate charge method results in fastest and easiest computation when compared with simulation or double pulse test based experimental approach. This paper presents an analytical estimation method of turn on switching loss of a SiC mosfet and SiC Schottky barrier diode (SBD) pair from datasheet parameters and using values of common source and dc bus inductances. Turn on losses are considered as they dominate the total switching loss. The presented method models the quadratic nature of the transfer characteristics and results in better estimation of current rise time when compared with the linear approximation used in the literature. During voltage fall, the non-linear nature of the parasitic capacitances of both the switch and the diode are considered. The simulation and experimental results confirm the accuracy of the presented method over a range of operating conditions for two 1.2-kV discrete SiC mosfet and SBD pairs of different current ratings.

Thermal Runaway in SiC Schottky Barrier Diodes Caused by Heavy Ions

The thermal runaway in SiC Schottky barrier diodes (SBDs) caused by heavy ions was identified by a device simulator with parameters carefully extrapolated to an extended temperature range far exceeding the melting point of SiC. It is shown that the critical electric field needed to activate the impact ionization attributable to SiC material and the Schottky barrier contact on it are responsible for the thermal runaway in SiC SBDs.

Influence of displacement damage induced by neutron irradiation on effective carrier density in 4H-SiC SBDs and MOSFETs

In this study, the fission neutron source and Co-60 gamma rays were employed to investigate the radiation effects on the electrical characteristics of the 4H-SiC SBDs and metal-oxide-semiconductor field-effect transistors (MOSFETs). The results indicated that SiC MOSFETs are more susceptible to gamma-ray irradiation than SiC Schottky barrier diodes (SBDs) due to the ionizing-produced charges trapped in the gate insulator. Compared to the ionizing effects caused by gamma rays, the neutron-induced displacement damage is more significant, since the defects originating from neutron irradiation would disturb the effective carrier density in SiC and lead to undesirable electrical deterioration and permanent failure of the SiC SBDs and MOSFETs.

Analysis of dynamic characteristics of SiC Schottky barrier diodes at high switching frequency based on junction capacitance

In this paper, we focus on relationships between dynamic characteristics and device structures of SiC Schottky barrier diodes (SBDs) to investigate their switching capabilities. A device model based on junction capacitance and thermionic emission theory is proposed. To measure the dynamic characteristics of SiC SBD, a high-frequency (10 MHz) and high-voltage (200 Vpp) wave generator is fabricated. By comparing simulated results with experimental results, it is found that the proposed model can represent the dynamic characteristics at 10 MHz and 200 °C, and the simple device model based on junction capacitance and thermionic emission theory well describes the switching behaviors of SiC SBDs at full operational temperature. The proposed device model is beneficial for designing high-power converters, at both wide temperature and wide frequency ranges.

Investigation of Package Effects on the Edge Termination E-Field for HV WBG Power Semiconductors

Abstract The edge termination of a power semiconductor is defined as the spatial junction terminations around the edges of the power devices. Guard rings are used to contour the internal depletion regions and E-fields as they terminate at the edge termination, i.e. the intersection of the depletion regions and the wafer saw line where the crystal damage is located. Since there is no specific package for WBG power devices, wire bonds are still widely used to interconnect to the topside metal pads of the power devices. From previous research it is shown that wire bonding will not affect the E-field around the guard rings on a WBG device. However, planar power package, such as double-sided and power flip-chip device packaging could be a problem where the close distance between the topside of the power device and conducting plane may negatively affect the E-field distribution of the guard rings, which in turn lowers the reverse blocking capability of the WBG power device and increases leakage current creating greater on-state power loss, or even early break down. Few works have shown the Electric field distribution in embedded power modules. Therefore, a more detailed investigation and possible solution is needed for the proliferation of double-sided power packages. To investigate this packaging problem simulations were performed in Sentaurus TCAD and COMSOL based on the device physics and package geometries. Guard ring structures in 1.2kV and 10kV SiC Schottky Barrier Diode (SBD) were built and simulated in various double-sided package geometries, together with the thermal and mechanical evaluation of the package, to observe the influence on the E-field distribution in and out the WBG device. Different double-sided package structures were evaluated and a guideline (spacing/pad size/etc.) summarized for double-sided design. Moreover, a new bevel edge termination method was evaluated for double-sided WBG power semiconductor devices. Experimental reverse blocking test results will be reported in various temperature (from 25°C to 175°C) to verify the function of the package. The tests are on 1200V/50A SiC SBD (Schottky Barrier Diode) from Global Power Technology, which has double-sided Ag on both sides.

Thermal performance evaluation of cascode Paralleled-GaN-HEMTs packaging for high power switching applications

This study investigated the heat generation behavior of normally-on GaN FET consisting of multi-chip AlGaN/GaN high electron mobility transistors (HEMTs) cascoded with a low-voltage MOSFET (LVMOS) and a SiC Schottky barrier diode (SBD) in a new design package to enable high power applications. The electric field intensity distribution and the hot spot position of the devices were analyzed by electrothermal simulation and the infrared temperature measurement. The transient thermal characteristics are probed by temperature sensitive parameters (TSPs). The changes in on-resistance (RON), maximum drain current (IDMAX), and transconductance (gm) with temperature from 25 °C to 150 °C are measured, and the correlations are investigated. Two paralleled GaN-HEMT, LVMOS, and SiC SBD were then integrated on a directly bonded copper (DBC) substrate in the four-pin metal case TO-257 and a newly designed REC-2015 package to evaluate steady thermal performance improvement of packaging. The temperature distribution of parallel-connected GaN HEMTs were analyzed in numerical thermal simulations and infrared thermography measurements. The analytical results of thermal analysis were confirmed by comparing with the infrared thermographic measurements and numerical results obtained from simulations using Ansys Icepak. According to the thermal measurement at power dissipation of less than 24 W, the peak temperatures of the GaN HEMTs are 144.7 °C and 132.6 °C with TO-257 and REC-2015 package.

Analysis on partial thermal resistances of packaged SiC schottky barrier diodes at elevated temperatures

This paper investigates the temperature dependence of partial thermal resistances of a packaged SiC schottky barrier diode (SBD) for high temperature applications. Transient thermal resistances of the packaged SiC SBD were measured and characterized in temperature range from 27 to 275 °C. The partial thermal resistances were extracted and analyzed using the cumulative and differential thermal structure functions. The extracted partial thermal resistances were compared to the results from the finite difference thermal model, and both results were in good agreement. The temperature dependence of the partial thermal resistance of the SiC device and the Si3N4 substrate contributes to the overall thermal characteristics variation of the packaged SiC SBD.

Development and characterization of the thermal behavior of packaged cascode GaN HEMTs

This study investigates the heat generation behavior of packaged normally-on multi-finger AlGaN/GaN high electron mobility transistors (HEMTs) that are cascoded with a low-voltage MOSFET (LVMOS) and a SiC Schottky barrier diode (SBD). By foremost carrying out electro-thermal simulation and related thermal measurements with infrared thermography and Raman spectroscopy for basic 5mm GaN HEMTs, the location of hot spot in operating device can be obtained. Based on the outcome, further packaged cascode GaN HEMT is analyzed. A hybrid integration of the GaN-HEMT, LVMOS, and SiC SBD are assembled on a directly bonded copper (DBC) substrate in the four-pin metal case TO-257 package. The metal plate is used as both the source terminal and heat sink. The analytical results of thermal investigation are confirmed by comparing them with the infrared thermographic measurements and numerical results obtained from a simulation using Ansys Icepak. For a power dissipation of less than 11.8W, the peak temperature of the GaN HEMTs is 118.7°C, obtained from thermal measurements.

High Thermal Stability of SiC Packaging with Sintered Ag Paste Die-attach combined with Imide-based Molding

We report that ultra-high thermal reliability can be achieved by combining Ag paste sintering die-attach and injection transfer molding with imide-based mold composite. Test specimens of SiC SBD in TO247 discrete-package are prepared; SiC dies bonded on Cu lead frame, Al ribbon wiring from electrode of SiC Schottky barrier diode (SBD) chip to the Cu leads, and injection transfer molding process. The hybrid nano+micro flake Ag paste realizes a low temperature bond process of 250°C in air, die-shear stress recorded 23 MPa without intensive pressure. The thermo-mechanical parameters like glass transition temperature, Young's modulus and CTE of the thermosetting composite are carefully tuned for both the manufacturing process targeting the device operating temperature of 250°C. The test pieces are tested by harsh thermal cycling between −50°C to 250°C, and compared with the other specimens made with usual Pb-5Sn soldering die-attach with the same molding composite. Interface failures are investigated by scanning acoustic tomography (SAT), and the electric properties of SBD are checked by I-V measurements. The sintered Ag die-attach survived over 500 cycles without any failures around the interfaces of SiC die, Cu lead-frame, and mold materials, and no obvious change is found in electronic properties. However, Pb-Sn die-attach joints are gradually damaged with increasing thermal cycles causing degraded I-V property. The SEM images indicate the microstucture of sintered Ag layer is unchanged after the thermal cycles, because of the impregnated imid-matrix into the porous Ag. Our results demonstrate that the combination of Ag sinter paste die-attach and imide-based thermosetting composite can be a massproduction-ready packaging technology to realize the high operation temperature of post-silicon power devices.

High Temperature SiC Sensor with an Isolated Package

This paper presents an improved version and new results on a temperature sensor based on SiC Schottky Barrier Diode (SBD). SiC SBD structures of different areas were packaged in a metallic-glass case. The encapsulated sensor was electrically measured at several temperatures. A good linearity of the forward voltage measured at a constant current versus temperature dependence was obtained in the temperature range of 150-400°C where the sensor is meant to operate. Optical investigation, correlated with electrical measurements, prove the reliability of the sensor structure and of the package solutions at temperatures up to 400°C.

Al/Ti/4H-SiC Schottky barrier diodes with inhomogeneous barrier heights

This paper investigates the current-voltage (I—V) characteristics of Al/Ti/4H—SiC Schottky barrier diodes (SBDs) in the temperature range of 77 K–500 K, which shows that Al/Ti/4H—SiC SBDs have good rectifying behaviour. An abnormal behaviour, in which the zero bias barrier height decreases while the ideality factor increases with decreasing temperature (T), has been successfully interpreted by using thermionic emission theory with Gaussian distribution of the barrier heights due to the inhomogeneous barrier height at the Al/Ti/4H-SiC interface. The effective Richardson constant A* = 154 A/cm2 · K2 is determined by means of a modified Richardson plot ln(I0/T2) − (qσ)2/2(kT)2 versus q/kT, which is very close to the theoretical value 146 A/cm2 · K2.

Electrical and optical characteristics of Au/PbS/n-6H–SiC structures prepared by electrodeposition of PbS thin film on n-type 6H–SiC substrate

To realize Schottky barrier height (SBH) modification in the Au/n-6H–SiC Schottky diodes, lead sulfide (PbS) thin films were grown on n-6H–SiC by electrodeposition method. At first, XRD experiments were performed to investigate the crystal structure of the PbS film electrodeposited on n-6H–SiC. It has been deduced from the diffraction profile that the PbS thin film has a crystal structure more strongly oriented along the [2 0 0] direction. An optical energy band gap value of 1.42 eV for the PbS film was obtained from its optical absorption spectra. Then, we have prepared Au/PbS/n-6H–SiC Schottky barrier diodes (SBDs) with interface layer and reference Au/n-6H–SiC/Ni SBDs. The SBH enhancement has been succeeded by the PbS interlayer, influencing the space charge region of the SiC. The SBH values of 1.03 and 0.97 eV for the samples with and without the interfacial PbS layer were obtained from the forward bias current–voltage ( I– V) characteristics. The SBH increase in the Au/PbS/n-6H–SiC SBD with the interfacial PbS layer has been attributed to the fact that the interface states contain a net negative interface charge in metal/n-type semiconductor contact due to the presence of the interfacial PbS layer.

Evaluation of High Frequency Switching Capability of SiC Schottky Barrier Diode, Based on Junction Capacitance Model

An SiC power device possesses features like high breakdown voltage, fast switching capability, and high temperature operation, and is expected to be superior to conventional Si power devices. This paper clarifies the switching capability of an SiC Schottky barrier diode (SBD) in rectification of high frequency ac voltage. The dynamic behavior of the SiC SBD for switching operation is modeled based on semiconductor physics and device structure, and is characterized by its dc current-voltage (I-V) and ac capacitance-voltage (C-V) characteristics. A C-V characterization system, which measures capacitance using a dc bias voltage corresponding to the maximum rated voltage of the SiC SBD, is developed. The C-V characteristics are evaluated through experiments over the rated voltage range. These results explain the punch-through structure and device parameters. The dynamic behavior of the proposed model is validated through experiments on half-wave rectification of ac voltages over a wide frequency range. As a relational expression of voltage, current, and frequency of an applied ac sinusoidal voltage, the performance criterion of the device is established for rectification. The model also quantitatively assesses the switching capability of SiC SBDs. The model and performance criteria are beneficial for circuit design and device evaluation.