SiC Conduction Band Research Articles

Vertical Current Transport in Monolayer MoS<sub>2</sub> Heterojunctions with 4H-SiC Fabricated by Sulfurization of Ultra-Thin MoO<sub>x</sub> Films

In this paper, we report on the growth of highly uniform MoS2 films, mostly consisting of monolayers, on SiC surfaces with different doping levels (n- SiC epitaxy, ~1016 cm-3, and n+ SiC substrate, ~1019 cm-3) by sulfurization of a pre-deposited ultra-thin MoOx films. MoS2 layers are lowly strained (~0.12% tensile strain) and highly p-type doped (<Nh>≈4×1019 cm−3), due to MoO3 residues still present after the sulfurization process. Nanoscale resolution I-V analyses by conductive atomic force microscopy (C-AFM) show a strongly rectifying behavior for MoS2 junction with n- SiC, whereas the p+ MoS2/n+ SiC junction exhibits an enhanced reverse current and a negative differential behavior under forward bias. This latter observation, indicating the occurrence of band-to-band-tunneling from the occupied states of n+ SiC conduction band to the empty states of p+ MoS2 valence band, is a confirmation of the very sharp hetero-interface between the two materials. These results pave the way to the fabrication of ultra-fast switching Esaki diodes on 4H-SiC.

Observations of very fast electron traps at SiC/high-κ dielectric interfaces

Very fast interface traps have recently been suggested to be the main cause behind poor channel-carrier mobility in SiC metal–oxide–semiconductor field effect transistors. It has been hypothesized that the NI traps are defects located inside the SiO2 dielectric with energy levels close to the SiC conduction band edge and the observed conductance spectroscopy signal is a result of electron tunneling to and from these defects. Using aluminum nitride and aluminum oxide as gate dielectrics instead of SiO2, we detect NI traps at these SiC/dielectric interfaces as well. A detailed investigation of the NI trap density and behavior as a function of temperature is presented and discussed. Advanced scanning transmission electron microscopy in combination with electron energy loss spectroscopy reveals no SiO2 at the interfaces. This strongly suggests that the NI traps are related to the surface region of the SiC rather than being a property of the gate dielectric.

Passivation of Very Fast Near-Interface Traps at the 4H-SiC/SiO<sub>2</sub> Interface Using Sodium Enhanced Oxidation

The channel carrier mobility in commercially available 4H-SiC MOSFETs with NO annealed gate oxides is still far below the theoretical limit. It has been suggested that the main reason is high density of very fast interface traps, labeled NI, located inside the oxide very close to the SiC conduction band edge. The NI traps are usually not observed at room temperature but can be detected at cryogenic temperatures. In this study we use conductance spectroscopy and high-low CV analysis of MOS-capacitors at cryogenic temperatures to show that the very fast NI traps are practically absent in oxides grown using sodium enhanced oxidation.

Atomic scale localization of Kohn–Sham wavefunction at SiO2/4H–SiC interface under electric field, deviating from envelope function by effective mass approximation

To clarify the cause of the low channel conductivity at the SiO2/4H–SiC interface, the wavefunction at the SiC conduction band minimum was calculated using density functional theory under an applied electric field. We found that the wavefunction for a 4H–SiC (0001) slab tends to be localized at the cubic site closest to the interface. Importantly, because the conduction electrons are distributed closer to the interface (<5 Å) than expected from the effective mass approximation (EMA), they are more frequently scattered by interface defects. This is expected to be the reason why the channel conductivity for the (0001) face is particularly low compared with that for other faces, such as (112¯0). The breakdown of the EMA for the (0001) interface is related to the long structural periodicity along the [0001] direction in 4H–SiC crystals.

Electrically Active Defects in SiC Power MOSFETs

The performance and reliability of the state-of-the-art power 4H-SiC metal–oxide–semiconductor field-effect transistors (MOSFETs) are affected by electrically active defects at and near the interface between SiC and the gate dielectric. Specifically, these defects impact the channel-carrier mobility and threshold voltage of SiC MOSFETs, depending on their physical location and energy levels. To characterize these defects, techniques have evolved from those used for Si devices to techniques exclusively designed for the SiC MOS structure and SiC MOSFETs. This paper reviews the electrically active defects at and near the interface between SiC and the gate dielectric in SiC power MOSFETs and MOS capacitors. First, the defects are classified according to their physical locations and energy positions into (1) interface traps, (2) near interface traps with energy levels aligned to the energy gap, and (3) near-interface traps with energy levels aligned to the conduction band of SiC. Then, representative published results are shown and discussed for each class of defect.

Detection of near-interface traps in NO annealed 4H-SiC metal oxide semiconductor capacitors combining different electrical characterization methods

Fast near-interface (NI) traps have recently been suggested to be the main cause for poor inversion channel mobility in nitrided SiC metal-oxide-semiconductor-field-effect-transistors. Combining capacitance, conductance, and thermal dielectric relaxation current (TDRC) analysis at low temperatures of nitrided SiC MOS capacitors, we observe two categories of fast and slow near-interface traps at the SiO2/4H-SiC interface. TDRC reveals a suppression of slow near-interface traps after nitridation. Capacitance and conductance analysis reveals a high density of fast NI traps close to the SiC conduction band edge that are enhanced by nitridation. The very fast response of NI traps prevents them from detection using TDRC or deep level transient spectroscopy.

TCAD Modeling of Temperature Activation of the Hysteresis Characteristics of Lateral 4H-SiC MOSFETs

We investigate the temperature dependence of the hysteresis in the transfer characteristics of 4H silicon carbide (4H-SiC) lateral MOSFETs. Within temperatures ranging from 150 to 300 K, we experimentally characterize the hysteresis width as the difference of the threshold voltage between up and down sweeps. We observe a considerable increase in the hysteresis width toward lower temperatures. When the gate voltage sweeps up, the threshold voltage shifts toward positive gate voltages. This shift is maintained even during the subsequent down sweep. We attribute this behavior to acceptor-like border traps, which get more negatively charged at higher gate voltages. These traps are presumably located near the SiC/SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> interface with energy levels close to the SiC conduction band edge. Using a two-state non-radiative multi-phonon model, we calculated capture and emission times to show that the hysteresis width corresponds to the charge stored on these traps and, hence, possesses an intrinsic temperature dependence due to the transition barriers.

A method for characterizing near-interface traps in SiC metal–oxide–semiconductor capacitors from conductance–temperature spectroscopy measurements

The state-of-the-art technology for gate oxides on SiC involves the introduction of nitrogen to reduce the density of interface defects. However, SiC metal–oxide–semiconductor (MOS) field-effect transistors still suffer from low channel mobility even after the nitridation treatment. Recent reports have indicated that this is due to near-interface traps (NITs) that communicate with electrons in the SiC conduction band via tunneling. In light of this evidence, it is clear that conventional interface trap analysis is not appropriate for these defects. To address this shortcoming, we introduce a new characterization method based on conductance–temperature spectroscopy. We present simple equations to facilitate the comparison of different fabrication methods based on the density and location of NITs and give some information about their origin. These techniques can also be applied to NITs in other MOS structures.

Ultrashallow defects in SiC MOS capacitors

Capacitance-voltage measurements performed at cryogenic temperatures (14 – 500 K) have been used to determine the ultrashallow interface states in SiC MOS capacitors. These states occupies energy levels in SiC band gap on different energy levels up to 27 meV below the conduction band. Moreover, the capacitance-voltage characteristics are moving to lower voltages with temperature increasing, indicating a reduction in flat band voltage from 14.65 (14 K) to 2.77 V (500 K). It was demonstrated that a complete ionization of the nitrogen donors from the epitaxial layer occurs at 420 K. From these analysis, an activation energy of around 26.79 meV was determined. In order to determine the energy levels distribution of the interface states in SiC band gap, the Fermi level variation with temperature was calculated, starting from a value of around 27.1 meV at 14 K and reaching a value of 321 meV at 500 K under SiC conduction band. Six peaks (D1 – D6) have been identified in interface states density distribution at different levels of energy in SiC band gap, which could correspond to different defects at the SiO2/SiC interface.

Enhanced photocatalytic hydrogen production over Au/SiC for water reduction by localized surface plasmon resonance effect

High separation of photo-excited electrons and holes, leading to fast reaction rate on semiconductor surface, are determined for the hydrogen evolution by water reduction. We here provide the efficient photocatalyst of Au/SiC composite for hydrogen production, where the effect of localized surface plasmon resonance effect (LSPR) is firstly induced in the SiC-based materials for water splitting. The hydrogen production for Au/SiC is robustly increased by 30 times compared to that of pristine SiC. This high performance is attributed to the LSPR by Au nanoparticles, which results in the efficient charges separation across the AuSiC interface and accelerated water reduction rate on SiC surface by the hot electrons in conduction band of SiC. We show that the Au/SiC is an effective photocatalyst, which is capable of splitting water for hydrogen.

Mechanism of phosphorus passivation of near-interface oxide traps in 4H–SiC MOS devices investigated by CCDLTS and DFT calculation

Interfacial charge trapping in 4H–SiC MOS capacitors with P doped SiO2 or phospho-silicate glass (PSG) as a gate dielectric has been investigated with temperature dependent capacitance–voltage measurements and constant capacitance deep level transient spectroscopy (CCDLTS) measurements. The measurements indicate that P doping in the dielectric results in significant reduction of near-interface electron traps that have energy levels within 0.5 eV of the 4H–SiC conduction band edge. Extracted trap densities confirm that the phosphorus induced near-interface trap reduction is significantly more effective than interfacial nitridation, which is typically used for 4H–SiC MOSFET processing. The CCDLTS measurements reveal that the two broad near-interface trap peaks, named ‘O1’ and ‘O2’, with activation energies around 0.15 eV and 0.4 eV below the 4H–SiC conduction band that are typically observed in thermal oxides on 4H–SiC, are also present in PSG devices. Previous atomic scale ab initio calculations suggested these O1 and O2 traps to be carbon dimers substituted for oxygen dimers (CO=CO) and interstitial Si (Sii) in SiO2, respectively. Theoretical considerations in this work suggest that the presence of P in the near-interfacial region reduces the stability of the CO=CO defects and reduces the density of Sii defects through the network restructuring. Qualitative comparison of results in this work and reported work suggest that the O1 and O2 traps in SiO2/4H–SiC MOS system negatively impact channel mobility in 4H–SiC MOSFETs.

The flexible SiC nanowire paper electrode as highly efficient photocathodes for photoelectrocatalytic water splitting

An ultralong SiC@g-C3N4 core-shell nanowires heterojunction photocatalyst was synthesized by the direct pyrolysis of melamine on the surface of SiC nanowires (NWs). The flexible heterojunction used as a photocathode for photoelectrochemical (PEC) water splitting shows a photocurrent density of −0.62mAcm−2 at −0.6V vs Ag/AgCl in 0.1M Na2SO4 solution, which is due to obviously enhanced visible light collection and charge separation. The photoexcited electrons on the lowest unoccupied molecular orbital (LUMO) level of g-C3N4 can be easily transported to the conduction band (CB) of SiC, whereas the photoexcited holes on the valence band (VB) of SiC can be transferred to the highest occupied molecular orbital (HOMO) level of g-C3N4. The synergic effect between SiC and g-C3N4 can decrease the recombination rate of photogenerated carriers and improve the photocatalytic hydrogen production activity. This work presents a novel SiC@g-C3N4 core-shell flexible photocathode for highly efficient PEC water splitting, which can be extended to fabricate various other flexible core-shell nanoheterostructures.

Effects of energetic ion irradiation on WSe2/SiC heterostructures

The remarkable electronic properties of layered semiconducting transition metal dichalcogenides (TMDs) make them promising candidates for next-generation ultrathin, low-power, high-speed electronics. It has been suggested that electronics based upon ultra-thin TMDs may be appropriate for use in high radiation environments such as space. Here, we present the effects of irradiation by protons, iron, and silver ions at MeV-level energies on a WSe2/6H-SiC vertical heterostructure studied using XPS and UV-Vis-NIR spectroscopy. It was found that with 2 MeV protons, a fluence of 1016 protons/cm2 was necessary to induce a significant charge transfer from SiC to WSe2, where a reduction of valence band offset was observed. Simultaneously, a new absorption edge appeared at 1.1 eV below the conduction band of SiC. The irradiation with heavy ions at 1016 ions/cm2 converts WSe2 into a mixture of WOx and Se-deficient WSe2. The valence band is also heavily altered due to oxidation and amorphization. However, these doses are in excess of the doses needed to damage TMD-based electronics due to defects generated in common dielectric and substrate materials. As such, the radiation stability of WSe2-based electronics is not expected to be limited by the radiation hardness of WSe2, but rather by the dielectric and substrate.

New Efficient Canal of THz Emission from SiC Natural Superlattices in Conditions of Wannier-Stark Localization

The comprehensive study of the terahertz electroluminescence caused by the Bloch oscillations of the electrons in the natural superlattices of 8H-, 6H-SiC with strong electrical field applied along the natural superlattices axis is represented. The electroluminescence spectra become much broader when the bias field exceeds substantially the threshold field of the Bloch oscillations. This spectral broadening can be explained by an appearance of a new spectral line that is much wider and its maximum is localized at higher energy than lines induced by Bloch oscillations. This line has no link with the Bloch oscillations mechanism and it is a result of the presumed changes in the SiC conduction band with complex electron spectrum structure by applied electrical field.

Conductance Signal from Near-Interface Traps in n-Type 4H-SiC MOS Capacitors under Strong Accumulation

We find a clear correlation between the density of near-interface traps (NITs) in n-type 4H-SiC MOS capacitors and the strength of a conductance signal observed under strong accumulation. The conductance signal strength can be described by tunneling of electrons between the SiC conduction band and NITs at a rate close to the ac test signal frequency. The findings here show that the signal in dry thermal oxides depends on temperature which suggests that the electron capture cross section of the NITs is thermally activated. Direct tunneling is more prominent in samples containing low density of NITs such as oxides made by sodium enhanced oxidation (SEO).

Characterization of Interface State Density of SiO2/SiC (000-1) Based on Oxygen Concentration at the Interface during Thermal Oxidation

Inferior interfacial electrical properties of thermally grown SiO2 films on SiC, compared to those on Si, is probably brought by carbon atoms in the substrates. Although few direct evidence f has been reported, it is quite natural to consider that some carbon atoms exist as impurities at the interface as long as we assume a finite diffusion coefficient for carbon atoms. It is well known that we cannot avoid formation of high density of interface states in dry oxide interface. Various processes for interface state reduction have been reported, such as FGA for instance. The mechanism is not clear, however, it is apparently different from termination of Si dangling bonds, which is the case for SiO2/Si, since FGA for SiO2/SiC requires much higher temperature than Si case. For reduction of interface states, it is important to quickly remove carbon atoms out of the film to the ambient. In this paper, we focus on the role of oxygen atoms, in addition to being oxidants, as a carbon removers by generating CO molecules. We report how the interface states density is related to oxygen concentration at the interface.The substrate in our experiments was 4H-SiC(000-1) epi-wafers with the miscut angle of 4°. After modified RCA cleaning, thermal oxidation was carried out at 900-1200°C in O2 ambient. The oxide thickness was characterized by spectroscopic ellipsometry. Then the Al gate electrodes were fabricated on top of the oxide films, and we characterized interface state density by C-V measurement. From the oxidation date, that is thickness vs. oxidation time, we have extracted the linear rate and the parabolic rate constants by fitting with the Deal-Grove model. Using these constants, we have calculated the oxygen concentration at the interface, which should be determined with oxidation rate at the interface and the flux of the oxygen diffusion from the ambient to the interface.Figure 1 is the oxide thickness vs. oxidation time with variation of oxidation temperature. The dotted lines are the fitting curves. The experimental data are well fitted by the Deal-Grove model, indicating that thermal oxidation of SiC can be basically explained by diffusion of oxidant species through oxide film and oxidation reaction at the interface, as same as for Si oxidation. Figure 2 is the calculated oxygen density at the interface as a function of oxide thickness. It is natural that the oxygen density decreases as the oxide becomes thicker due to decrease in oxygen diffusion to the interface. The decrease in the oxygen density for higher oxidation temperature is due to decrease in the oxygen solubility. Figure 3 shows the summary of the relation between interface state density and the calculated oxygen density at the interface. In this figure the interface state density was evaluated at 1.0 eV below the bottom of SiC conduction band, which is usually observed for C-face substrate and strongly affect the reliability properties, such as flatband voltage shift. It is clear that the interface state density decreases as the oxygen density increases. It could be explained by that oxygen atoms act as the carbon remover, if we assume that the interface states are carbon related. Decrease in the interface sate density for higher oxidation temperature can be explained by fact that temperature dependence of the rate of CO formation is larger than that of SiO2 formation, that is supplied oxygen atoms are more used for carbon removal at higher temperature. Figure 1

Effects of antimony (Sb) on electron trapping near SiO2/4H-SiC interfaces

To investigate the mechanism by which Sb at the SiO2/SiC interface improves the channel mobility of 4H-SiC MOSFETs, 1 MHz capacitance measurements and constant capacitance deep level transient spectroscopy (CCDLTS) measurements were performed on Sb-implanted 4H-SiC MOS capacitors. The measurements reveal a significant concentration of Sb donors near the SiO2/SiC interface. Two Sb donor related CCDLTS peaks corresponding to shallow energy levels in SiC were observed close to the SiO2/SiC interface. Furthermore, CCDLTS measurements show that the same type of near-interface traps found in conventional dry oxide or NO-annealed capacitors are present in the Sb implanted samples. These are O1 traps, suggested to be carbon dimers substituted for O dimers in SiO2, and O2 traps, suggested to be interstitial Si in SiO2. However, electron trapping is reduced by a factor of ∼2 in Sb-implanted samples compared with samples with no Sb, primarily at energy levels within 0.2 eV of the SiC conduction band edge. This trap passivation effect is relatively small compared with the Sb-induced counter-doping effect on the MOSFET channel surface, which results in improved channel transport.

Quantified Density of Active near Interface Oxide Traps in 4H-SiC MOS Capacitors

This paper presents a new method to quantify near interface oxide traps (NIOTs) that are responsible for threshold voltage instability of 4H-SiC MOSFETs. The method utilizes the shift observed in capacitance–voltage (C–V) curves of an N-type MOS capacitor. The results show that both shallow NIOTs with energy levels below the bottom of conduction band and NIOTs with energy levels above the bottom of the conduction band of SiC are responsible for the C–V shifts, and consequently, for the threshold voltage instabilities in MOSFETs. A higher density of NIOTs is measured at higher temperatures.

Importance of SiC Stacking to Interlayer States at the SiC/SiO&lt;sub&gt;2&lt;/sub&gt; Interface

We investigated the effect of SiC stacking on the 4H-SiC/SiO2 interface via first principles calculations. Interlayer states are observed along the SiC conduction band edge, and are affected by the local structure at the interface. The location of these states changes depending on which of two lattice sites, h or k is at the interface. This difference is important for SiC based metal-oxide-semiconductor field-effect transistors which rely on the electronic structure of the conduction band.

Terahertz emission from SiC natural superlattices in strong electrical field

Results are reported from a study of the terahertz electroluminescence from 8H-, 6H-, and 4H-SiC natural superlattices under the action of an electrical field applied along the natural superlattice axis. It is shown that the single, relatively narrow emission lines (L1-lines) dominate in the electroluminescence spectrum at moderate bias voltages and follow the increase of the width of the first mini-band of the superlattice in accordance with the criterion for Bloch oscillations. At bias voltages well above the Bloch oscillation threshold, the structure of the terahertz emission spectra undergoes considerable changes, which occur due to the appearance of a new intense, broader emission line (L2-line) with a maximum at about 12–13 meV. Tentatively, this latter emission is attributed to optical transitions between Wannier-Stark ladders formed from degenerate states in a side minimum of the SiC conduction band under strong electric field conditions.