SiN Passivation Research Articles

Nitride spacer aided 0.15 μm AlGaN/GaN HEMT fabrication with optimized gate patterning process

I-line stepper is widely used in large scale device manufacturing with limited achievable critical dimension by itself. With the aid of the spacer sidewall, the critical dimension can be further shrunk down. Spacer sidewall aided process necessitates an additional deposition-etching process, which inevitably results in process related damage under the gate. This paper proposes an optimized spacer sidewall aided gate patterning procedure for 0.15 μm GaN High Electron Mobility Transistors (HEMTs) fabrication. The process is proved to be effective in improving device performance compared to conventional sidewall process by keeping first Si-rich SiN passivation layer integrity at the gate edge. Interface trap density (Dit) and mobility were extracted for both conventional sidewall process and the optimized one with different passivation layers at the gate edge, demonstrating a lower Dit and higher mobility using the optimized process with enhanced device performances, such as higher current, breakdown voltage, and stress state characteristics, compared to the conventional process, which is promising for mass production of 0.15 μm GaN HEMTs.

Operational Characteristics of AlGaN/GaN High-Electron-Mobility Transistors with Various Dielectric Passivation Structures for High-Power and High-Frequency Operations: A Simulation Study.

This study investigates the operational characteristics of AlGaN/GaN high-electron-mobility transistors (HEMTs) by employing various passivation materials with different dielectric constants and passivation structures. To ensure the simulation reliability, the parameters were calibrated based on the measured data from the fabricated basic Si3N4 passivation structure of the HEMT. The Si3N4 passivation material was replaced with high-k materials, such as Al2O3 and HfO2, to improve the breakdown voltage. The Al2O3 and HfO2 passivation structures achieved breakdown voltage improvements of 6.62% and 17.45%, respectively, compared to the basic Si3N4 passivation structure. However, the increased parasitic capacitances reduced the cut-off frequency. To mitigate this reduction, the operational characteristics of hybrid and partial passivation structures were analyzed. Compared with the HfO2 passivation structure, the HfO2 partial passivation structure exhibited a 7.6% reduction in breakdown voltage but a substantial 82.76% increase in cut-off frequency. In addition, the HfO2 partial passivation structure exhibited the highest Johnson's figure of merit. Consequently, considering the trade-off relationship between breakdown voltage and frequency characteristics, the HfO2 partial passivation structure emerged as a promising candidate for high-power and high-frequency AlGaN/GaN HEMT applications.

Enhanced Performance of GaN HEMTs in X‐band Applications Using SixN/Si3N4 Bilayer Passivation Technique

In order to achieve high‐performance gallium nitride (GaN) high‐electron‐mobility‐transistors (HEMTs) capable of operating in the X‐band, a bilayer passivation technique is employed. The technique involves creating a stacked passivation layer consisting of a 20‐nm Si‐rich silicon nitride (SixN) passivation layer and a 100‐nm N‐rich silicon nitride (Si3N4) passivation layer. This effectively reduces radio frequency scattering in GaN HEMTs without compromising the breakdown voltage (BV). On the one hand, the SixN passivation layer effectively suppresses the surface states of devices, resulting in low current collapse. On the other hand, the Si3N4 passivation layer can effectively reduce gate leakage caused by the SixN passivation layer, allowing the device to reliably operate at higher voltages. Consequently, a GaN HEMTs with SixN/Si3N4 bilayer passivation achieve a low current collapse of 5% and a high BV of 157 V. The device features a current gain cutoff frequency (fT) and maximum oscillation frequency (fmax) of 57.9 and 96.8 GHz, respectively. Additionally, it exhibits excellent radio frequency performance in the X‐band, with an output power density (Pout) of 13.7 W mm−1 and power added efficiency of 60.8% at a drain voltage (VD) bias of 50 V.

The effect of Si3N4/Al2O3 stacked structure of AlGaN/GaN HEMTs

Excessive gate leakage current and current collapse effects are the critical reliability issues for GaN-based high electron mobility transistors (HEMTs). In this paper, Si3N4 passivation layers was grown separately on p-GaN gate HRCL-HEMTs with or without Al2O3 film, and the gate leakage and current collapse effects of the devices and their intrinsic mechanisms were investigated. It is found that the device with Si3N4/Al2O3 stacked structure has better performance in terms of gate reverse leakage current, breakdown voltage, etc. The Al2O3 film blocking layer can reduce the H plasma damage to the channel, decrease the gate leakage, and the passivation can effectively suppress the increase of gate leakage current. Through variable temperature characteristic test, it is verified that the dominant mechanism of the device gate reverse leakage current is the two-dimensional variable range hopping (2D-VRH) model. The interface state between Si3N4 passivation layer and Al2O3 film increases the trap activation energy of the device, which is the reason for the reduction of gate reverse leakage current, and also causes the current collapse effect of the device.

8 A, 200 V normally-off cascode GaN-on-Si HEMT: From epitaxy to double pulse testing

In this paper, we provide a comprehensive study on all aspects of development of normally-off multi-finger III-nitride HEMT on Silicon in cascode configuration. AlGaN/GaN HEMT epi-stack with in situ SiN cap was grown on 2-in. Silicon (111) using MOCVD, utilizing a 2-step AlN nucleation, step-graded AlGaN transition layer and C-doped GaN buffer. Depletion-mode HEMTs in winding gate geometry with a gate width of 30 mm were fabricated with thick electroplated metal contacts and an optimized bilayer SiN passivation. Devices were diced and packaged in TO254 with conducting epoxy and Au-coated ceramic substrate. These packaged D-mode HEMTs exhibited a threshold voltage (Vth) of −12 V, maximum ON current of 10 A, and a 3-terminal hard breakdown in excess of 400 V. Bare dies of D-mode HEMTs were then integrated with commercially procured silicon MOSFET in a TO254 package in cascode configuration to achieve Vth > 2 V, ON current of 8 A, and breakdown >200 V. The normally-off cascaded GaN HEMTs were subjected to various gate and drain stress measurements and were found to exhibit a Vth shift of 10 mV after 1000 s of positive gate (+5 V) stress. The input and output capacitances of the cascode devices were measured to be 1 nF and 0.8 nF, respectively. The 3rd quadrant operation was checked at 8 A on-state current level to reveal a lower voltage drop of 0.7 V. Finally, cascode HEMTs were subjected to double pulsed testing (DPT) using a half-bridge evaluation board. On and off rise times of 52 ns and 59 ns were obtained along with energy loss of 25 μJ and 20 μJ, respectively, for devices switched at 8 A, 100 V.

Generation of imprinted strain gradients for spintronics

In this work, we propose and evaluate an inexpensive and CMOS-compatible method to locally apply strain on a Si/SiOx substrate. Due to high growth temperatures and different thermal expansion coefficients, a SiN passivation layer exerts a compressive stress when deposited on a commercial silicon wafer. Removing selected areas of the passivation layer alters the strain on the micrometer range, leading to changes in the local magnetic anisotropy of a magnetic material through magnetoelastic interactions. Using Kerr microscopy, we experimentally demonstrate how the magnetoelastic energy landscape, created by a pair of openings, enables in a magnetic nanowire the creation of pinning sites for in-plane vortex walls that propagate in a magnetic racetrack. We report substantial pinning fields up to 15 mT for device-relevant ferromagnetic materials with positive magnetostriction. We support our experimental results with finite element simulations for the induced strain, micromagnetic simulations, and 1D model calculations using the realistic strain profile to identify the depinning mechanism. All the observations above are due to the magnetoelastic energy contribution in the system, which creates local energy minima for the domain wall at the desired location. By controlling domain walls with strain, we realize the prototype of a true power-on magnetic sensor that can measure discrete magnetic fields or Oersted currents. This utilizes a technology that does not require piezoelectric substrates or high-resolution lithography, thus enabling wafer-level production.

Improvement of Dynamic On-Resistance in GaN-Based Devices with a High-Quality In Situ SiN Passivation Layer.

In this paper, we compared the characteristics of normally-on/off AlGaN/GaN MISHEMTs passivated by an in situ/ex situ SiN layer. The devices passivated by the in situ SiN layer revealed enhanced DC characteristics, such as the drain current of 595 mA/mm (normally-on) and 175 mA/mm (normally-off) with the high on/off current ratio of ~107, respectively, compared with those of the devices passivated by the ex situ SiN layer. The MISHEMTs passivated by the in situ SiN layer also exhibited a much lower increase of dynamic on-resistance (RON) of 4.1% for the normally-on device and 12.8% for the normally-off device, respectively. Furthermore, the breakdown characteristics are greatly improved by employing the in situ SiN passivation layer, suggesting that the in situ SiN passivation layer can remarkably not only suppress the surface-trapping effects, but also decrease the off-state leakage current in the GaN-based power devices.

Improved breakdown voltage mechanism in AlGaN/GaN HEMT for RF/Microwave applications: Design and physical insights of dual field plate

This work investigated and proposed the source–gate dual field plate (SG-FP) AlGaN/GaN HEMT for different gate-to-drain drift distances with a fixed gate length of 0.25 μm using ATLAS-TCAD. The increment in the GaN buffer thickness and gate-to-drain drift distance with the variation in the field plate length improves the device performance and breakdown voltages by maintaining the impact ionization mechanism. The breakdown voltage behavior, physical insights of electric field contour, impact generation rate, and potential profile intricacies of source field plate (S-FP), gate field plate (G-FP), and dual field plate (SG-FP) are illustrated. The proposed source–gate dual field plate (SG-FP) with the SiN passivation interfacial layer, SiO2, thicker GaN buffer, and extended gate-to-source drift region is best suited for optimal performance in high breakdown voltage, with optimum cut-off frequency and low gate-leakage current. The proposed dual field plate AlGaN/GaN device with the source field plate (LS-FP = 4 μm), gate field plate (LG-FP = 2 μm), the AlGaN buffer thickness of 3.697 μm, and gate-to-drain drift distance of 8 μm show the highest breakdown voltage of 562 V with the optimum frequency of 8.861 GHz. Finally, the AC/DC characteristics of the optimized dual field plate (SG-FP) are demonstrated. We observed that the source–gate dual field plate (SG-FP) device shows a 6.70% and 4.09% improvement in breakdown voltage compared to individual source field plate (S-FP) and gate field plate (G-FP) designs, respectively. This work shows that the proposed dual field plate device is used in power switching, high-power, and RF/Microwave applications due to its superior breakdown voltage performance, reduction in parasitic capacitances, and optimal cut-off frequency.

Enhanced Operational Characteristics Attained by Applying HfO2 as Passivation in AlGaN/GaN High-Electron-Mobility Transistors: A Simulation Study.

This study investigates the operating characteristics of AlGaN/GaN high-electron-mobility transistors (HEMTs) by applying HfO2 as the passivation layer. Before analyzing HEMTs with various passivation structures, modeling parameters were derived from the measured data of fabricated HEMT with Si3N4 passivation to ensure the reliability of the simulation. Subsequently, we proposed new structures by dividing the single Si3N4 passivation into a bilayer (first and second) and applying HfO2 to the bilayer and first passivation layer only. Ultimately, we analyzed and compared the operational characteristics of the HEMTs considering the basic Si3N4, only HfO2, and HfO2/Si3N4 (hybrid) as passivation layers. The breakdown voltage of the AlGaN/GaN HEMT having only HfO2 passivation was improved by up to 19%, compared to the basic Si3N4 passivation structure, but the frequency characteristics deteriorated. In order to compensate for the degraded RF characteristics, we modified the second Si3N4 passivation thickness of the hybrid passivation structure from 150 nm to 450 nm. We confirmed that the hybrid passivation structure with 350-nm-thick second Si3N4 passivation not only improves the breakdown voltage by 15% but also secures RF performance. Consequently, Johnson's figure-of-merit, which is commonly used to judge RF performance, was improved by up to 5% compared to the basic Si3N4 passivation structure.

Analysis of Trapping Effect on Large-Signal Characteristics of GaN HEMTs Using X-Parameters and UV Illumination.

GaN high-electron-mobility transistors (HEMTs) have attracted widespread attention for high-power microwave applications, owing to their superior properties. However, the charge trapping effect has limitations to its performance. To study the trapping effect on the device large-signal behavior, AlGaN/GaN HEMTs and metal-insulator-semiconductor HEMTs (MIS-HEMTs) were characterized through X-parameter measurements under ultraviolet (UV) illumination. For HEMTs without passivation, the magnitude of the large-signal output wave (X21FB) and small-signal forward gain (X2111S) at fundamental frequency increased, whereas the large-signal second harmonic output wave (X22FB) decreased when the device was exposed to UV light, resulting from the photoconductive effect and suppression of buffer-related trapping. For MIS-HEMTs with SiN passivation, much higher X21FB and X2111S have been obtained compared with HEMTs. It suggests that better RF power performance can be achieved by removing the surface state. Moreover, the X-parameters of the MIS-HEMT are less dependent on UV light, since the light-induced performance enhancement is offset by excess traps in the SiN layer excited by UV light. The radio frequency (RF) power parameters and signal waveforms were further obtained based on the X-parameter model. The variation of RF current gain and distortion with light was consistent with the measurement results of X-parameters. Therefore, the trap number in the AlGaN surface, GaN buffer, and SiN layer must be minimized for a good large-signal performance of AlGaN/GaN transistors.

Record RF Power Performance at 94 GHz From Millimeter-Wave N-Polar GaN-on-Sapphire Deep-Recess HEMTs

In this article, N-polar GaN-on-sapphire deep-recess metal–insulator–semiconductor (MIS)-high-electron-mobility transistors (HEMTs) with a breakthrough performance at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${W}$ </tex-math></inline-formula> -band are presented. Compared with prior N-polar GaN MIS-HEMTs, a thin GaN cap layer and atomic layer deposition (ALD) ruthenium (Ru) gate metallization were used along with high-quality GaN-on-sapphire epitaxy from Transphorm Inc. Before SiN passivation, 94 GHz large signal load–pull shows that the transistor obtains a record-high 9.65 dB linear transducer gain and demonstrated 42% power-added efficiency (PAE) with associated 4.4 W/mm of output power density at 12 V drain bias. By biasing the drain at 8 V, the device shows an even higher PAE of 44% with an associated 2.6 W/mm of output power density. After SiN passivation, the fabricated N-polar GaN-on-sapphire HEMTs show a high PAE of 40.2% with an associated 4.85 W/mm of output power density. Furthermore, a very high output power density of 5.83 W/mm with 38.5% PAE is demonstrated at a 14 V drain bias. This power performance shows significant efficiency improvement over previous N-polar GaN-on-SiC and demonstrates a combined efficiency and power density beyond what has been reported for Ga-polar devices, in spite of the low-thermal-conductivity sapphire substrate. This shows that N-polar GaN-on-sapphire technology is an attractive candidate for millimeter-wave power amplifier applications with simultaneous high efficiency and power density.

Impact of doping concentration and recess depth to achieve enhancement mode operation in β-Ga2O3 MOSFET

High power switching applications necessitates the MOSFET to operate in Enhancement mode (normally OFF). Achieving enhancement mode operation in β-Ga2O3 MOSFET is challenging due to the difficulty in p-type doping. A TCAD simulation study is implemented to study the effect of the variation of doping concentration and recess gate to achieve enhancement mode operation. Subsequently, the device characteristics such as Id-Vd, Id-Vg and breakdown analysis are performed for β-Ga2O3 MOSFET with a channel thickness of 240 nm. On decreasing the doping concentration, the magnitude of threshold voltage reduces to 0V at a doping concentration of 1 × 1016 cm−3 causing enhancement mode operation but with significantly low drain current. However, this resulted in the increase in the device breakdown voltage. Adding Si3N4 passivation layer, further, enhanced the breakdown voltage. Subsequent study involved the impact of recessed gate to achieve enhancement mode operation. On increasing the recess depth, the magnitude of threshold voltage is reduced to 0V at a doping concentration of 8 × 1017 cm−3 with less impact on drain current. This also resulted in the increase in the device breakdown voltage. The obtained results will be instrumental for Ga2O3 community to develop and design enhancement mode β-Ga2O3 MOSFET for high power and high voltage applications.

Enhanced Light Extraction Efficiency by Self-Masking Technology with Carbonized Photoresist for Light-Emitting Diodes

This work investigates a self-masking technology for roughening the surface of light-emitting diodes (LEDs). The carbonized photoresist with a naturally nano/micro-textured rough surface was used as a mask layer. After growing the Si3N4 passivation layer on LEDs, the texture pattern of the mask layer was transferred to the surface of the passivation layer via reactive ion beam (RIE) dry etching, resulting in LEDs with nano-textured surfaces. This nano-textured surface achieved by self-masking technology can alleviate the total internal reflection at the top interface and enhance light scattering, thereby improving the light extraction efficiency. As a result, the wall-plug efficiency (WPE) and external quantum efficiency (EQE) of rough-surface LEDs reached 53.9% and 58.8% at 60 mA, respectively, which were improved by 10.3% and 10.5% compared to that of the flat-surface Si3N4-passivated LED. Additionally, at the same peak, both LEDs emit a wavelength of 451 nm at 350 mA. There is also almost no difference between the I-V characteristics of LEDs before and after roughening. The proposed self-masking surface roughening technology provides a strategy for LEE enhancement that is both cost-effective and compatible with conventional fabrication processes.

A Simulation Optimization Factor of Si(111)-Based AlGaN/GaN Epitaxy for High Frequency and Low-Voltage-Control High Electron Mobility Transistor Application.

The effects of barrier layer thickness, Al component of barrier layer, and passivation layer thickness of high-resistance Si (111)-based AlGaN/GaN heterojunction epitaxy on the knee-point voltage (Vknee), saturation current density (Id-sat), and cut-off frequency (ft) of its high electron mobility transistor (HEMT) are simulated and analyzed. A novel optimization factor OPTIM is proposed by considering the various performance parameters of the device to reduce the Vknee and improve the Id-sat on the premise of ensuring the ft. Based on this factor, the optimized AlGaN/GaN epitaxial structure was designed with a barrier layer thickness of 20 nm, an Al component in the barrier layer of 25%, and a SiN passivation layer of 6 nm. By simulation, when the gate voltage Vg is 0 V, the designed device with a gate length of 0.15 μm, gate-source spacing of 0.5 μm, and gate-drain spacing of 1 μm presents a high Id-sat of 750 mA/mm and a low Vknee of 2.0 V and presents ft and maximum frequency (fmax) as high as 110 GHz and 220 GHz, respectively. The designed device was fabricated and tested to verify the simulation results. We demonstrated the optimization factor OPTIM can provide an effective design method for follow-up high-frequency and low-voltage applications of GaN devices.

Microscopic Modeling and Optimization of NbOx Mott Memristor for Artificial Neuron Applications

Mott memristors have been considered as a promising candidate to implement artificial neurons for neuromorphic computing thanks to their low-power consumption and superior scalability. However, the large variability and poor reliability hinder their large-scale applications. The complex working mechanism associated with the thermoelectric coupling in the correlated oxides such as niobium oxide (NbOx) has led to the lack of a physics-based model to guide device optimizations. In this work, we present a microscopic model of NbOx-based Mott memristor and investigate the evolution of atomic configuration via a real-time scale kinetic Monte-Carlo simulation involving multiple physical processes. We elucidate the relationship between the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}{-}{V}$ </tex-math></inline-formula> characteristics and the oxygen stoichiometry. We further reveal that the low-yield issue originates from the oxidation of NbO2 phase in air and the poor reliability correlates with the migration of oxygen vacancies. We hence propose to improve the device performance by introducing a Si3N4 passivation layer and N doping. The optimized devices exhibit excellent endurance of more than 108 cycles with significantly reduced variability and low operation voltage. Both oscillation neuron and leaky integrate and fire (LIF) neuron are experimentally implemented using the optimized Mott device, which could serve as a highly reliable artificial neuron with low variability and excellent endurance for large-scale neuromorphic computing systems.

Analysis of Operational Characteristics of AlGaN/GaN High-Electron-Mobility Transistor with Various Slant-Gate-Based Structures: A Simulation Study.

This study investigates the operational characteristics of AlGaN/GaN high-electron-mobility transistors (HEMTs) by applying a slant-gate structure and drain-side extended field-plate (FP) for improved breakdown voltage. Prior to the analysis of slant-gate-based HEMT, simulation parameters were extracted from the measured data of fabricated basic T-gate HEMTs to secure the reliability of the results. We suggest three different types of slant-gate structures that connect the basic T-gate electrode boundary to the 1st and 2nd SiN passivation layers obliquely. To consider both the breakdown voltage and frequency characteristics, the DC and RF characteristics of various slant-gate structures including the self-heating effect were analyzed by TCAD simulation. We then applied a drain-side extended FP to further increase the breakdown voltage. The maximum breakdown voltage was achieved at the FP length of 0.4 μm. Finally, we conclude that the slant-gate structures can improve breakdown voltage by up to 66% without compromising the frequency characteristics of the HEMT. When the drain-side FP is applied to a slant-gate structure, the breakdown voltage is further improved by up to 108%, but the frequency characteristics deteriorate. Therefore, AlGaN/GaN HEMTs with an optimized slant-gate-based structure can ultimately be a promising candidate for high-power and high-frequency applications.

TiO2 insertion layer deposited before passivation to reduce etch damage on AlGaN/GaN HEMT

Γ-gate has been used to increase the breakdown voltage of radio frequency (RF) devices, and the damage caused by gate pin etching has been studied. In this study, a TiO2 layer, acting as a protective layer, was inserted between the AlGaN barrier layer and SiN passivation layer. The AlGaN/GaN high-electron-mobility transistor (HEMT) with TiO2 had no kink effect in its output characteristic, and at high gate voltages, it demonstrated a higher transconductance than the HEMT without TiO2. The HEMT without TiO2 exhibited a more prominent saturation tendency for drain current. Additionally, the C–V test data show that the trap state density of the AlGaN/GaN interface of an AlGaN/GaN HEMT with TiO2 decreased compared with a HEMT without TiO2. DC and C–V test results show that the TiO2 layer can effectively reduce the etching damage of the material under the gate.

A novel Si-rich SiN bilayer passivation with thin-barrier AlGaN/GaN HEMTs for high performance millimeter-wave applications

We demonstrate a novel Si-rich SiN bilayer passivation technology for AlGaN/GaN high electron mobility transistors (HEMTs) with thin-barrier to minimize surface leakage current to enhance the breakdown voltage. The bilayer SiN with 20-nm Si-rich SiN and 100-nm Si3N4 was deposited by plasma-enhanced chemical vapor deposition (PECVD) after removing 20-nm SiO2 pre-deposition layer. Compared to traditional Si3N4 passivation for thin-barrier AlGaN/GaN HEMTs, Si-rich SiN bilayer passivation can suppress the current collapse ratio from 18.54% to 8.40%. However, Si-rich bilayer passivation leads to a severer surface leakage current, so that it has a low breakdown voltage. The 20-nm SiO2 pre-deposition layer can protect the surface of HEMTs in fabrication process and decrease Ga–O bonds, resulting in a lower surface leakage current. In contrast to passivating Si-rich SiN directly, devices with the novel Si-rich SiN bilayer passivation increase the breakdown voltage from 29 V to 85 V. Radio frequency (RF) small-signal characteristics show that HEMTs with the novel bilayer SiN passivation leads to f T/f max of 68 GHz/102 GHz. At 30 GHz and V DS = 20 V, devices achieve a maximum P out of 5.2 W/mm and a peak power-added efficiency (PAE) of 42.2%. These results indicate that HEMTs with the novel bilayer SiN passivation can have potential applications in the millimeter-wave range.

Electrochemical Characterization of Silicon-Based Gold Microband Electrode Array and its Application for Labelless T-2/HT-2 Toxin Immunosensing

Microelectrode arrays (MEAs) are gaining interest in electroanalysis owing to its distinctive voltammetry properties compared to its macro counterparts. Among the MEAs widely fabricated and studied are microdisc array and microband array. We report here the microfabrication of 10 μm microband array (number of band in an array, N=17) and its application in labelless impedimetric sensing of T-2/HT-2 toxin. The microband array has recess depth (i.e. Si3N4 passivation thickness) of 200 nm. Upon fabrication, the device was first characterized via visual inspection and electrochemical analysis. Cyclic voltammetry (CV) and electrochemical impedance spectroscopy (EIS) studies were performed in 1 mM ferrocenecarboxylic acid (FCA) in 0.01 M PBS, pH 7.4. At scan rate of 100 mv s-1, cyclic voltammogram for the microband array exhibited a slight peak-shaped CV; and was found to be scan-rate dependent. Experimental limiting current of the microband array (529±7 nA) was slightly lower compared to the calculated theoretical current (632 nA) indicating mixed diffusion profile of the microband array. The device was then employed in immunosensor construction for T-2/HT-2 toxins detection. T-2 mycotoxin and its metabolite (HT-2), are target of concern in the biosensing application due to its lethal toxicity and prominent presence in EU grains industry. Surface functionalization for anti-T-2 monoclonal antibody (mAb) immobilization was first achieved via surface hydroxylation with plasma cleaning and piranha solution treatment, followed by (3-Aminopropyl) triethoxysilane (APTES) silanization and 15 minutes pre-incubation with various concentrations of anti-T-2 toxin mAb in EDC/NHS mixture. The optimal concentrations for anti-T-2 toxin mAb immobilization on the microband array surface was determined at 0.75 mg mL-1. Based on the calibration curve developed in buffer solution system, the functionalized microband array was proven sensitive as it was able to detect T-2/HT-2 toxin at low dynamic working range (0-25 ppb) and limit of quantitation (LOQ) achieved at 4.89 ppb.

Improved interface and dark current properties of InGaAs photodiodes by high-density N2 plasma and stoichiometric Si3N4 passivation

The interface and dark current properties of mesa-structure In0.83Ga0.17As photodiodes with improved passivation processes are investigated. Inductively coupled plasma chemical vapor deposition (ICPCVD) is used to continuously perform high-density N2 plasma treatment of InGaAs epitaxial material and then SiNx passivation film deposition. The bonding efficiency between Si and N can be effectively improved when close-to-stoichiometric SiNx films are synthesized by precisely controlling the N2 and SiH4 flow rates. Metal-insulator-semiconductor (MIS) capacitors are fabricated to study the interface properties, and C-V analysis shows that the interface state density significantly decreases to 5.3 × 1012 cm−2eV−1. Then, the process is applied to mesa-structure In0.83Ga0.17As photodiodes, and the results show a low dark current density (13 nA/cm2, @ 190 K) and negligible surface current (@ room temperature), indicating the ideal passivation effect. The method of increasing the deposition temperature to promote chemical bonding of SiNx films is studied, and both the interface and dark current properties can be improved. Our work is of important significance to the development of low-noise and large-format InGaAs arrays.