Si Trench Research Articles

Striations on Si Trench Sidewalls Observed by Atomic Force Microscopy

Atomic force microscopy (AFM) measurements revealed many striations on the Si trench sidewalls fabricated by reactive ion etching (RIE). The trench sidewall surface was rougher when a resist with a rougher surface was employed as a mask, whereas it was smoother when a resist with a smoother surface was employed. This result strongly suggests that the roughness of the resist is one of the causes of the roughness of the trench sidewalls.

Etching and boron diffusion of high aspect ratio Si trenches for released resonators

This article discusses etching and boron diffusion in Si for the purpose of fabricating micromachined devices with high aspect ratio features. The etch rate of Si under various doping conditions in a Cl2 plasma generated by an electron cyclotron resonance (ECR) source was measured. It was found that lightly boron and phosphorus doped Si were etched at rates of 0.17 μm/min, whereas heavily boron doped Si had a similar etch rate of 0.16 μm/min. Si doped with high phosphorus concentrations had a faster etch rate of 0.31 μm/min. These etch rates were measured for Si etched at 100 W microwave power, 100 W rf power, 3 mTorr, with 20 sccm of Cl2 flow, and an ECR source to sample distance of 8 cm. The difference between the p++ and n++Si etch rates was more significant when etched at higher microwave power, higher rf power, or higher temperature. The depth of a heavily doped boron diffusion layer was measured for different feature sizes, trench openings, and aspect ratios. The diffusion layer thickness was found to decrease from 2.9 μm at the bottom of 50-μm-wide trenches, to 1.5 μm at the bottom of 2-μm-wide trenches. Diffusion thickness at the bottom of trenches near narrow features was found to increase to 3 μm compared to 2.5 μm for trenches near large features. The diffusion layer on the sides of the trenches for a 30 min boron diffusion at 1175 °C was 3.25 μm thick and was found to be independent of the trench opening and the trench aspect ratio. A deep etch-shallow diffusion process was used to fabricate thick released resonators with a short boron diffusion time. The second dry etch in the deep etch-shallow diffusion process, which is used to etch the p++ layer at the bottom of adjacent features, was studied. It was found that this etch successfully removed the p++ layer at the bottom of Si trenches in addition to widening the slightly tapered profile near the bottom of the trenches. This process has been applied to the fabrication of micromachined comb drive resonators and micromirrors successfully.

BSM 7: RIE lag in high aspect ratio trench etching of silicon

While etching high 3 aspect ratio trenches into silicon with reactive ion etching (RIE) using an SF6O2 chemistry it is observed that the etch rate is depending on the mask opening. This effect is known as RIE lag and is caused by the depletion of etching ions and radicals or inhibiting neutrals during their trench passage. In order to decide which source is the main cause, we constructed special “horizontal trenches” where only radicals are controlling the etching. The experiment showed that radicals are not responsible for RIE lag. Inhibitor depletion will result in inverse RIE lag. This effects is not found during our experimentation which leaves us with ion depletion to explain RIE lag. Depletion of ions is caused by ions captured by the sidewalls due to the angular distribution of incoming ions into the trench opening and the deflection of ions in the trench due to electrostatic fields. The analysis given in this paper indicates that the influencing field causes ion deflection, ion depletion, and therefore RIE lag in micron-sized Si trenches for low-energetic ions. In all cases, thus independent of the feature size, the angular distribution of incoming ions is thought to have a major contribution to RIE lag at higher pressures. These phenomena will be treated theoretically and simulated using a program, written in c++ under windows, in order to give a quantitative analysis of RIE lag.

New ultrahigh-frequency plasma discharge for overcoming the limitations of etching processes

Electron, ion, and neutral temperatures are measured in an ultrahigh-frequency (UHF) plasma by Langmuir probe and Doppler-shifted laser-induced fluorescence. The electron, ion, and neutral temperatures are found to be 1.5–2.0 eV (Ar plasma), 0.066 eV for Ar+, and 0.036 eV for Ne, respectively, and are lower than those reported for electron cyclotron resonance and helicon wave plasmas. The low temperatures cause lower dissociations of CHF3 gas even in the plasma production region of the UHF plasma source. The plasma is expected to dramatically improve the selectivity of SiO2 to the underlying Si. Additionally, the plasma can be used to accomplish a notch-free poly-Si etching profile and microloading-free Si trench etching with a high etching rate and high anisotropy with a narrow space pattern of less than 0.3 μm. It is suggested that the charge accumulation with the narrow space pattern is eliminated because of the low electron temperature in the UHF plasma.

High-Rate Bias Sputtering Filling of SiO2 Film Employing Both Continuous Wave and Time-Modulated Inductively Coupled Plasmas

The SiO2 film deposition employing inductively coupled plasma (ICP) with SiCl2H2/O2 occurred rapidly in the low-density plasma region due to production of precursors of SiCl2H2Ox (x=1–4). In an ICP CVD apparatus made with optimized distances between the antenna and the stage, and between the SiCl2H2 gas ring and the stage, a SiO2 film was with high deposition rate of more than 1 µm/min, 1.5 times the BHF etch rate of thermal oxide, and low Cl inclusion at a pressure of around 0.1 Torr. To supply ions to the Si wafer located in the ion-deficient plasma region, another time-modulated ICP antenna was set near the stage. Since deposition rate decreased with increasing wafer temperature, the laser the interference measurement of a Si wafer set on an RF-biased stage revealed the importance of the tight adhesion of the wafer to the stage. Ar+ ion bombardment during discharge on and off-time of 5 µs enabled us to fill Si trenches with SiO2 at a V dc of 500 V.

Plasma Immersion Ion Implantation for Electronic Materials

Plasma immersion ion implantation (PIII) is an emerging technology promising high dose-rate implantation and large-area processing compatibility. Innovations of this technique include: area-independent implantation time, concomitant deposition and implantation, and simple machine design and maintenance. This review summarizes the current understanding of PIII plasma dynamics, dosimetry, and electronic materials applications such as plasma doping for ultra-shallow junctions and high aspect ratio Si trenches, and subsurface synthesis of silicon-on-insulator materials.

Fabrication of 15 nm wide trenches in Si by vacuum scanning tunneling microscope lithography of an organosilane self-assembled film and reactive ion etching

Organosilane precursor molecules, here (aminoethylaminomethyl)phenethyltrimethoxysilane, or PEDA, are chemisorbed onto a Si surface forming a monolayer thick film. These films are patterned using the scanning tunneling microscope to locally modify the chemical reactivity and are then used as a template for selective electroless plating of a thin Ni film. Reactive ion etching in a C2F6/O2 mixture transfers this pattern into the substrate. Improvement over previous lithographic performance is achieved by growing the films on a passivated and lightly oxidized Si surface, optimizing the patterning conditions, and improving the metallization and etch chemistry. In this way, we have generated deep trenches on the order of 15±4 nm width, with edge roughness of 3 nm. We believe this demonstrates the resolution limiting factors of this lithographic process.

Atomic manipulation for patterning ultrathin films

Atomic manipulation with the scanning tunneling microscope offers a method for patterning with nanometer-scale resolution in the ultraclean environment available in ultrahigh vacuum. We have used atomic manipulation to write nanoscale trenches in Si(001) surfaces and thus define structures that have atomically straight edges. These experiments suggest that silicon films can be directly patterned with atomic resolution for films that are one atomic layer thick and with 2.4 nm resolution for films that are three atomic layers thick. We report on the growth and patterning of single atomic layers of electronic materials on Si(001).

Characterization of anisotropic stress around Si trenches by polarized Raman spectroscopy

Polarized Raman spectra around trenches formed on (100) silicon wafers have been measured and it has been found that the peak frequency shift varies with the polarization configuration, suggesting that anisotropic stresses occur around the trenches. The different stress components have been calculated by the use of the polarization Raman technique and it was found that the stress distribution of each component approximately agrees with that of each component simulated by a finite element method. Polarized Raman spectroscopy is a powerful technique for the estimation of an anisotropic stress of an electronic silicon device in situ.

The black silicon method II:The effect of mask material and loading on the reactive ion etching of deep silicon trenches

Very deep trenches in Si with smooth controllable profiles are etched using a fluorine-based Reactive Ion Etcher(RIE). The effect of various mask materials and loading on the profile is examined using the Black Silicon Method. It is found that most metal layers have an almost infinite selectivity. When the aspect ratio of the trenches is beyond five, RIE lag is found to be an important effect. Evidence is found that this effect is caused by the bowing of incoming ions by the electrical field.

Nanometer lithography on silicon and hydrogenated amorphous silicon with low-energy electrons

We report the local oxidation of hydrogen terminated silicon (Si) surfaces induced with the scanning-tunneling microscope (STM) operating in air and by a beam of free low-energy electrons. With STM, oxide lines were written in Si(100) and Si(110) and transferred into the substrate by wet etching. In case of Si(110) trenches with a width as small as 35 nm and a depth of 300 nm were made. The same process has also successfully been applied to the patterning of hydrogenated amorphous silicon (a-Si:H) thin films. We demonstrate the fabrication of metallic ‘nanowires’ using a-Si:H as resist layer. With regard to the process of oxidation, it is found that the oxide written with STM is apparently not proportional to the electron current, in contrast to results obtained with a beam of free electrons in an oxygen gas-environment. The dose needed to remove the hydrogen was determined as a function of electron energy. This dose is minimal for 100 eV electrons amounting to 4 mC/cm 2.

Pulsed uv-laser deposition on sub-0.25.MU.m periodic structures.

Depositing materials selectively on small domains like on top of 100 nm Si lines or in 100nm Si trenches is our purpose. Such a technique is not only scientifically important but also it may open up new interesting fields in science and engineering. We fabricated 100nm-wide Si-line/space patterns with the 4th harmonic of Nd:YAG laser (266nm) or with polarized ArF excimer lasers (193nm): first polyimide ripple structures, followed by series of reactive ion etchings. We have successfully deposited amorphous diamond- like-carbon only on top of 100nm-wide Si-lines by photoablation of polymers. We were also successful in depositing pure crystalline diamond over 100nm- wide Si lines. We are successful in fabricating 100nm line/space patterns on silicon using polymer exposures either by Nd:YAG laser at 266nm or polarized ArF excimer laser beam at 193nm, and by subsequent image transfer to silicon substrates by reactive ion etchings. We selectively deposited diamond-like-carbon on top surfaces of 100nm-wide Si lines. We also deposited crystalline diamond on such Si structures. Acknowledgements: The authors like to thank Hong Kong Government Research Grant RGC HKUST 627/94P and HKUST research grant RIG92.93.SC06.

Trench doping conformality by plasma immersion ion implantation (PIII)

Plasma immersion ion implantation (PIII) is a technique which can be used to conformally dope sidewalls of Si trenches. Using junction staining techniques and subsequently calibrating the observed stained depth to measured dose, dopant distributions inside Si trenches with aspect ratios ranging from 1 to 12 are studied for various bias voltages from 5 to 20 kV. Unlike conventional collimated beam implantation, PIII was able to conformally dope all aspect ratios studied with no evidence of abrupt discontinuities in the dopant distribution along the trench surface as a result of beam shadowing by trench geometry. Furthermore, it is shown that the higher implant biases results in more directional trajectories. Thus, dopant distributions along irregular geometries can be controlled by PDIII process conditions. >

Anisotropic etching of deep trench for silicon monolithic microwave integrated circuit

The anisotropic etching of deep trenches in bulk Si for isolating global buried collectors in Si monolithic microwave integrated circuits has been successfully developed with SF6/C2CIF5 gas mixtures. Using photoresist as the etching mask, deposition of polymer thin film on the sidewalls of the trench occurred, hence inhibiting lateral etching and made the process anisotropic. Under optimal processing conditions, an etching anisotropy of 0.98 and an etching selectivity of silicon to photoresist higher than 28 were observed.

Smoothing of the Si surface using CF4/O2 down-flow etching

Changes in surface morphology have been studied for Si surfaces treated with CF4/O2 down-flow etching. It has been found that rough Si surfaces can be smoothed and Si trench corners can be rounded off using this CF4/O2 down-flow etching. A SiFxOy layer is formed on the Si surface etched by a down-flow discharged CF4/O2 gas mixture in high O2 concentration. A thick SiFxOy layer is formed at the concave part of the surface, which prevents fluorine atoms from reacting with Si. On the other hand, Si etching proceeds fast at the convex part covered with a thin SiFxOy layer. As a result, a rough Si surface is smoothed and trench corners are rounded off. By applying this treatment to a polycrystalline silicon surface, the leakage current of a SiO2 film grown on it is much reduced.

Sub-50 nm high aspect-ratio silicon pillars, ridges, and trenches fabricated using ultrahigh resolution electron beam lithography and reactive ion etching

We present the fabrication of sub-50 nm Si pillars, ridges, and trenches with aspect ratios greater than 10 using ultrahigh resolution electron beam lithography and chlorine based reactive ion etching. These nanoscale Si features can be further reduced to 10 nm using an additional HF wet etch. No photoluminescence was observed from arrays of 10 nm Si structures passivated with HF.

Submicron Si trench profiling with an electron-beam fabricated atomic force microscope tip

The atomic force microscope (AFM) has the potential for profiling on a nanometer scale. However, for the AFM to be useful as a reliable and accurate metrology tool, the atomic force sensor used (i.e., cantilever and sensor tip) should be highly reproducible in the fabrication process and the tip shape used should be known with high accuracy. Moreover, for profiling and critical dimension measurement of device trenches with submicron openings and trench depth of 1 μm or more, nanometer-scale tip shapes with high aspect ratio will be required. In order to meet the above requirement, a novel high-resolution direct electron-beam deposition process has been developed in which a sharp tip is grown onto an existing Si cantilever structure. In the example to be discussed, sharp tips have been grown directly on the integrated tip of a micromachined Si cantilever by decomposition of a dimethyl-gold organometallic complex. The direct e-beam deposition process provides a unique capability for the controllable fabrication of high aspect ratio, nanometer-scale tip structures. Typical dimensions of the AFM tips achieved are 0.1 μm in column diameter, 1–4 μm high, and 15 nm in tip radius. Recent feasibility experiments of using these e-beam tips in the laser force microscope have demonstrated for the first time that this nano-scale tip can be used for mapping 1-μm-deep Si trenches. Submicron trenches with openings as small as 0.36 μm have been successfully profiled. In this paper, various issues on tip fabrication, deep trench profiling and comparision of AFM and corresponding scanning electron microscopy measurements will be discussed.

Feature‐Size Dependence of Etch Rate in Reactive Ion Etching

Reactive ion etching (RIE) of silicon trenches has been studied as a function of trench width, ranging from 0.4 to 2.5 μm, in a plasma. The average etch rate inside a Si trench becomes slower as the trench width decreases. This etching phenomenon is called RIE lag. Also, we have measured the ion saturation current under a negative dc bias voltage with a miniature Faraday cup inside a cylindrical hole. The loss of the ion current occurs mostly within a depth equal to the hole diameter, independent of the hole size, and the current loss is directly proportional to both pressure and RF self‐bias voltage at the substrate electrode. The lighter the mass of the ions, the more ions are deflected to the sidewall. Theoretical simulation shows that the electric field is perturbed primarily by the shape of the trench, and that the space charge near the trench plays an important role in ion deflection. Since the field perturbation is greater at the edge of the trench, the ion loss becomes more severe in a narrower trench, leading to the RIE lag. The sidewall profile observed in Si trenches shows a consistent picture of the field effect, particularly at low pressure where ion‐neutral collisions become insignificant.

Oblique ion implantation into nonplanar targets

A two-dimensional Monte Carlo simulation code has been applied to trench implantation as a function of incident angle to investigate the influence of tapered sidewalls in Si trenches on doping uniformity and efficiency. Oblique implantation in trenches provides uniform concentration profiles of dopants at sidewalls, whereas nonuniform concentrations due to the reflection of ions at the sidewall are obtained in the trench bottom. A slightly tapered sidewall with an angle of 3° results in higher doping efficiency by oblique implantation than vertical sidewalls.

Selected-area GaAs epitaxial growth on Si free from detrimental sidewall interactions

The growth of GaAs on patterned Si trenches is essential for the realization of planarized monolithic co-integration of GaAs and Si devices. The patterned boundary regions also provide lateral sinks for stresses and defect propagation so long as the undesirable sidewall growth interactions are suppressed. In this study, we developed a cantilever patterning mask structure, with feature sizes ranging from 1.5 to 100 μm using overhung SiO2 masks sitting on top of 3-μm-tall undercutting poly-Si patterns. The Si growth surface is protected and unetched. Patterned molecular beam epitaxial (MBE) grown GaAs layers are then prepared with complete elimination of sidewall interactions. Cross-sectional transmission electron microscopy (XTEM) results show there are reduced-defect areas in the regions 2 to 3 μm from the pattern edges compared to blanket grown areas. Combining the near-edge defect-reduction feature with other defect-reduction schemes incorporated during growth, patterned GaAs with sizes of 10 μm or under exhibits significant material quality improvements compared to blanket layer growth under the same conditions.