Si Technology Research Articles

Penerapan Metode Ward and Peppard dalam Analisis Infrastruktur TI pada Global Youth Action

Global Youth Action is a company engaged in youth empowerment with a focus on supporting the achievement of Sustainable Development Goals (SDGs) through the collaboration of various youth movements in Indonesia and internationally. However, the company still faces challenges in terms of infrastructure and information system (IS) applications that are not fully capable of supporting business processes optimally. One of the main obstacles is the limited human resources who have expertise in managing SI and information technology (IT) effectively. In preparing the SI strategic planning framework, this research uses the Ward and Peppard approach to analyze company needs. The analysis process includes mapping the company's internal and external environment through Value Chain Analysis and SWOT Analysis, as well as grouping the application portfolio using McFarlan Strategic Grid. The results of this research recommend the development of various applications such as the Global Youth Action Website application, SAP application, customer service information system, asset information system, and executive information system. These recommendations are expected to provide strategic direction for the global youth action company, as well as improve IT HR competencies and strengthen the application portfolio to support the sustainability of business processes at Global Youth Action.

Border Trap-Enhanced Ga2O3 Nonvolatile Optoelectronic Memory.

Nonvolatile deep ultraviolet optoelectronic memory (DUVOEM) holds immense potential in cyberphysical systems, offering high storage density, swift conversion speeds, and robust data security. However, the current data retention time, typically limited to milliseconds or hours, mostly underperforms the expectations of years as a nonvolatile memory. In this work, we present a β-Ga2O3/SiO2/Si thin-film transistor DUVOEM with an enhanced data storage capability via trapping and releasing of photogenerated holes in border traps. Specifically, the photogenerated holes in β-Ga2O3 will tunnel through SiO2 and be captured by these defects. Innovatively, the much slower holes' release process from the border traps has been harnessed in developing outstanding nonvolatile optoelectronic memories. Rapid writing and erasing speeds, long-time retention (≥10 years), and high robustness demonstrate its practical application values. This study not only provides a novel strategy for nonvolatile DUVOEM but also provides an instance of functionalizing β-Ga2O3 memory with common defects in Si technology.

Miniaturized nanoelectrospray interface for coupling capillary electrophoresis with mass spectrometry detection.

A miniaturized electrospray interface consisting of a microfluidic nanosprayer and nanospray module is reported in the presented short communication. The nanosprayer was fabricated using silicon (Si) technology suitable for cost-efficient high-volume mass production. The nanospray module enabled the positioning of the nanosprayer in front of a mass spectrometry entrance and its coupling with capillary electrophoresis based on the liquid junction principle. A case study of top-down and bottom-up proteomic analyses of intact cytochrome c and its tryptic digest demonstrates the practical applicability of the developed interface.

(Invited) Emerging Opto-Electronics and Quantum-Photonics Based on Ultra-Low Temperature Epitaxy of Group-IV Nanolayers

Germanium has already successfully entered Si technology through electronics and photonics applications [1,2]. However, due to the inherent lattice mismatch between Ge and Si, high-crystalline SiGe epitaxial layers of a sufficient thickness could only be grown for relatively low Ge concentration (<40%). At higher concentrations, the epitaxial SiGe layers relax the strain through either plastic or elastic relaxation. Thus, for about 2% (and 4%) strain between substrate and epilayer, only layer thicknesses of < 2nm (<0.5 nm) can be grown before elastic relaxation leads to quantum dot formation. In principle, such epitaxial Ge-rich QDs on Si(001) substrates can be successfully used to enhance the light emission properties of SiGe material [3-7]. However, planar Ge-rich two-dimensional layers would be preferred for efficient large-scale integration and reliable addressing of the nanostructures.Here, we demonstrate that ultra-low temperature (ULT) growth, carried out in a temperature window between 100°C and 350°C, is the key to extensive epilayer supersaturation, leading to layer thicknesses that are about one order of magnitude larger than what can be achieved by conventional epitaxy [8]. Thereby, we highlight that molecular beam epitaxy is the suitable choice for ULT growth since, using chemical vapor deposition methods for Si deposition, the ULT range cannot be reached due to the lack of precursor decomposition. However, we also stress that the chamber conditions during the growth need to be excellent in order to limit detrimental point defect formation during epitaxy.If these preconditions are met, ULT growth can lead to up to now unattainable layer structures. These, in turn, can be used, e.g., for the first available double heterostructure (DHS) light-emitting diodes in the group-IV system. We demonstrate that these LEDs, emitting in the telecom band, work efficiently up to room temperature and above. Light emission above room temperature is eventually limited by minority carrier injection.Additionally, novel electronic device concepts such as reconfigurable field effect transistors (RFETs) can be realized using several nanometer-thick Ge layers grown directly on silicon on insulator substrates. We argue that these devices have distinct advantages in performance and integration possibilities as compared to conventional nanoelectronics devices based on Ge-rich material, for which typically vertically grown nanowires are employed [9,10].

Lossless Phonon Transition Through GaN‐Diamond and Si‐Diamond Interfaces

AbstractAdvancing Silicon (Si) technology beyond Moore's law through 3D architectures requires highly efficient heat management methods compatible with foundry processes. While continued increases in transistor density can be achieved through 3D architectures, self‐heating in the upper tiers degrades the performance. Self‐heating is a critical problem for high‐power, high‐frequency, wide bandgap, and ultra‐wide bandgap devices as well. Diamond, known for its exceptional thermal conductivity, offers a viable solution in both these cases. Since thermal boundary resistance (between the channel/junction and diamond plays a crucial role in overall thermal resistance, this study investigates various dielectrics for interface engineering, such as Silicon dioxide (SiO2), amorphous‐ Silicon Carbide (a‐SiC), and Silicon Nitride (SiNx), to make a phonon bridge at gallium nitride (GaN)‐diamond and Si‐diamond interfaces. The a‐SiC interlayer reduces diamond/GaN (&lt;5 m2K per GW) and diamond/Si (&lt;2 m2K per GW) thermal boundary resistances by linking low‐ and high‐frequency phonons, boosting phonon transport through the interface. Engineered interfaces enhance heat spreading from the channel/junction and rule out premature failure.

Experimental demonstration of plasmon–plasmon scattering paves the way for electromagnetic wave-based digital logic concept

We report the experimental demonstration of plasmon–plasmon scattering at room temperature in the inversion layer of a patterned metal–oxide–semiconductor structure. This fundamental result paves the way for the development of plasmon–plasmon scattering logic, a revolutionary digital logic concept based on the generation, propagation, and manipulation of plasmons in an electron fluid, which was previously theoretically projected to exhibit femtojoule power dissipations and femtosecond switching speeds, while not demanding expensive nanometer-scale silicon (Si) technology fabrication processes for its implementation.

Symmetry Engineering of Epitaxial Hf0.5Zr0.5O2 Ultrathin Films.

Robust ferroelectricity in HfO2-based ultrathin films has the potential to revolutionize nonvolatile memory applications in nanoscale electronic devices because of their compatibility with the existing Si technology. However, to fully exploit the potential of ferroelectric HfO2-based thin films, it is crucial to develop strategies for the controlled stabilization of various HfO2-based polymorphs in nanoscale heterostructures. This study demonstrates how substrate-orientation-induced anisotropic strain can engineer the crystal symmetry, structural domain morphology, and growth orientation of ultrathin Hf0.5Zr0.5O2 (HZO) films. Epitaxial ultrathin HZO films were grown on the heterostructures of (001)- and (110)-oriented La2/3Sr1/3MnO3/SrTiO3 (LSMO/STO) substrate. Various structural analyses revealed that the (110)-oriented substrate promotes a higher degree of structural order (crystallinity) with improved stability of the (111)-oriented orthorhombic phase (Pca21) of HZO. Conversely, the (001)-oriented substrate not only induces a distorted orthorhombic structure but also facilitates the partial stabilization of nonpolar phases. Electrical measurements revealed robust ferroelectric properties in epitaxial thin films without any wake-up effect, where the well-ordered crystal symmetry stabilized by STO(110) facilitated better ferroelectric characteristics. This study suggests that tuning the epitaxial growth of ferroelectric HZO through substrate orientation can improve the stability of the metastable ferroelectric orthorhombic phase and thereby offer a better understanding of device applications.

Elucidating the formation mechanisms of the parasitic channel with buffer-free GaN/Si hetero-bonding structures

Driven by the increasing demand for 5G communication, GaN radio frequency (RF) device on Si technology has been flourishing attributable to the large size, low cost, and compatibility with complementary metal–oxide–semiconductor technology. However, a significant challenge is that a high-conductance parasitic channel forms at the interface between the III-N epitaxial layers and the Si substrate, leading to severe RF loss, which has been considerably impairing both the performance and advancement of RF GaN-on-Si technologies. Despite continuing controversies concerning the physical mechanisms engendering the parasitic channel, clarification is critically needed. Standing apart from traditional studies on RF loss in III-N epilayers grown on Si, this article comprehensively investigates the bonding interface of GaN thin film and Si(100) substrate realized via direct surface activated bonding and ion-cutting technologies. It was clearly determined that substantial diffusion of gallium (Ga) atoms into the Si substrate at the bonding interface occurred even at an annealing temperature as low as 350 °C. Subsequent high-temperature post-annealing at 800 °C intensified this diffusion, activating Ga atoms to form a p-type highly conductive parasitic channel. Simultaneously, it triggered Ga atoms aggregation and incited melt-back etching within the Si substrate at the interface. Contrasting with the conventional hetero-epitaxy, this study presents a compelling view based on the bonding technique. It conclusively elucidates the physical mechanisms of the formation of the primary source of RF loss—the p-type highly conductive parasitic channel.

A 6 Mbps 7 pJ/bit CMOS Integrated Wireless Simultaneous Lightwave Information and Power Transfer System for Biomedical Implants

A 6 Mbps 7 pJ/bit CMOS Integrated Wireless Simultaneous Lightwave Information and Power Transfer System for Biomedical Implants

Integration of epitaxial LiNbO3 thin films with silicon technology

Development of bulk acoustic wave filters with ultra-wide pass bands and operating at high frequencies for 5th and 6th generation telecommunication applications and micro-scale actuators, energy harvesters and sensors requires lead-free piezoelectric thin films with high electromechanical coupling and compatible with Si technology. In this paper, the epitaxial growth of 36°Y-X and 30°X-Y LiNbO3 films by direct liquid injection chemical vapour deposition on Si substrates by using epitaxial SrTiO3 layers, grown by molecular beam epitaxy, has been demonstrated. The stability of the interfaces and chemical interactions between SrTiO3, LiNbO3 and Si were studied experimentally and by thermodynamical calculations. The experimental conditions for pure 36°Y-X orientation growth have been optimized. The piezoelectricity of epitaxial 36°Y-X LiNbO3/SrTiO3/Si films was confirmed by means of piezoelectric force microscopy measurements and the ferroelectric domain inversion was attained at 85 kV.cm−1 as expected for the nearly stoichiometric LiNbO3. According to the theoretical calculations, 36°Y-X LiNbO3 films on Si could offer an electromechanical coupling of 24.4% for thickness extension excitation of bulk acoustic waves and a comparable figure of merit of actuators and vibrational energy harvesters to that of standard PbZr1−x Ti x O3 films.

Direct bandgap emission from strain-doped germanium

Germanium (Ge) is an attractive material for Silicon (Si) compatible optoelectronics, but the nature of its indirect bandgap renders it an inefficient light emitter. Drawing inspiration from the significant expansion of Ge volume upon lithiation as a Lithium (Li) ion battery anode, here, we propose incorporating Li atoms into the Ge to cause lattice expansion to achieve the desired tensile strain for a transition from an indirect to a direct bandgap. Our first-principles calculations show that a minimal amount of 3 at.% Li can convert Ge from an indirect to a direct bandgap to possess a dipole transition matrix element comparable to that of typical direct bandgap semiconductors. To enhance compatibility with Si Complementary-Metal-Oxide-Semiconductors (CMOS) technology, we additionally suggest implanting noble gas atoms instead of Li atoms. We also demonstrate the tunability of the direct-bandgap emission wavelength through the manipulation of dopant concentration, enabling coverage of the mid-infrared to far-infrared spectrum. This Ge-based light-emitting approach presents exciting prospects for surpassing the physical limitations of Si technology in the field of photonics and calls for experimental proof-of-concept studies.

Role of oxygen functional groups and attachment of Au nanoparticles on graphene oxide sheets for improved photodetection performance.

Integrating low-dimensional graphene oxide (GO) with conventional Si technology offers innovative strategies for developing ultrafast wideband photodetectors. In this study, we synthesized GO and explored its potential application in broadband photodetection alongside silicon heterostructures. The as-synthesized GO contains various oxygen functional groups, as evidenced by X-ray photoelectron and Fourier transform infrared spectroscopy. These functional groups contribute to increased photo absorption, enhancing photodetection performance. The systematic reduction of these functional groups from the GO surface via thermal annealing decreases photo absorption and consequently lowers the photocurrent. This reduction diminishes photo absorption and amplifies the dark current by approximately 25 times, from 20 nA to 496 nA. This dark current increase is attributed to the electron mobility following the reduction of functional groups. However, attaching plasmonic gold nanoparticles (Au NPs) to the GO surface enhances UV-Vis absorption in the visible region, enabling broadband detection. The even distribution of attached Au NPs on the GO surface is confirmed through field emission transmission electron microscopy. While thermal annealing of GO diminishes the responsivity from 4.6 A W-1 to 3.0 A W-1, the attachment of Au NPs augments the responsivity by more than two-fold, reaching 10.0 A W-1. Thus, it highlights the importance of rich oxygen functional groups in GO and the attachment of Au NPs to achieve more efficient photo-sensing properties.

Hexagonal-Ge Nanostructures with Direct-Bandgap Emissions in a Si-Based Light-Emitting Metasurface.

Si-based emitters have been of great interest as an ideal light source for monolithic optical-electronic integrated circuits (MOEICs) on Si substrates. However, the general Si-based material is a diamond structure of cubic lattice with an indirect band gap, which cannot emit light efficiently. Here, hexagonal-Ge (H-Ge) nanostructures within a light-emitting metasurface consisting of a cubic-SiGe nanodisk array are reported. The H-Ge nanostructure is naturally formed within the cubic-Ge epitaxially grown on Si (001) substrates due to the strain-induced nanoscale crystal structure transformation assisted by far-from-equilibrium growth conditions. The direct-bandgap features of H-Ge nanostructures are observed and discussed, including a rather strong and linearly power-dependent photoluminescence (PL) peak around 1562 nm at room temperature and temperature-insensitive PL spectrum near room temperature. Given the direct-bandgap nature, the heterostructure of H-Ge/C-Ge, and the compatibility with the sophisticated Si technology, the H-Ge nanostructure has great potential for innovative light sources and other functional devices, particularly in Si-based MOEICs.

Identification and control of crystalline nuclei facets imparting to the breaking of symmetry selection rules of optical phonon modes in GaP/Si (001)

The complex interfacial structural issues associated with hetero-polar epitaxial integration of GaP on Si(001) are resolved by improving the kinetics of gallium and phosphorous adatoms during the initial nucleation process. This is achieved through the use of Raman spectroscopy as a feedback mechanism. The peak intensity ratio of forbidden (transverse optical)-to-allowed (longitudinal optical) phonons of GaP under unpolarized Raman scattering is contemplated as an initial guide to ascertain the relative density of defect-mediated non-(001) GaP facets. The azimuthal-angle dependent polarized Raman spectroscopy is then applied to identify and quantify the nucleation of higher-index non-(001) ({111} and {112}) faceted islands in the nucleation layer and their propagation in the overgrown structures. The nucleation of GaP adatoms on the Silicon surface at ∼525 °C leads to a smooth surface and substantially suppresses the defect-mediated facets. The optimal mobility and controlled adsorption of adatoms of Ga and P on the substrate surface under intermediate nucleation kinetics foster the charge-neutral interface, and hence the defect-suppressed two-dimensional layer growth of GaP. The proposed Raman spectroscopy methodology emerges as a rapid and economical alternative to existing in situ reflection anisotropy spectroscopy and high-resolution transmission electron microscopy techniques for structural identification. This method of growth optimization can also be applied to other III-V polar semiconductors to achieve high-quality and efficient monolithic integration of devices on existing Si technology.

Growth modes and chemical-phase separation in GaP1−xNx layers grown by chemical beam epitaxy on GaP/Si(001)

We investigated the chemical beam epitaxy of GaP1−xNx grown on nominally (001)-oriented Si substrates, as desired for the lattice-matched integration of optoelectronic devices with the standard Si technology. The growth mode and the chemical, morphological, and structural properties of samples prepared using different growth temperatures and N precursor fluxes were analyzed by several techniques. Our results show that, up to x≈0.04, it is possible to synthesize smooth and chemically homogeneous GaP1−xNx layers with a high structural quality. As the flux of the N precursor is increased at a given temperature to enhance N incorporation, the quality of the layers degrades upon exceeding a temperature-dependent threshold; above this threshold, the growing layer experiences a growth mode transition from 2D to 3D after reaching a critical thickness of a few nm. Following that transition, the morphology and the chemical composition become modulated along the [110] direction with a period of several tens of nm. The surface morphology is then characterized by the formation of {113}-faceted wires, while the N concentration is enhanced at the troughs formed in between adjacent (113) and (1¯1¯3). On the basis of this study, we conclude on the feasibility of fabricating homogeneous thick GaP1−xNx layers lattice matched to Si (x=0.021) or even with N content up to x=0.04. The possibility of exceeding a N mole fraction of 0.04 without inducing coupled morphological–compositional modulations has also been demonstrated when the layer thickness is kept below the critical value for the 2D–3D growth mode transition.

Spiral-Driven Vertical Conductivity in Nanocrystalline Graphene.

The structure of graphene grown in chemical vapor deposition (CVD) is sensitive to the growth condition, particularly the substrate. The conventional growth of high-quality graphene via the Cu-catalyzed cracking of hydrocarbon species has been extensively studied; however, the direct growth on noncatalytic substrates, for practical applications of graphene such as current Si technologies, remains unexplored. In this study, nanocrystalline graphene (nc-G) spirals are produced on noncatalytic substrates by inductively coupled plasma CVD. The enhanced out-of-plane electrical conductivity is achieved by a spiral-driven continuous current pathway from bottom to top layer. Furthermore, some neighboring nc-G spirals exhibit a homogeneous electrical conductance, which is not common for stacked graphene structure. Klein-edge structure developed at the edge of nc-Gs, which can easily form covalent bonding, is thought to be responsible for the uniform conductance of nc-G aggregates. These results have important implications for practical applications of graphene with vertical conductivity realized through spiral structure.

Life-cycle energy demand comparison of medium voltage Silicon IGBT and Silicon Carbide MOSFET power semiconductor modules in railway traction applications

Power semiconductors process roughly 70 % of global energy, with a higher percentage expected as worldwide transport electrification, renewables and wide-band-gap (WBG) semiconductors are implemented, significantly affecting global energy savings. This manuscript evaluates the cumulative energy demand (CED) encompassing the manufacture and use-phase in a railway traction application of silicon (Si) and silicon carbide (SiC) power semiconductor modules. Realistic manufacturing data from a power semiconductor fab has been considered for 3.3 kV/450 A state-of-the-art Si and SiC LinPak modules. SiC devices presented around 2.6 – 3.8× higher CED per area than Si devices in the manufacturing phase. However, due to the considerably smaller SiC chip area per ampere required, a 1.1 – 1.6× lower grey energy than Si technology is estimated. For the first time, such analysis is based on specialized power semiconductor fab data for both technologies and provides a baseline for the life cycle energy assessment of power electronics systems. Besides, the use-phase energy losses were evaluated for a realistic railway application, considering an operational lifetime of 30 years. The module manufacturing energy is negligible compared to the use-phase stage. Furthermore, the SiC technology presented an estimated energy-saving potential of 24 MWh/lifetime per module compared to the Si device.

(Invited) Switching Characteristics of GaN Power Transistors

A shorter switching time and smaller conduction and switching losses are the key advantages of GaN power devices over Si technology. Further improvements of GaN HEMT technology will require new design approaches including SiC and even, possibly, diamond substrates, gate and drain edge engineering (beyond just using field plates) for optimizing the voltage distribution in the drain-to-gate spacing to using perforated channel design and a low conducting passivation for smoothing or even eliminating the sharp maximum of the electric field in the vicinity of the gate and field plate edges on switching time.

2D Dual Gate Field-Effect Transistor Enabled Versatile Functions.

Advanced computing technologies such as distributed computing and the Internet of Things require highly integrated and multifunctional electronic devices. Beyond the Si technology, 2D-materials-based dual-gate transistors are expected to meet these demands due to the ultra-thin body and the dangling-bond-free surface. In this work, a molybdenum disulfide (MoS2 ) asymmetric-dual-gate field-effect transistor (ADGFET) with an In2 Se3 top gate and a global bottom gate is designed. The independently controlled double gates enable the device to achieve an on/off ratio of 106 with a lowsubthreshold swing of 94.3 mV dec-1 while presenting a logic function. The coupling effect between the double gates allows the top gate to work as a charge-trapping layer, realizing nonvolatile memory (105 on/off ratio with retention time over 104 s) and six-level memory states. Additionally, ADGFET displays a tunable photodetection with the responsivity reaching the highest value of 857 A W-1 , benefiting from the interface coupling between the double gates. Meanwhile, the photo-memory property of ADGFET is also verified by using the varying exposure dosages-dependent illumination. The multifunctional applications demonstrate that the ADGFET provides an alternative way to integrate logic, memory, and sensing into one device architecture.

High-performance tin oxide field-effect transistors deposited by thermal atomic layer deposition

In this study, we investigated the impact of annealing ambient on the performance of SnO2-based field-effect transistors (FETs) while adhering to the thermal budget constraint (process temperature < 450 °C). The SnO2 films were deposited by thermal atomic layer deposition (T-ALD). After annealing the films for 2 h at 400 °C, it was observed that annealing in an O2 ambient resulted in a SnO2 film with an excessive number of background carriers, which made it difficult to fully deplete the channel. Conversely, annealing in an N2 ambient led to an unstable channel that could not be effectively modulated, despite having a carrier concentration about an order of magnitude lower than that of the O2-annealed film. Surprisingly, the devices annealed in an air ambient exhibited the best performance. X-ray photo-emission spectroscopy revealed that annealing in O2 ambient resulted in a higher level of oxygen vacancy, while N2 annealing was more effective in creating stoichiometric SnO. The best device performance achieved in this study was observed in a 6-nm thick channel that was annealed in the air. This device exhibited an on/off ratio of 1.2 × 1011, subthreshold swing of 0.4 V/dec., field-effect mobility of 14.6 cm2/V·s, and threshold voltage of 1.1 V, operating in an enhancement mode. These results emphasize the potential of ALD SnO2 channels for high-performance transistors that are compatible with back-end-of-line processes in Si technology.