Short-circuit Protection Scheme Research Articles

Ultrafast Protection of Discrete SiC MOSFETs With PCB Coil-Based Current Sensors

Silicon carbide (SiC) <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> s offer significant advantages in terms of improved efficiency and reduced size of power electronic converters. However, they possess lesser short-circuit withstand time than silicon devices. An ultrafast short-circuit protection scheme for TO-247 packaged SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> s is presented in this article. The protection scheme utilizes printed circuit board (PCB) coils to sense the rate of change of current through SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> s in a half-bridge circuit. The PCB coils are fabricated near a single interconnect trace between the power device and the dc busbar. To ensure minimal intrusion inside the power-loop, the methodology of selecting the minimum trace length for a desired mutual inductance between the coil and the interconnect trace is presented through finite-element analysis. Experimental results for an SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> subjected to a hard switched fault and a fault under load are presented, and the protection circuit response time under 25 ns is reported. Lastly, the peak current-mode control of a buck converter is implemented using the designed PCB coil-based sensor as current feedback sensor. Therefore, the PCB coil is demonstrated to be an effective alternative for Hall effect and magnetic core-based sensors in current control applications with dc/dc converters.

A fast and cost-effective short circuit protection scheme for low-power converters for small-scale photovoltaic application

PurposeThis paper aims to propose an integrated protection scheme for converters of a low-power, low-cost photovoltaic system. Power electronic converters use a variety of methods to limit overload and fault current. The use of insulated and non-insulated sensors along with additional circuits to detect and limit fault current can cause current to be limited or completely cut off before damage to semiconductor devices. In addition, fuses that have slower performance are used as backup for any type of protection.Design/methodology/approachFirst, all the candidate points for protection are investigated. In this paper, after examining the performance of glass fuses as linear resistors, they are used as a current feedback element. A simple, isolated and reliable circuit for fault detection at various points of the system has been proposed that can be implemented and operated in single shot or auto-reclose operating mode.FindingsThe experimental results of this circuit on a dc/dc converter and an H-bridge inverter show that it can cut off all instantaneous short circuit errors in less than 50 µs and prevent damage to the semiconductor switch.Originality/valueIn low-cost and low-power converters, it is usually not cost-effective to use complex and expensive devices. For this reason, these converters are more vulnerable to faults. On the other hand, in complex systems such as photovoltaics, several converters are used simultaneously in different parts, and the occurrence of a fault in each of them causes the whole system to fail.

A Comprehensive Short-Circuit Protection Scheme for Series-Connected SiC MOSFETs

Series connection of devices is an effective way to achieve higher blocking voltage. SiC MOSFETs exhibit narrow short-circuit withstand time and generally much lower short-circuit robustness than silicon IGBTs. This puts a critical concern on their utilization, further stressing the importance of reliable protection. A complete short-circuit protection should be implemented to improve the reliability. In this article, a systematic short-circuit analysis methodology is proposed. Following this methodology, all the possible fault scenarios can be derived. Besides the traditional short-circuit scenarios, some unique short-circuit faults, such as a single device short- or open- circuit, have been found in series-connected SiC MOSFETs. These unique faults may not cause overcurrent, which means the traditional overcurrent-based protection is not applicable. This article proposes a method combining drain-source voltage logic signal and gate signal to comprehensively detect both classic short-circuit scenarios and unique fault scenarios. Another different point in series-connected devices is that the soft turn-off should be synchronized for each serial device to prevent excessive voltage unbalancing. The proposed short-circuit protection scheme is evaluated under each short-circuit scenario. The experimental results demonstrate that the proposed protection scheme can successfully protect the serial devices from further destruction within 500 ns for all short-circuit scenarios.

Comparative Design of Gate Drivers with Short-Circuit Protection Scheme for SiC MOSFET and Si IGBT

Short-circuit faults are the most critical failure mechanism in power converters. Among the various short-circuit protection schemes, desaturation protection is the most mature and widely used solution. Due to the lack of gate driver integrated circuit (IC) with desaturation protection for the silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET), the conventional insulated gate bipolar transistor (IGBT) driver IC is normally used as these two devices have similar gate structure and driving mechanism. In this work, a gate driver with desaturation protection is designed for the 1.2-kV/30-A SiC MOSFET and silicon (Si) IGBT with the off-the-shelf driver IC. To further limit voltage-overshoot at the rapid turn-off transient, the active clamping circuit is introduced. Based on the experiments of switching characterization and short-circuit test, the SiC MOSFET shows faster switching speed, more serious electromagnetic interference (EMI) issue, lower switching loss (half), and higher short-circuit current (1.6 times) than the Si IGBT, even with a slower gate driver. Thus, a rapid response speed is required for the desaturation protection circuit of SiC MOSFET. Due to the long delay time of the existing desaturation protection scheme, it is technically difficult to design a sub- μ s protection circuit. In this work, an external current source is proposed to charge the blanking capacitor. A short-circuit time of 0.91 μ s is achieved with a reliable protection. Additionally, the peak current is reduced by 22%.

Design Considerations and Development of an Innovative Gate Driver for Medium-Voltage Power Devices With High $dv/dt$

Medium-voltage (MV) silicon carbide (SiC) devices have opened up new areas of applications which were previously dominated by silicon-based IGBTs. From the perspective of a power converter design, the development of MV SiC devices eliminates the need for series connected architectures, control of multilevel converter topologies which are necessary for MV applications, and the inherent reliability issues associated with it. However, when SiC devices are used in these applications, they are exposed to a high peak stress (5–10 kV) and a very high $dv/dt$ (10–100 kV/ $\mu$ s). Using these devices calls for a gate driver with a dc–dc isolation stage that has ultralow coupling capacitance in addition to be able to withstand the high isolation voltage. This paper presents a new MV gate driver design to address these issues while maintaining a minimal footprint for the gate driver. An MV isolation transformer is designed with a low interwinding capacitance, while maintaining the clearance, creepage, as well as insulation standards. A dc isolation test has been performed to validate the integrity of the insulating material. The key features include low input common mode current, and a short-circuit protection scheme specifically designed for 10 kV SiC mosfet s. The performance of the gate driver is evaluated using double pulse tests and continuous tests. Experimental results validate the advantages of the gate driver and its application for MV SiC devices exhibiting very high $dv/dt$ . The proposed gate driver concept is aimed at providing an efficient and reliable method to drive MV SiC devices.

An Experimental Demonstration of Short Circuit Protection of SiC Devices

An experimental demonstration of an effective short circuit protection scheme for SiC MOSFETs is presented in this paper. Measurements of the static characteristics of the SiC device before and after the short circuit events were obtained to evince that the device remained in good health. An ultra-fast short circuit protection scheme is implemented given the observed lower short-circuit withstand of present SiC devices. It is shown that the integrity of the SiC device was protected after one-hundred short circuit events.

Switching Characterization and Short-Circuit Protection of 1200 V SiC MOSFET T-Type Module in PV Inverter Application

In this paper, a 1200 V, 100 A T-type full SiC power module is evaluated in a five-level T-type photovoltaic (PV) inverter. The T-type module is characterized with double pulse test, and based on the results, loss evaluation of the PV inverter is performed. The high power density of 27 W/in3 and 3 kW/kg, and the peak efficiency of 99.2% are achieved for the lab prototype. A de-sat based short-circuit protection scheme using commercial driver chip ACPL339J is presented and experimentally verified on the PV inverter prototype. With the presented circuit, less than 600 ns response time is realized, and a two-stage soft turn-off circuit with gate voltage clamping is implemented. A gate voltage stabilizer circuit without affecting the switching loss is also proposed to prevent false trigger. Experimental results show the superior performance of the T-type module-based PV inverter and demonstrate the effectiveness of the protection scheme.

Future-Proof MV Distribution Network Short-Circuit Protection Scheme

Short-circuit protection operation time delays in medium-voltage (MV) networks have traditionally been dependent on fault-current magnitude or measured impedance with fixed time delays or inverse time curves. However, MV feeder protection selectivity issues with low-voltage-ride-through (LVRT) curves of distributed generation (DG) units and possibility of intended island operation must be considered increasingly in the future as a part of the protection scheme. Therefore, this paper proposes a future-proof, directional short-circuit protection scheme for Smart Grids. The proposed scheme enables the definition of LVRT curve compatible protection operation time delays during normal, grid connected operation for protection relays in MV distribution network having multiple protection zones without use of high-speed communication based interlockings/blockings between relays.

High-efficiency dual transistor base drive circuit based on the Cuk converter topology

A dual transistor base drive circuit that unifies all important functions (on-state base current power supply for two power transistors, off-state negative U/sub be/ =-5 V base-emitter voltage, overcurrent and short-circuit protection scheme based on saturation voltage, and on- and off-state monitoring circuits) is described. The unit provides two base drive outputs using a single switching converter. It can be used to control two individual power transistors in different inverter configurations, e.g. common emitter or bridge configuration. The concept of a dual transistor base drive circuit using the Cuk switching regulator topology enables the low volume construction of a high-efficiency base drive unit for a high-power transistor inverter bridge leg. The circuit is powered from a common DC rail. The base current waveforms are characterized by steep slopes and an overcurrent peak at turn on.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>