Power supply quality improvement is a very real goal for utilities throughout the world because of the expanding diffusion of sensitive (electronic) loads. Among the various types of phenomena affecting voltage quality (i.e., surges, harmonics, spikes, etc.) a great amount of concern is given to the so-called voltage dips or voltage sags. The main source of such a dip or sag is connected with the M.V. distribution line's transient, quasitransient and permanent short circuits. Once a short circuit occurs on a distribution net, a voltage dip appears on all the lines departing from the same bus of the faulted line. Because of this fact, a significant degree of relief from the dip phenomena, or, in other words, a significant improvement in the power-supply quality, can be achieved if the fault current is limited by a proper device (a fault-current limiter (FCL))The design of a FCL device devoted to voltage dip limitation has less stringent requirements, as far as reliability and operation quickness are concerned, than does the design of the equivalent device which has as a target the reduction of the circuit breakers' rated capacity. Very attractive and rather simple solutions are possible using standard, electronically controllable power devices such as thyristors or GTOs. In the present paper, some possible circuits consisting in series-resonant and nonresonant impedance and controlled by static valves are proposed. Computer modelling and simulations of the above circuits and their static and dynamic performances are reported, compared and discussed