Shoot-through Issue Research Articles

High-Boost-Gain Split-Source Inverter With Shared-Ground and No Shoot-Through Issue

High-Boost-Gain Split-Source Inverter With Shared-Ground and No Shoot-Through Issue

Dynamic Dead-Time Compensation Method Based on Switching Characteristics of the MOSFET for PMSM Drive System

In order to effectively avoid the shoot-through issue of the semiconductor device (such as the power metal-oxide-semiconductor field-effect transistor (MOSFET)) adopted in the phase leg of the motor drives, a dead-time zone should be inserted. However, the nonlinearity caused by the dead-time effect will bring about voltage/current distortion, as well as high-order harmonics, which largely degrades the performance of motor drives, especially in low-speed operations with slight loads. In this paper, a dead-time compensation method is proposed to suppress such side effects caused by dead-time zones and improve the performance of motor drives. Compared with other existing methods, the proposed method is mainly focused on the switching characteristics of the power MOSFET, which is directly relative to the compensation time in each pulse-width modulation (PWM) period. Firstly, a detailed derivation process is elaborated to reveal the relationship between compensation time and the switching performance of the MOSFET. Meanwhile, the switching process of the MOSFET is also well analyzed, which summarizes the variations in the switching time of the MOSFET with a varied load current. Then, the multipulse test (MPT) is carried out to obtain accurate values of the switching time with the varied load current in a wide range (0–80 A) and form a 2D lookup table. As a result, the compensation method can easily be realized by combining the lookup table and linear interpolation based on the phase current of the motor dynamically. Finally, the effectiveness of the proposed method is verified based on a 12 V permanent magnet synchronous machine (PMSM) drive system. According to the relative experiment results, it can be clearly observed that the time-domain waveform distortion, high-order harmonics, and total harmonic distortion (THD) value are reduced significantly with the proposed dynamic compensation method.

A Split-Inductor Flying Capacitor Converter for Medium-Voltage Application

This article presents a split-inductor flying capacitor (SIFC) converter for medium-voltage applications to improve reliability and eliminate the shoot-through issue. Reliability and lower total harmonic distortion (THD), mainly caused by the pulsewidth modulation (PWM) dead time, are the vital aspects while designing higher power density converters. The dead time in the PWM can be reduced/removed in the proposed converter. This will increase the voltage/current gain and enhance the quality of the voltage/current waveforms even at lower modulation index and light loads than the traditional flying capacitor (FC) and neutral point clamped (NPC) converters. Furthermore, an improved phase-shifted PWM (IPS-PWM) is used to maintain the flying capacitor’s nominal reference voltage. A comparison is made between SIFC and five different existing multilevel topologies. The proposed converter has higher voltage/current gain, lower THD over conventional FC and NPC converters, and higher efficiency than the other three topologies. Finally, the SIFC converter’s robustness with IPS-PWM is validated using experimental results in different operating conditions such as sudden load changes, modulation index, output frequency, and power factor (unity, lagging, and leading).

Multioutput Hybrid Solar Inverter With No Right Half-Plane Zero and Reduced Common-Mode Leakage Current

In this article, a multioutput-based transformerless hybrid solar inverter (TLHSI) with no right half-plane zero (RHPZ) and reduced common-mode leakage/ground current is presented for photovoltaic (PV) based microgrid applications. In the proposed multioutput TLHSI, two magnetically coupled inductor coils are placed between the input and dc output sides along with a dc-link capacitor to continuously provide the stored energy to the dc load so that the RHPZ is eliminated and, thus, makes it a minimum phase system. Furthermore, a hybrid unipolar sinusoidal pulsewidth modulation technique is established to nullify the high-frequency components of common-mode voltage across the PV to ground stray capacitor. Also, it normalizes both dc and ac loads at the same instant from a single dc input during each operating state of the proposed TLHSI. The shoot-through issue is resolved in the proposed TLHSI, which increases the system reliability. Furthermore, as the deadtime is not required in between the switching pulses, the quality of the inverter output voltage improves. The performance analysis of the proposed TLHSI is compared with the existing topologies. To validate the performance of TLHSI, a scaled down 340 W laboratory prototype is developed.

Single‐stage high reliability doubly grounded nonisolated PV grid‐connected inverter

Nonisolated PV grid-connected inverters are extensively used in renewable generation systems. However, there is a shoot-through issue in traditional voltage-source inverters and common mode leakage current (CMLC) in nonisolated PV inverters. In order to address the aforementioned problems, a single-stage high reliability doubly grounded nonisolated PV grid-connected inverter is presented. The inverter is composed of a buck converter and a buck-boost converter, which operates in the positive and negative half grid periods, respectively. Grounds of the grid and PV array are shorted to eliminate the CMLC. The sinusoidal pulse width modulation (SPWM) is adopted in the proposed inverter. The proposed inverter is a single-stage system in each half grid cycle. There is no CMLC in the proposed inverter. Voltage across all semiconductors is not affected by the intrinsic capacitors of them. In addition, the inverter does not have the shoot-through issue, which increases reliability of the inverter. Only one switch is high frequency operated in each half grid period, so efficiency of the inverter can be improved, which is 98.6%. Experimental results of a 250 W single-stage high reliability doubly grounded nonisolated PV grid-connected inverter confirm the theoretical analysis. The inverter can be used in the PV application with high reliability and no CMLC.

Scalar and Vector Controlled Infinite Level Inverter (ILI) Topology Fed Open-Ended Three-Phase Induction Motor

The design and performance analysis of an open-ended three-phase induction motor, driven by an Infinite Level Inverter (ILI) with its speed control using scalar and direct vector control techniques are presented in this paper. The ILI belongs to an Active-Front-End (AFE) Reduced-Device-Count (RDC) Multi-level Inverter (MLI) topology. The fundamental structure of this inverter topology is a dc-to-dc buck converter followed by an H-bridge. This topology performs a high-quality power conversion without any shoot-through issues and reverse recovery problems. The performance of the proposed topology is validated using a resistive load. The THD of output voltage waveform obtained is 1.2%. Moreover, this topology has exhibited a high degree of dc-source voltage utilization. ILI considerably reduces the switching and conduction losses, since only one switch per phase is operated at high frequency, and other switches are operated at power frequency. The overall efficiency of the inverter is 98%. The speed control performance of the ILI topology using three-phase open-ended induction motor has been further validated through scalar and direct vector control techniques. Results obtained from simulation studies are verified experimentally.

Review of Dual-Buck-Type Single-Phase Grid-Connected Inverters

Shoot-through issue of traditional bridge-type grid-connected inverters (GCIs) imposes a risk to GCIs' reliability and efficiency, so dual-buck-type single-phase GCIs are widely used in the applications requiring high reliability and high efficiency. These types of GCIs are reviewed in this article. As there is no shoot-through issue in the reviewed inverters, reliability of the inverters is improved. The dead time between switches are not required, so quality of the grid current is high. Freewheeling current flows through the independent freewheeling diode instead of the body diode of the switch, so efficiency of the system can be improved. Topologies of the dual-buck-type single-phase GCIs can be divided into two categories, i.e., buck and boost GCIs. Derivation of the reviewed topologies is given. Modulation strategies of the presented GCIs are illustrated. Different dual-buck-type topologies are compared. Finally, applications of the dual-buck-type single-phase GCIs are given.

An Improved Multilevel Inverter for Single-Phase Transformerless PV System

A single-phase Three-Level Split-Inductor Neutral Point Clamped Inverter-Improved (3L-SI-NPCI2) for transformerless photovoltaic (PV) application is proposed in this article. The proposed inverter utilizes two split inductors, which eliminate the shoot-through issue. Therefore, it is more reliable than conventional converters. Not needing dead time, achieving a high efficiency with lower current THD and low leakage current are other advantages of the proposed inverter. The operation principle, dynamic performance, output filter design and impacts of asymmetric filter inductors on leakage current are illustrated in the 3L-SI-NPCI2. The proposed topology is compared to seven existing transformerless topologies by simulation studies and results. Finally, an experimental prototype has been developed to show the benefits of the proposed inverter.

A Novel Impedance-Network-Based Electric Spring

An electric spring (ES) can well maintain the balance between supply and demand to compensate for the intermittent nature of small-scale renewable energy resources (RES). Despite its popularity, the second generation of ES (ES-2) is deemed to have a few practical problems. The most conspicuous one is the requirement of accurate dead-time control is in the ES circuit to avoid bridge shoot-through problem, which is necessitated by the series-connection of multiple voltage sources and/or converters to realize a wide voltage range. This however could cause output voltage waveform distortions. In this study, inspired by the Z-source network structure, we propose a novel ES topology with a specifically designed impedance network, i.e., an impedance-network-based (i.e., a network of passive devices such as inductors and capacitors) ES (IN-ES), which intrinsically has a wide voltage range and is immune to the bridge shoot-through issue (i.e., switch tubes on the same bridge arm of the inverter are turned ON/OFF at the same time). Detailed theoretical derivation, simulation and experimentation are conducted in this study, which verify the unique advantageous features of the proposed IN-ES, demonstrating a wide voltage operation range, undistorted waveforms and safe operations.

A Family of Improved Dual-Buck DC–AC Inverters and Dual-Boost AC–DC Converters

Conventional cascaded dual-buck dc–ac inverters and dual-boost ac–dc converters can achieve high efficiency by using power MOSFETs without causing reverse recovery issues. In addition, these topologies can provide high reliability by eliminating shoot-through issues. As a result, dead-time in the switching signals can be eliminated and higher switching frequencies can be used. However, these topologies have a major and serious drawback of having more inductors in them and a high magnetic volume. This paper presents a family of improved dual-buck dc–ac inverters and dual-boost ac–dc converters with fewer inductors that can effectively mitigate the high magnetic volume and large number of inductors problems without adding any complexity to the control or hardware. The proposed dual-buck inverters (DBI) and dual-boost converters have all the aforementioned benefits of conventional DBIs and dual-boost converters, respectively. In addition, they reduce the magnetic volume, cost, and complexity of the circuit layout through the use of fewer inductors. To validate the feasibility of the proposed topologies, experimental results of the proposed 2-kW cascaded dual-buck dc–ac inverter with 310 $V_{\mathrm {dc}}$ input voltage and $420~V_{\mathrm {rms}}$ output voltage are provided.

A Family of Single-Stage High-Gain Dual-Buck Split-Source Inverters

In this paper, a family of single-phase single-stage high-gain dual-buck split-source inverters (SSIs) is proposed. The proposed inverters have the combine benefits of SSI, dual-buck inverter (DBI), and high-gain dc–dc converters. Similar to the DBI, they provide high reliability by eliminating shoot-through issues, increase switching frequency and efficiency by using power MOSFETs without leading the body diodes to reverse recovery issues, and decrease pulsewidth modulation (PWM) dead-time. In addition, voltage boost operation is achieved in a single stage without using any additional active switch, which is in favor of lower control complexity and lower cost. On the other hand similar to the SSI, buck–boost dc–ac power conversion is realized in a single stage. However, compared to the SSI, the proposed inverters have no shoot-through issues, MOSFETs can be used without reverse recovery issues, dead-time can be minimized, switching frequencies can be increased, and external fast recovery diodes can be used to improve efficiency. In addition, four different high-gain dual-buck SSIs are presented. As an example, the proposed switched-coupled-inductor split-source DBI is analyzed and compared with the other proposed structures. To validate the theoretical analysis, a 300-W experimental prototype is designed and tested at 25–35-V input voltage, $155~V_{\text {peak}}$ output voltages and 50 kHz.

Cascaded Dual-Buck Inverter With Reduced Number of Inductors

A dual-buck inverter (DBI) possesses no shoot-through worries and can boost efficiency by using power mosfet s. The main drawback of a DBI is the use of more inductors than in a traditional full-bridge inverter. This greater number of inductors decreases the power density and increases system cost. In this paper, a modified cascaded full-bridge DBI is proposed. It retains all the advantages of the conventional cascaded full-bridge DBI, possesses no shoot-through issues, and can be operated with no pulse-width-modulation dead-times. It can be implemented with power mosfet without reverse recovery issues of a body diode to boost efficiency. The cascaded modules in the proposed inverter share current limiting inductors. Therefore, the number of inductors and inductor footprints, the complexity of the circuit layout, required inductance, and magnetic volume can all be decreased. To show the advantages of the proposed inverter, detailed theoretical analysis and experimental results are provided.

Design and implementation of single‐phase inverter without transformer for PV applications

For safety purposes, many photovoltaic (PV) systems are designed using galvanic isolation and transformers. The main problem in the existing topologies is that transformers are expensive, heavy and large. Another problem is that at conversion stage, the overall frequency is reduced. The efficiency of a PV inverter which is equipped with a transformer is usually between 91 and 94%. To tackle this issue, a transformerless (TL) PV system is proposed which has high efficiency and is lighter and cheaper. Due to stray capacitance, harmful leakage current will flow to the grid and PV array. H5, HERIC, H6 and oH5 are different types of existing TL inverter, and may be used to solve this problem. Each configuration has its drawbacks like shoot-through issues of switches, high conduction losses, metal-oxide-semiconductor field-effect transistor reverse recovery issues, or to avoid shoot-through fault when dead time requirements and grid voltage are nearly zero. The efficiency of the proposed TL inverter presented in this study is compared with other existing configurations. It shows that the proposed inverter efficiency is better than the conventional hard switching inverters. Moreover, to increase reliability, the inverters do not contain any shoot-through issues.

Single-Phase Input Variable-Speed AC Motor System Based on an Electrolytic Capacitor-Less Single-Stage Boost Three-Phase Inverter

This paper presents a single-phase to three-phase adjustable-speed drive (ASD) system, which consists of a diode rectifier and a single-stage boost inverter without electrolytic capacitors (E-caps). The system has no shoot-through issues and gains high reliability due to the shoot-through zero-state regulation method. By using electrolytic capacitors-less topology, the lifetime can be greatly increased. By properly designing the tapping position of the inductor, the system has a high boost-inversion gain and can ride through grid voltage sags. By using the proposed harmonic injection method, the system can realize high input power factor and small dc-link ripple voltage, simultaneously. Experimental results of the electrolytic capacitors-less single-stage boost inverter (E-caps-less SSBI) based single-phase to three-phase ASD system are obtained to verify the actual performances.

Analysis and Design of Solar Photo voltaic Grid Connected Inverter

This paper presents common mode voltage analysis of single phase grid connected photovoltaic inverter. Many researchers proposed different grid tie inverters for applications like domestic powering, street lighting, water pumping, cooling and heating applications, however traditional grid tie PV inverter uses either a line frequency or a high frequency transformer between the inverter and grid but losses will increase in the network leading to reduced efficiency of the system. In order to increase the efficiency, with reduced size and cost of the system, the effective solution is to remove the isolation transformer. But common mode (CM) ground leakage current due to parasitic capacitance between the PV panels and the ground making the system unreliable. The common mode current reduces the efficiency of power conversion stage, affects the quality of grid current, deteriorate the electric magnetic compatibility and give rise to the safety threats. In order to eliminate the common mode leakage current in Transformerless PV systm two control algorithms of multi-carrier pwm are implemented and compared for performance analysis.The shoot-through issue that is encountered by traditional voltage source inverter is analyzed for enhanced system reliability. These control algorithms are compared for common mode voltage and THD comparisons. The proposed system is designed using MATLAB/SIMULINK software for analysis.

Reliable transformerless battery energy storage systems based on cascade dual‐boost/buck converters

In this study, the cascade dual-boost/buck half-bridge and full-bridge bidirectional ac–dc converters are proposed for grid-tie transformerless battery energy storage systems (BESSs). The proposed converter contains the advantages of the traditional cascade H-bridge (CHB) converter. However, compared with CHB converter, there is no shoot-through issue in the proposed converter, which is more reliable for BESS. In addition, a unified control scheme is proposed for active-power control and individual state-of-charge-balancing control of BESS, which is very modular and easy to implement. At the end, a laboratory BESS is constructed and tested combining a cascade two-unit dual-boost/buck half-bridge converter with nine lead–acid series-connected battery units. Experimental results obtained from the laboratory system verified the feasibility and effectiveness of the proposed BESS and unified control scheme.

High Reliability and Efficiency Single-Phase Transformerless Inverter for Grid-Connected Photovoltaic Systems

This paper presents a high-reliability single-phase transformerless grid-connected inverter that utilizes superjunction MOSFETs to achieve high efficiency for photovoltaic applications. The proposed converter utilizes two split ac-coupled inductors that operate separately for positive and negative half grid cycles. This eliminates the shoot-through issue that is encountered by traditional voltage source inverters, leading to enhanced system reliability. Dead time is not required at both the high-frequency pulsewidth modulation switching commutation and the grid zero-crossing instants, improving the quality of the output ac-current and increasing the converter efficiency. The split structure of the proposed inverter does not lead itself to the reverse-recovery issues for the main power switches and as such superjunction MOSFETs can be utilized without any reliability or efficiency penalties. Since MOSFETs are utilized in the proposed converter high efficiency can be achieved even at light load operations achieving a high California energy commission (CEC) or European union efficiency of the converter system. It also has the ability to operate at higher switching frequencies while maintaining high efficiency. The higher operating frequencies with high efficiency enables reduced cooling requirements and results in system cost savings by shrinking passive components. With two additional ac-side switches conducting the currents during the freewheeling phases, the photovoltaic array is decoupled from the grid. This reduces the high-frequency common-mode voltage leading to minimized ground loop leakage current. The operation principle, common-mode characteristic and design considerations of the proposed transformerless inverter are illustrated. The total losses of the power semiconductor devices of several existing transformerless inverters which utilize MOSFETs as main switches are evaluated and compared. The experimental results with a 5 kW prototype circuit show 99.0% CEC efficiency and 99.3% peak efficiency with a 20 kHz switching frequency. The high reliability and efficiency of the proposed converter makes it very attractive for single-phase transformerless photovoltaic inverter applications.

Derivation, Analysis, and Implementation of a Boost–Buck Converter-Based High-Efficiency PV Inverter

In this paper, a single-phase grid-connected transformerless photovoltaic inverter for residential application is presented. The inverter is derived from a boost cascaded with a buck converter along with a line frequency unfolding circuit. Due to its novel operating modes, high efficiency can be achieved because there is only one switch operating at high frequency at a time, and the converter allows the use of power MOSFET and ultrafast reverse recovery diode. It also features a robust structure because the phase leg does not have a shoot-through issue. This paper begins with theoretical analysis and modeling of this boost-buck converter-based inverter. And the model indicates that small boost inductance will lead to an increase in the resonant pole frequency and a decrease in the peak of Q, which results in easier control and greater stability. Thus, interleaved multiple phases structure is proposed to have small equivalent inductance; meanwhile, the ripple can be decreased, and the inductor size can be reduced as well. A two-phase interleaved inverter is then designed accordingly. Finally, the simulation and experiment results are shown to verify the concept and the tested efficiency under 1-kW power condition is up to 98.5%.

Driver Deadtime Control and Its Impact on System Stability of Synchronous Buck Voltage Regulator

Driver dead-time control is a popular scheme used to prevent the occurrence of the shoot-through issue in a synchronous Buck voltage regulator. As the switching frequency is continually increasing in today's converter design, the deadtime interval is now long enough relative to the switching period to impact the system performance. In addition to its impact on efficiency, driver dead-time also impacts loop gain and system stability, especially under the critical load condition. In this paper, the influence of driver dead time on the synchronous buck converter is investigated in detail. With voltage mode control, the system loop gain will change under different load conditions due to the deadtime impact. The deadtime may cause sub-harmonic current ripple in the voltage regulator with sample-and-hold current mode control, while its impact on the peak current mode control can be ignored. Design equations are provided to avoid this issue. Some analysis data are included and compared to experimental results.