Shared-memory Multiprocessor Computer Research Articles

A softerware monitor for shared‐memory multiprocessor computers

AbstractANIX is a multiprocessor operating system to be used in the backbone Asynchronous Transfer Mode (ATM) switches. In ANIX, memory contention by processes running on different CPUs is managed with a protocol called WWWH (when to sleep, who to sleep, where to sleep, and how to sleep). Tools are needed to test, debug, and tune the system running WWWH. This paper describes the experience and practice in design of SHMON, a performance tool that monitors the dynamic behavior of the running system. Copyright © 2004 John Wiley & Sons, Ltd.

Nonrigid image registration in shared-memory multiprocessor environments with application to brains, breasts, and bees.

One major problem with nonrigid image registration techniques is their high computational cost. Because of this, these methods have found limited application to clinical situations where fast execution is required, e.g., intraoperative imaging. This paper presents a parallel implementation of a nonrigid image registration algorithm. It takes advantage of shared-memory multiprocessor computer architectures using multithreaded programming by partitioning of data and partitioning of tasks, depending on the computational subproblem. For three different biomedical applications (intraoperative brain deformation, contrast-enhanced MR mammography, intersubject brain registration), the scaling behavior of the algorithm is quantitatively analyzed. The method is demonstrated to perform the computation of intra-operative brain deformation in less than a minute using 64 CPUs on a 128-CPU shared-memory supercomputer (SGI Origin 3800). It is shown that its serial component is no more than 2% of the total computation time, allowing a speedup of at least a factor of 50. In most cases, the theoretical limit of the speedup is substantially higher (up to 132-fold in the application examples presented in this paper). The parallel implementation of our algorithm is, therefore, capable of solving nonrigid registration problems with short execution time requirements and may be considered an important step in the application of such techniques to clinically important problems such as the computation of brain deformation during cranial image-guided surgery.

An optimal index reshuffle algorithm for multidimensional arrays and its applications for parallel architectures

Reshuffling elements of a multidimensional array according to an index operation traditionally requires an auxiliary buffer of the same size as the original array. We describe a new in-place algorithm using vacancy tracking cycles with minimum memory access which eliminates the buffer array and the related copy-back, speeding up the reshuffle significantly for large arrays. The algorithm can be parallelized using a multithread approach on shared-memory multiprocessor computers. On distributed-memory multiprocessor computers, the index reshuffle of distributed multidimensional arrays amounts to a remapping of processor domains and is carried out using the in-place local algorithm combined with a global exchange algorithm. Implementation and test results on CRAY T3E and IBM SP indicate the effectiveness of the algorithm.

Simulating the DYNIX operating system parallel programming interface on a UNIX system

This paper presents the implementation of multitasking functions of DYNIX Sequent computers on the UNIX operating system. The Sequent computers are shared memory multiprocessor computers running the DYNIX operating system. These functions support data and function partitioning. They let the user implement subprograms by the processors of a Sequent computer in parallel. The functions can synchronize, lock, and unlock data and program segments. As a result, the simulator allows the users to develop their multitasking programs on a uniprocessor computer such as a SUN workstation, and later port them to a Sequent computer. Further, the simulator adds a level of abstraction on top of UNIX for concurrent programming. The functions of the simulator allow the user to handle the communication and synchronization of the processes in a program at a higher level of abstraction, while concentrating on the design of multitasking algorithms. The simulator is applied to a parallel selection algorithm. © 1998 John Wiley & Sons, Ltd.

Refinement of Herpesvirus B-Capsid Structure on Parallel Supercomputers

Electron cryomicroscopy and icosahedral reconstruction are used to obtain the three-dimensional structure of the 1250-Å-diameter herpesvirus B-capsid. The centers and orientations of particles in focal pairs of 400-kV, spot-scan micrographs are determined and iteratively refined by common-lines-based local and global refinement procedures. We describe the rationale behind choosing shared-memory multiprocessor computers for executing the global refinement, which is the most computationally intensive step in the reconstruction procedure. This refinement has been implemented on three different shared-memory supercomputers. The speedup and efficiency are evaluated by using test data sets with different numbers of particles and processors. Using this parallel refinement program, we refine the herpesvirus B-capsid from 355-particle images to 13-Å resolution. The map shows new structural features and interactions of the protein subunits in the three distinct morphological units: penton, hexon, and triplex of this T = 16 icosahedral particle.

Parallel logic simulation with assignable delays on a vector multiprocessor computer

The author presents a gate level high speed VLSI logic simulation algorithm with an assignable delay that uses bitwise logic operations, together with the segmented waveform relaxation method. Although the proposed technique has some similarity to the compiled code method, it does not generate a compiled code and can handle different delay models, a feature that the conventional compiled code method cannot handle. The proposed technique reduces the memory requirements and computation time by using segmented waveform relaxation, as well as the bitwise logic operations. In addition, the proposed algorithm can be easily implemented on a parallel computer and is structured to take full advantage of parallel processing. Implementation of the algorithm on a shared memory multiprocessor computer using eight processors (ALLIANT FX/8) shows a speedup of over 7 for combinational circuits, and can easily handle tens of thousands of gates.

LINEAR ALGEBRA CALCULATIONS ON A VIRTUAL SHARED MEMORY COMPUTER

We evaluate the impact of the memory hierarchy of virtual shared memory computers on the design of algorithms for linear algebra. On classical shared memory multiprocessor computers, block algorithms are used for efficiency. We study here the potential and the limitations of such approaches on globally addressable distributed memory computers. The BBN TC2000 belongs to this class of computers and will be used to illustrate our discussion.We describe the implementation of Level 3 BLAS and examine the performance of some of the LAPACK routines. The impact of the number of processors with respect to the choice of the variants of classical matrix factorizations (for example, KJI, JKI, JIK for the LU factorization) is discussed. We also study the factorization of sparse matrices based on a multifrontal approach. The ideas introduced for the parallelization of full linear algebra codes are applied to the sparse case. We discuss and illustrate the limitations of this approach in sparse multifrontal factorization.We show that the speed-ups obtained on the BBN TC2000 for the class of methods presented here are comparable to those obtained on more classical shared memory computers, such as the Alliant FX/80, the CRAY-2 and the IBM 3090/VF.

Analysis of processor allocation in multiprogrammed, distributed-memory parallel processing systems

A main objective of scheduling independent jobs composed of multiple sequential tasks in shared-memory and distributed-memory multiprocessor computer systems is the assignment of these tasks to processors in a manner that ensures efficient operation of the system. Achieving this objective requires the analysis of a fundamental tradeoff between maximizing parallel execution, suggesting that the tasks of a job be spread across all system processors, and minimizing synchronization and communication overheads, suggesting that the job's tasks be executed on a single processor. The authors consider a class of scheduling policies that represent the essential aspects of this processor allocation tradeoff, and model the system as a distributed fork-join queueing system. They derive an approximation for the expected job response time, which includes the important effects of various parallel processing overheads (such as task synchronization and communication) induced by the processor allocation policy.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Parallel sparse Cholesky factorization on a shared memory multiprocessor

Parallel implementations of Cholesky factorization for sparse symmetric positive definite matrices are considered on a shared memory multiprocessor computer. Two column-oriented schemes, known as the column-Cholesky algorithm and the fan-in algorithm, along with enhancements of each, are implemented and discussed. High parallel efficiency of the column-Cholesky algorithm and its enhancement is demonstrated for test problems. A detailed investigation of the performance of the fan-in algorithm and its enhancement, the compute-ahead fan-in algorithm, is made to study the effects of overhead associated with the fan-in based schemes.

Concurrent analysis of large structures—I. Algorithms

Parallel structural analysis of framed structures on shared memory multiprocessor computers is presented. Emphasis is directed towards parallelizing each computational step of the solution process. Parallel algorithms are developed to maintain the workload balance throughout the solution process and to assure best concurrent performance and speed-up. A substructuring algorithm is used in order to achieve the workload balance during the solution of the generalized displacements. Concurrency is achieved through the use of the notion of cheap concurrency and the concept of threads. Two strategies for avoiding a racing condition are presented. Minimal storage schemes are introduced to allow for large scale structures to be handled effectively. An accompanying paper demonstrates the performance of the algorithms through solution of several truss and frame problems on an Encore Multimax shared memory multiprocessor computer, for a variable number of processors. The algorithms are particularly suitable for analysis of large structures.

Concurrent analysis of large structures—II. applications

In an accompanying paper, we presented algorithms and procedures for concurrent analysis of framed structures on shared memory multiprocessor computers. Implementation of the algorithms and applications are presented in this paper. The efficiency and versatility of the algorithms are assessed by presenting four examples. Speed-ups and workload balance issues at various steps of structural analysis are considered and discussed. The efficiency of the parallel processing algorithms increases with the size of the structure, thus making them particularly suitable for analysis of large structures such as space stations.

Concurrent Optimization of Large Structures. II: Applications

In a companion paper, we presented algorithms and procedures for concurrent optimization of framed structures on shared memory multiprocessor computers. Implementation of the algorithms and applications are presented in this paper. The efficiency and versatility of the algorithms are assessed by presenting four examples. Speed-ups and work-load-balance issues at various steps of the optimization process are considered and discussed. The efficiency of the parallel-processing algorithms increases with the size of the structure, thus making them particularly suitable for optimization of large structures such as space stations.

Concurrent Optimization of Large Structures. I: Algorithms

Parallel algorithms are presented for optimization of structures on shared-memory multiprocessor computers. Structures subjected to multiple loading cases with limitations on nodal displacements, element stresses, and member sizes are optimized using the optimality-criteria approach in a concurrent-processing environment. Emphasis is directed toward parallelizing each computational step of the solution process. Parallel algorithms are developed to assure the best concurrent performance and speed-up within each step. A substructuring algorithm is used to achieve the best work-load balance during the solution of the generalized displacements. Concurrency is achieved through the use of the notion of cheap concurrency and the concept of threads. (A companion paper demonstrates the efficiency of the parallel algorithms through optimization of several truss and frame problems on an Encore Multimax shared-memory computer for a variable number of processors.) The algorithms are particularly suitable for optimization of large structures such as space stations.

Portable tools for Fortran parallel programming

AbstractThis paper presents a survey of some of the tools, techniques, and constructs for the development of portable, multitasked Fortran programs. The study mainly focuses on existing software tools that implement different approaches to achieving portability of multitasked Fortran programs for local and shared memory multiprocessor computers. However, some proposed approaches are also included. It appears that while each approach enjoys some advantages and suffers some disadvantages, at present, the development and use of portable multitasking tools is in its infancy, and thus no one system is clearly superior. Indeed, we expect that, for the foreseeable future, these and perhaps other techniques will all be actively pursued.

A parallel computational model for the finite element method on a memory-sharing multiprocessor computer

This paper describes a new computing model for finite element analysis in a multiprocessor environment. The model is based upon the application of successive projections of the finite element space onto its supspaces. A problem is effectively decomposed into a collection of related subproblems which can be distributed asynchronously among any number of multiprocessors. Critical issues of parallel generation of coefficients, storage allocation, memory interference, interprocess communication and load balancing are dealt with and optimized in the context of shared memory multiprocessor computers. When implemented on test problems with 10 4 or more elements, the algorithms provide almost perfect speedup using from 2 to 24 processors at a time.

Parallel algorithms for the finite element method

Existing finite element methods, algorithms and application programs have been developed in the milieu of the serial or single processor computer. Substantial efforts are currently being made to modify their computational aspects in order to take advantage of the power inherent in the newer generations of parallel multiprocessor computers. The parallelizing techniques being explored tend to be derived from or are closely related to serial concepts. Parallelism is difficult to achieve from this direction. The present work develops and implements a new class of parallel algorithms for the finite element method based upon the use of projections on finite-dimensional spaces. Projections provide a formal and general mechanism for decomposing or partitioning a problem into a col;ection of smaller related problems which can be treated in parallel. These algorithms can be programmed in a wholly asynchronous mode and have been implemented and studied on a shared memory multiprocessor computer with up to 24 processors. On large test problems they have been shown to produce almost perfect speedup and to be extremely efficient.

Solution of sparse positive definite systems on a shared-memory multiprocessor

Algorithms and software for solving sparse symmetric positive definite systems on serial computers have reached a high state of development. In this paper, we present algorithms for performing sparse Cholesky factorization and sparse triangular solutions on a shared-memory multiprocessor computer, along with some numerical experiments demonstrating their performance on a Sequent Balance 8000 system.