Seven-level Output Voltage Research Articles

Phase Shift APOD and POD Control Technique in Multi-Level Inverters to Mitigate Total Harmonic Distortion

Multi-level inverters are widely employed to generate new energy because of their huge capacity and benefits in sound control performance. One of the critical areas of study for multi-level inverters is control strategy research. In this study, the control strategy for a multi-level inverter—which is frequently employed in HVDC and FACTS systems—is designed. An asymmetrical D.C. voltage source is supplied to create the appropriate output voltage waveform with fewer total harmonic distortions (THDs) at the output voltage and current waveforms. In this work, the pulse width modulation techniques of POD (phase opposition disposition) and APOD (alternative phase opposition disposition) MC PWM are applied to a multi-level inverter to generate the seven-level output voltage waveform. This study presents an enhanced variable carrier frequency APOD control approach that can successfully lower the overall harmonic distortion rate. The design and completion of the phase-shifting POD and APOD control strategies are followed by an analysis and comparison of the THD situation under various switching frequencies and a simulation and verification of the control strategy using MATLAB simulation. The TI DSP-based control approach has been programmed. The APOD technique increases the output voltage’s THD to 18.27%, while the output current waveform’s THD is reduced to 15.67% by utilizing the APOD PWM technique. Using the POD PWM approach increases the total harmonic distortion (THD) of the voltage waveform by 18.06% and the output current waveform’s THD by 15.45%.

An open circuit fault-tolerant seven-level inverter with symmetric sources and reduced switch count

In this study, a new structure of symmetrical multilevel inverter is proposed. The proposed structure offers fewer controlled switches, power diodes, DC sources voltage stress across switches and losses compared with classical and a few recently proposed topologies in the literature. This paper presents a fault-tolerant (FT) seven-level inverter to provide uninterrupted supply to the connected load under open circuit fault in any single switch of the presented configuration. This configuration uses only six unidirectional and one bidirectional switch for any switch fault-tolerant operation. The phase opposition disposition sinusoidal pulse width modulation (POD-SPWM) and phase disposition sinusoidal pulse-width modulation (PD-SPWM) scheme are used for proper DC link utilisation in seven-level output voltage. The proposed symmetrical 7-level topology requires fewer power components and offers reduced voltage total harmonic distortion (THD) compared to other multi-level inverter (MLI) topologies. This MLI is investigated in MATLAB and validated using hardware in the loop platform of OPAL-RT. The obtained results are presented to demonstrate the successful FT operation under any single switch open circuit fault.

An Effective Transformerless PUC7-Based Dynamic Voltage Restorer Using Model Predictive Control

This paper investigates the performance of a seven-level Packed U Cell (PUC7) inverter-based transformerless Dynamic Voltage Restorer (DVR) topology under short-time voltage variations (voltage sags and swells). Unlike the existing multilevel inverter (MLI)-based DVR solutions, the proposed structure requires only one DC voltage source (suitable for PV-based DVR systems), one capacitor, and six switching devices to generate seven-level output voltage. Moreover, the studied topology is characterized by reduced cost and size due to the elimination of the injection transformer. The PUC7 inverter is controlled using a multi-objective (filtering current, compensating voltage, and PUC capacitor voltage controls) Model Predictive Control (MPC) strategy. Simulation and implementation tests are carried out to demonstrate the high performance of the proposed DVR at steady-state and during transient conditions, while keeping the load voltage unaffected by the disturbances in the grid voltage.

A New Seven-Level Transformer-Less Grid-Tied Inverter With Leakage Current Limitation and Voltage Boosting Feature

This article presents a new transformer-less grid inverter. The proposed topology can produce seven-level output voltage waveform using six power electronic switches and two power diodes. In addition, the recommended topology can limit the amplitude of leakage current in the photovoltaic (PV) systems, which is the major problem in grid-connected PV applications. The proposed inverted has some other benefits, such as voltage boosting capability, reactive power supporting, controlling both active and reactive power flows, reduced output filter size and lower total harmonic distortion of the injected current to the grid. Finally, the accurate performance of the recommended grid-tied structure is proved by the 620–1000 W laboratory prototype.

Harmonics Minimization in PUC Type Solar Multilevel Converter with Multicarrier Switching Schemes

This paper presents the power quality investigation of a seven-level three-phase packed U-cell (PUC) converter with multicarrier switching schemes. This system is grid-connected, and each phase has two solar PV arrays of different voltages. Various modulation schemes are available for switching the multilevel converter, and level-shifted multicarrier pulse width modulation is widely used for easy implementation. A new modified carrier-based modulation technique is introduced for solar PV array fed PUC inverter. The main aim is to reduce the harmonic content in the seven-level output voltage. It also increases the magnitude of the fundamental component of the converter voltage. The comparison of the presented technique shows its advantages over other existing modulation schemes. Closed-loop control is implemented with the inclusion of a modified switching scheme for switching the three-phase PUC converter. The proportional resonant controller provides excellent dynamic performance to feed the power into the grid. Modeling and simulation of the system are done in MATLAB/Simulink. Furthermore, obtained simulation results verify the effectivity of the switching scheme towards minimizing total harmonic distortion. The overall system is validated in the real-time simulator for steady-state and dynamic environmental conditions.

NPC Seven-Level Single-Phase Inverter with DC-Link Voltage Balancing, Input Voltage Boosting, and AC Power Decoupling

This paper presents a novel concept of the DC-AC system with the input voltage boost ability, seven-level output voltage modulation, and the input AC current reduction at the double frequency of the output voltage. The system integrates the NPC full-bridge inverter which is composed of four-level legs and an active input voltage balancer (AIVB). The DC-link is composed of three capacitors connected in a series. The source of the energy is connected directly to the middle capacitor while the upper and lower capacitors of the DC-link are charged by the AIVB. The operation of the AIVB leads to balancing of the DC-link voltage and a three-fold boosting of the input voltage. The AIVB utilizes a novel switched-capacitor (SC) topology and can be designed as a low-volume quasi-magneticless converter with a simple open-loop control. One of the proposed methods of the control of the AIVB allows for a double frequency reduction in the input current. The application of the AIVB allows for the use of a seven-level NPC full-bridge (FB) inverter with a simple classic carrier-based PWM which is not applicable in the typical DC-link configurations. This paper presents the converter’s concept, its operation, control methods, and the results of simulations and experiments.

Aquila Optimization Based Harmonic Elimination in a Modified H-Bridge Inverter

Multilevel inverters (MLIs) are capable of producing high-quality output voltage and handling large amounts of power. This reduces the size of the filter while also simplifying the circuitry. As a result, they have a wide range of applications in industries, particularly in smart grids. The input voltage boosting feature is required to use the MLI with renewable energy. Moreover, many components are required to get higher output voltage levels that add weight and cost to the circuit. Numerous MLI topologies have been identified to minimize the losses, device count, and device ratings. A seven-level modified H-bridge inverter with a reduced component count, and reduced THD is presented in this paper. Two DC sources with six IGBTs have been used to generate a seven-level output voltage, and the Aquila Optimizer (AO) has been implemented to get the regulated output. MATLAB/Simulink environment has been used for designing the simulation model. Furthermore, the simulation result has been validated in the laboratory on a hardware setup using the DSP-TMS320F28335 Launchpad. With the reduced number of switching devices as well as the dc supply, the size of the inverter is compacted and becomes more economical.

A Diamond Shaped Multilevel Inverter With Dual Mode of Operation

This study presents a novel multilevel inverter structure that can operate in both switched capacitor and asymmetric DC source modes. In the first mode, it can produce seven-level output voltage employing two switched capacitors and one single DC supply. The five-level output voltage is produced while operating the second mode. The voltage ratio between the input and output voltage for the capacitor mode is 1:3 (triple voltage gain). During the first mode, the capacitor of the inverter is self -balanced whereas the inverter can produce higher voltage output in the DC source mode. The proposed inverter reduces the total standing voltage in both modes of operations as it can generate the output voltage without requiring any additional H-bridge circuit. The feasibility and predominate features of the proposed inverter have been established by comparing with existing topologies in terms of power components count. Results obtained from this study are validated using simulation employing sinusoidal pulse width modulation (SPWM). A hardware prototype has also been developed for further validation.

A new boost switched capacitor seven‐level grid‐tied inverter

In this paper, a new switched capacitor-based multilevel inverter structure is suggested. The proposed topology can generate seven-level output voltage waveform using ten power electronic switches and two floating capacitors. This structure has the ability to boost the input DC voltage, up to 1.5 times. Although this topology can generate an output waveform with large number of levels, it does not increase the voltage stress on the power electronic switches. There is no need for capacitor voltage balancing in this structure since the capacitors are balanced through charging and discharging modes of operation. In addition, the suggested switched capacitor inverter reduces the number of input dc power supplies and uses a single dc source such as a photovoltaic (PV) panel. Since the proposed inverter is an neutral point clamp based multilevel inverter topology, the leakage current is minimized and as a result the overall efficiency of the proposed system is increased. The operation modes and steady-state analysis of the proposed structure are explained in detail. In order to validate the feasibility of the proposed topology, some experimental results are presented in the grid connected mode of operation.

Generation of energy from Solar and its protections

In this article, a seven-level inverter powered by solar has been proposed to achieve a sinusoidal output voltage with high efficiency and enhanced power quality. This system consists of active inverter and flipped condenser clamping. It gives output voltage level of 2/3. By connecting the switched condenser branch in the front or back end series to the inverter output a seven-level output voltage wave shape can be obtained with ample non-work switching states to match the voltage of switching condensers. The consequence of the proposed method is validated using MATLAB SIMULINK for simulation. Comparing with conventional seven-level inverter topology, the proposed design used a minimal number of switches using a basic modulation process. The demand for electricity that is so high in India might be a key driver for the use of renewable power as an option for energy requirements. To satisfy this need, this article introduces a solar smart flower layout and then modeled using the resources provided in the solid function system. And use a set Photovoltaic panels harvest additional power mostly during 12 pm to 2:00 Pm in Nigeria which resulted in less renewable energy. Consequently, there is a need to increase the energy consumption of PV solar panel by developing a solar tracker cannot be overlooked. Photovoltaic cells must be aligned with the sun in order to just get optimum energy.The microcontroller is being used to power the motor dependent on information gathered from the LDRs. The findings of this research have clearly demonstrated that the monitoring solar panel generates more electricity compared to a conventional panel. The location of solar panel including voltage was going to monitor by using IoT. Light Dependent Resistors LDRs are being used to detect the strength of lighting and thus the PV solar panel is appropriately addressed to control maximum energy. The system uses motors to regulate the amount of the solar panel. The microcontroller is being used to power the motor centered on signals obtained from the LDRs. The outcome of this work has demonstrated clearly that the monitoring solar panel generates more power compared to a conventional panel. The location of solar panel and volts was going to monitor through using IoT.

Solar powered highly efficient Seven-level inverter with switched capacitors

In this article, a seven-level inverter powered by solar has been proposed to achieve a sinusoidal output voltage with high efficiency and enhanced power quality. This system consists of active inverter and flipped condenser clamping. It gives output voltage level of 2/3. By connecting the switched condenser branch in the front or back end series to the inverter output a seven-level output voltage wave shape can be obtained with ample non-work switching states to match the voltage of switching condensers. The consequence of the proposed method is validated using MATLAB SIMULINK for simulation. Comparing with conventional seven-level inverter topology, the proposed design used a minimal number of switches using a basic modulation process.

Artificial Intelligence-Based Weighting Factor Autotuning for Model Predictive Control of Grid-Tied Packed U-Cell Inverter

The tuning of weighting factor has been considered as the most challenging task in the implementation of multi-objective model predictive control (MPC) techniques. Thus, this paper proposes an artificial intelligence (AI)-based weighting factor autotuning in the design of a finite control set MPC (FCS-MPC) applied to a grid-tied seven-level packed U-cell (PUC7) multilevel inverter (MLI). The studied topology is capable of producing a seven-level output voltage waveform and inject sinusoidal current to the grid with high power quality while using a reduced number of components. The proposed cost function optimization algorithm ensures auto-adjustment of the weighting factor to guarantee low injected grid current total harmonic distortion (THD) at different power ratings while balancing the capacitor voltage. The optimal weighting factor value is selected at each sampling time to guarantee a stable operation of the PUC inverter with high power quality. The weighting factor selection is performed using an artificial neural network (ANN) based on the measured injected grid current. Simulation and experimental results are presented to show the high performance of the proposed strategy in handling multi-objective control problems.

Single-Phase Two-Stage Seven-Level Power Conditioner for Photovoltaic Power Generation System

This paper presents a new power conditioner with the inherent benefits of boosting, generation of seven-level output voltage with minimum leakage current in a grid-connected photovoltaic (PV) power generation system. The proposed power conditioner is an upgrade of a front-end multioutput dc–dc boost converter and an asymmetrical seven-level inverter. A high-frequency transformer (HFT) employed in front-end converter produces balanced dc-link voltages to generate the seven-level output voltage. The leakage current caused by the parasitic capacitance of the PV panel is minimized by providing a common-mode conducting path to the inverter. This results in a reduction of the leakage current well below the VDE0126-1-1 grid standards. Furthermore, the proposed configuration utilizes a minimum number of devices for every level generation, which reduces the control complexity and also improves the system efficiency. The dynamic performance of the system is tested for intermittent changes in the PV characteristics for grid-connected operation. The proposed power conditioner is simulated using MATLAB software, and a laboratory prototype of 750 W is developed to validate its feasibility. Finally, a comparison is made with other recently proposed seven-level inverters to highlight the benefits of this power conditioner over others.

Analysis of Logic Gates for Generation of Switching Sequence in Symmetric and Asymmetric Reduced Switch Multilevel Inverter

Analysis of logic gates for the switching sequence operation of reduced switch multilevel inverter (MLI) is introduced in this paper. Two variants of MLI with reduced switches are considered for the analysis of the logic gates to obtain proper output voltage level. One MLI is with the symmetrical voltage, and the other is with the asymmetrical voltage. The analysis of the proposed logical operation is presented through the single-phase seven-level output voltage for both symmetrical and asymmetrical inverters. Input pulse pattern for the operation of the logic gates are chosen from the multi carrier pulse width modulation (PWM) techniques as phase disposition (PD), phase opposition disposition (POD), and alternate POD (APOD). The analysis for the generation of the required pulse pattern to operate the switches in MLI is presented as logical equations. The simulation work is performed and evaluated with the MATLAB/Simulink. The real-time simulation is performed for the required pulse pattern and generated with the support of dSPACE 1104. The THD comparative analysis is analyzed with a modulation index and various PWM methods.

Reconfiguration of a Multilevel Inverter with Trapezoidal Pulse Width Modulation

This paper presents different multi-carrier unipolar trapezoidal pulse width modulation strategies for a reduced switch asymmetrical multilevel inverter. The different strategies are phase disposition, alternative phase opposition and disposition, and carrier overlapping and variable frequency that involve triangular waves as carriers with a unipolar trapezoidal wave as a reference. The reduced switch, asymmetrical multilevel inverter operation was examined for generating the seven-level output voltage using Matlab/Simulink 2009b and the results were verified with a real-time laboratory-based experimental setup using a field-programmable gate array. Different parameter analyses, such as total harmonic distortion, fundamental root mean square voltage, and distortion factor, were analyzed with different modulation indices to investigate the performance of the selected topology. Unipolar trapezoidal pulse width modulation provides a higher root mean square voltage value.

New Switched-Dual-Source Multilevel Inverter for Symmetrical and Asymmetrical Operation

The increasing integration of large solar PV and wind farms into the power grid has fueled, over the past two decades, growing demands for high-power, high-voltage, utility-scale inverters. Multilevel inverters have emerged as the industry’s choice for megawatt-range inverters because of their reduced voltage stress, capability for generating an almost-sinusoidal voltage, built-in redundancy and other benefits. This paper presents a novel switched-source multilevel inverter (SS MLI) architecture. This new inverter shows superior capabilities when compared to existing topologies. It has reduced voltage stress on the semiconductor, uses fewer switches (i.e., reduced size/weight/cost) and exhibits increased efficiency. The proposed SS MLI is comprised of two voltage sources ( V 1 , V 2 ) and six switches. It is capable of generating five-level output voltage in symmetric mode (i.e., V 1 = V 2 ) and seven-level output voltage in asymmetric mode (i.e., V 1 ≠ V 2 ). We present simulations results (using MATLAB®/Simulink®) for five- and seven-level output voltages, and they strongly support the validity of the proposed inverter. These positive results are further supported experimentally using a laboratory prototype.

Symmetric switched diode multilevel inverter structure with minimised switch count

A new symmetric switched diode multilevel inverter with reduced power switches for medium-voltage applications is presented. The proposed topology consists of several double-source units to produce the synthesised stepped output voltage waveform with reduced total harmonic distortion. The required number of insulated bipolar junction transistors, power diode, and total power losses are compared between conventional and recent topologies. The seven-level output voltage is simulated by using simulation software MATLAB/Simulink, and hardware prototype model has been developed to prove the superiority of the proposed topology. Finally, the advantage of the proposed topology is highlighted, and the topology for high-voltage applications is suggested.

Elimination of Harmonics in Photovoltaic Seven-level Inverter with Newton-raphson Optimization

Abstract This paper describes a strategy to optimize the switching angle of a modified H-bridge single-phase seven-level inverter for stand-alone photovoltaic (PV) system. The inverter comprises a conventional H- bridge inverter and two bidirectional switches. It can generate seven-level output voltage level, namely +Vdc, +2/3Vdc, +1/3Vdc, 0, -1/3Vdc, -2/3Vdc and -Vdc. Optimized Harmonic Elimination Stepped Waveform (OHESW) technique was employed to improve the output waveform quality. Newton- Raphson method is engaged to solve the transcendental equations from OHESW technique which produces all possible solutions with any random initial guess. Among which sets, the one producing the least output-voltage THD was chosen. Computation resulting from the optimized switching angle was simulated. A small-scale laboratory prototype was built and tested. Its results indicated the proposed method's effectiveness and the application feasibility of the fundamental frequency switching.