Semiconductor Field Effect Transistor Research Articles

Complementary Circuits with WSe2/Organic Semiconductor Heterostructure Field-Effect Transistors.

A device architecture based on heterostructure WSe2/organic semiconductor field-effect transistors (FETs) is demonstrated in which ambipolar conduction is virtually eliminated, resulting in essentially unipolar FETs realized from an ambipolar semiconductor. For p-channel FETs, an electron-accepting organic semiconductor such as hexadecafluorocopperphthalocyanine (F16CuPc) is used to form a heterolayer on top of WSe2 to effectively trap any undesirable electron currents. For n-channel FETs, a hole-accepting organic semiconductor such as pentacene is used to reduce the hole currents without affecting the electron currents. Off-currents are reduced in FETs with heterolayers compared to WSe2 FETs without organic heterolayers, which will decrease static power dissipation in complementary circuits. In all FETs reported in this work, the organic heterolayers cover only part of the channel, which results in more effective trapping of the carrier type that must be reduced. This device design approach can be effectively combined with p-type doping and contact metal engineering to improve WSe2 based FETs and circuits. Complementary inverters realized with such heterostructured FETs exhibit excellent transfer characteristics. This design approach is also applicable to other ambipolar semiconductors besides WSe2.

Topological Insulator Bismuth-Antimony Alloy Contact for Two-Dimensional Semiconductor Based Electronics

Two-dimensional (2D) semiconductors are considered as the most promising candidate for channel materials in next-generation electronic devices owing to their atomically thin nature [1]. In order to minimize the overall chip size, it is imperative to reduce both the channel length and the contact area of the devices. However, the reduction in contact area inevitably leads to an increase in the contact resistance (RC), and recent studies have been devoted to solving this problem. In particular, the significant achievements in reducing the RC to near quantum limits in 2D semiconductor based field-effect transistors (FET) were reported using semi-metal as bismuth (Bi) and antimony (Sb) as contact metals [2,3]. In spite of these advancements, research on the scaling-down of the metal contact with the exploration of alternative contact materials to shrink overall chip footprint remains limited.To overcome these limitations, we propose the topological insulator (TI) as a contact metal for 2D-based electronics. TI is known to enable electron transport without backscattering at the surfaces owing to its unique surface band structures [4]. Result from these properties, the RC increase with a contact area reduction is lower compared to conventional metals, indicating high potential for TIs as an interconnector in extreme scaling regimes [5]. Additionally, the Dirac cone band structure on TIs surface [6] is expected to suppress metal-induced gap states (MIGS) similar to semi-metal contacts [2-3].In this study, a 2D semiconductor FETs was fabricated with Bi-Sb alloy as the electrode material. Bi-Sb alloys are known to exhibit the TI phase with Sb composition ranging from 7% to 22% [7]. A 20 nm thick Ti-phase Bi-Sb alloy was synthesized using molecular beam epitaxy (MBE) on exfoliated MoS2 flakes with pre-patterned contact areas using a standard e-beam lithography process. The device was then completed by capping the TI contacts with gold. A systematic investigation of the electrical properties of the device showed that the on-current with the contact of the Ti-phase Bi-Sb alloy is enhanced compared to the bismuth-only configuration. Through this research, we aim to improve the contact characteristic of 2D based electronics in nano-scale regimes, and provide insights that can contribute to the development and commercialization of next-generation electronic devices.

Terahertz-frequency plasmonic-crystal instability in field-effect transistors with asymmetric gate arrays

We present a theory for plasmonic crystal instability in a semiconductor field-effect transistor with a dual grating gate array, designed with strong asymmetry in the elementary cell of this “crystal”. We demonstrate that, under the action of a dc current bias, the Bloch plasma waves in the plasmonic crystal formed in this transistor develop the Dyakonov–Shur instability. By calculating the energy spectrum and instability increments/decrements—which govern the growth/decay of excitations within the plasmonic crystal—we analyze the dependence of the latter on the electron drift velocity and the extent of the structural asymmetry. In contrast with the corresponding problem for gate arrays with symmetric unit cells, the presence of finite plasma instability increments across the entire Brillouin zone is established. This important difference points to the possibility of exciting sustained, radiating, non-linear electron plasma oscillations in the instability endpoint of the asymmetric array. These structures should be readily implementable in common semiconductor heterostructures, using standard nanofabrication techniques, enabling operation at room temperature. Long-range coherence of the unstable plasma oscillations, generated in the elementary cells of the crystal, should dramatically increase the radiated THz electromagnetic power, making this approach a promising pathway to the generation of THz signals.

Synthesis, Structures and Properties of Trioxa[9]circulene and Diepoxycyclononatrinaphthalene.

This article presents trioxa[9]circulene (3) as a novel member of hetero[n]circulenes. Its synthesis began with the synthesis of dimethoxydioxa[8]helicene (5) and used dimethoxydiepoxycyclononatrinaphthalene (4) as a key intermediate, despite the condensation reaction predominantly yielding a 1,4-addition byproduct. The structures and properties of 3-5 were extensively investigated using experimental and computational methods. Analysis of the crystal structures reveal elongation of the internal C-C bonds in the nine-membered ring of 3 compared to 4 and 5. Computational studies demonstrate the remarkable flexibility of trioxa[9]circulene's saddle-shaped polycyclic framework, while the other two compounds are rigid with large racemization barriers. Optically pure forms of 4 and 5 exhibit absorption and luminescence dissymmetry factors on the order of 10-2, with smaller values observed for compound 4. In the crystal structures, molecules of 3 stack to form columns with remarkable π-π overlap, and the π-π interactions of 4 exhibit short intermolecular C-to-C contacts. Consequently, the solution-processed film of 4 functioned as a p-type organic semiconductor in field effect transistors.

Synthesis, Structures and Properties of Trioxa[9]circulene and Diepoxycyclononatrinaphthalene

AbstractThis article presents trioxa[9]circulene (3) as a novel member of hetero[n]circulenes. Its synthesis began with the synthesis of dimethoxydioxa[8]helicene (5) and used dimethoxydiepoxycyclononatrinaphthalene (4) as a key intermediate, despite the condensation reaction predominantly yielding a 1,4‐addition byproduct. The structures and properties of 3–5 were extensively investigated using experimental and computational methods. Analysis of the crystal structures reveal elongation of the internal C−C bonds in the nine‐membered ring of 3 compared to 4 and 5. Computational studies demonstrate the remarkable flexibility of trioxa[9]circulene's saddle‐shaped polycyclic framework, while the other two compounds are rigid with large racemization barriers. Optically pure forms of 4 and 5 exhibit absorption and luminescence dissymmetry factors on the order of 10−2, with smaller values observed for compound 4. In the crystal structures, molecules of 3 stack to form columns with remarkable π–π overlap, and the π–π interactions of 4 exhibit short intermolecular C‐to‐C contacts. Consequently, the solution‐processed film of 4 functioned as a p‐type organic semiconductor in field effect transistors.

Mitigating reverse recovery power losses in MOSFET switching cell using extra Schottky diodes—Application to voltage source inverter

This article introduces a comparative study of the losses in Voltage Source Inverter (VSI) based on Metal-Oxide- Semiconductor Field-Effect Transistors (MOSFETs) depending on whether or not the latter are associated with antiparallel diodes. These diodes are optional because MOSFETs have an intrinsic diode capable of conducting reverse currents when their channel is in OFF state. However, it induces additional reverse recovery losses and damaging voltage overshoots. This undesired circumstance occurs during the mandatory switching cell dead-time and is accurately modelled and assessed in this study. Conversely, Schottky diodes feature almost zero reverse recovery losses. Hence, combining each MOSFET with an antiparallel Schottky diode may reduce the converter overall losses. To assess this strategy, an analytical model of the charge stored within the body diode is developed and then compared to experiments using the Double Pulse Test (DPT). It reveals accurate and well suited because it requires only two constant macro parameters which permits to forecast the reverse recovery losses over a wide range of operating conditions, namely switched current, current slope and dead time duration. The selected model is applied in the case where a Schottky diode is placed antiparallel to the MOSFET. It then appears clearly that the interest of such a combination depends on the static characteristics of both the MOSFET and the Schottky diode. This output is a noteworthy point for power electronics designers. Finally, the developed model is applied in the standard use case of the Voltage Source Inverter (VSI). The results reveal the advantage of the suggested model in this use case because the current evolves significantly over time. The outcome of this VSI analysis shows that a significant recovery losses decrease is achieved with good sizing fit between the MOSFET transistor and the additional Schottky diode.

A novel method to reduce heat in semiconductor field-effect transistors

A novel method to reduce heat in semiconductor field-effect transistors

Two-dimensional van der Waals ferroelectric field-effect transistors toward nonvolatile memory and neuromorphic computing

With the gradual decline in Moore's law, traditional silicon-based technologies have encountered numerous challenges and limitations, prompting researchers to seek solutions. Two-dimensional (2D) van der Waals (vdWs) ferroelectric (Fe) field-effect transistors (FETs) (2D vdWs FeFETs) are devices that integrate emerging 2D vdWs ferroelectric materials into the transistor structures. In comparison with traditional complementary metal oxide semiconductor FETs (COMSFETs), they exhibit superior performance, including lower power consumption, higher switching speed, and improved stability. The vdWs FeFETs are anticipated to surpass the limits imposed by Moore's law, offering increased possibilities and opportunities for research and application in the field of nanoelectronics, particularly in nonvolatile memory (NVM) and neuromorphic computing (NMC). In this review, we summarize the recent research progress of vdWs FeFETs and elucidate their development origin, basic structure, and working mechanism. Furthermore, we explore the application of vdWs FeFETs in NVM, NMC, and large-scale arrays. Finally, we highlight the prominent challenges and future directions in this field.

High-throughput methodology for the realization of high-entropy sub-nm equivalent-oxide-thickness high-dielectric-constant Ba(Ti,Zr,Ta,Hf,Mo)O3 film-based metal-oxide-semiconductor-related devices

This paper reports the use of a high-throughput sputtering technique for the fabrication of high-entropy high-dielectric-constant (high-k) Ba(Ti,Zr,Ta,Hf,Mo)O3 film libraries on Si substrates and sub-nm equivalent-oxide-thickness (EOT) metal−oxide−semiconductor (MOS) devices and metal−oxide−semiconductor field-effect transistors (MOSFETs). The elemental variations and amorphous microstructures are characterized using high-throughput X-ray fluorescence (XRF) and X-ray diffraction, respectively. The film library was patterned into 100 MOS configurations and the films with (Ba + Ti) = 0.41−0.47 at.%, (Mo + Zr) = 0.28−0.34 at.%, and (Ta + Hf) = 0.23−0.3 at.% exhibited favorably high k (325−374) and low tan δ (0.01−0.08) values with an impressive EOT ≈ 0.8−0.94 nm. The resulting MOSFETs after the rapid thermal annealing (RTA) exhibited excellent characteristics: an on/off current ratio of 8 × 106, saturated field-effect mobility of 138.4 cm2 V−1 s−1, a threshold voltage (VT) of 0.03 V, a subthreshold swing of 0.062 V⋅dec−1, and low interfacial defects of approximately 5.6 × 1010 eV cm−2. Small ΔVT and negligible changes in the maximum drain current were observed for the MOSFETs under various positive and negative gate-bias stress conditions before and after the RTA. Our devices outperformed various reported transistors, indicating the potential of the Ba(Ti,Zr,Ta,Hf,Mo)O3 films for use in a gate-first process for advanced gate stack-related devices.

Approaching Ohmic Contacts for Ideal Monolayer MoS2 Transistors Through Sulfur-Vacancy Engineering.

Field-effect transistors (FETs) made of monolayer 2D semiconductors (e.g., MoS2 ) are among the basis of the future modern wafer chip industry. However, unusually high contact resistances at the metal-semiconductor interfaces have seriously limited the improvement of monolayer 2D semiconductor FETs so far. Here, a high-scale processable strategy is reported to achieve ohmic contact between the metal and monolayer MoS2 with a large number of sulfur vacancies (SVs) by using simple sulfur-vacancy engineering. Due to the successful doping of the contact regions by introducing SVs, the contact resistance of monolayer MoS2 FET is as low as 1.7 kΩ·µm. This low contact resistance enables high-performance MoS2 FETs with ultrahigh carrier mobility of 153 cm2 V-1 s-1 , a large on/off ratio of 4 × 109 , and high saturation current of 342 µA µm-1 . With the comprehensive investigation of different SV concentrations by adjusting the plasma duration, it is also demonstrated that the SV-increased electron doping, with its resulting reduced Schottky barrier, is the dominant factor driving enhanced electrical performance. The work provides a simple method to promote the development of industrialized atomically thin integrated circuits.

Radiation exposure in cone beam CT measured using a MOSFET and RPLGD dosimeter and Monte Carlo simulation in phantom.

Due to the wide application of the cone beam computed tomography (CBCT) in clinical practice, it is important to assess radiation dose of CBCT more accurately and efficiently in different clinical applications. This study aims to calculate effective and absorbed doses in CBCT measured in an anthropomorphic phantom using computer-based Monte Carlo (PCXMC) software, and to conduct comparative evaluations of MOSFET (metal- oxide- semiconductor field-effect transistor) and radiophotoluminescence glass dosimeters (RPLGD). Effective and absorbed organ doses are compared with those obtained using MOSFET and RPLGD dosimetry in an anthropomorphic phantom given the same exposure settings. Effective and absorbed organ doses from CBCT during scout and main projections are calculated using PCXMC and PCXMCRotation software, respectively. The mean effective dose from CBCT calculated using PCXMC software is 233.8μSv, while the doses calculated using dosimetry (MOSFET and RPLGD) are 266.67μSv and 268.78μSv, respectively. The X-ray source variation is 0.79%. The prescription limits based on the Friedman test for MOSFET and RPLGD pre-points (i.e., in an analytical analysis of diagnostic names in CBCT) are not statistically significant. The calculated correlation coefficient between MOSFET- and RPLGD-derived absorbed dose values with respect to a field of view CBCT parameter of 17×13.5 mm is r = 0.8623. The study demonstrates that the PCXMC software may be used as an alternative to MOSFET and RPLGD dosimetry for effective and absorbed organ dose estimation in CBCT conducted with a large FOV in an anthropomorphic phantom.

Low-frequency noise in quasi-ballistic monolithic Al–Ge–Al nanowire field effect transistors

In this work, Al2O3-passivated, monolithic, and crystalline Al–Ge–Al heterostructure nanowire field effect transistors (FETs) with Ge channel lengths ranging from 18 to 826 nm are analyzed from a low-frequency noise perspective. 1/f and random telegraph noise (RTN) are analyzed in an accumulation mode, where the hole channel is formed by applying a back-gate potential VG. The normalized power spectral density of drain current fluctuations of 1/f noise (SID/ID2) at medium currents follows nearly an 1/ID trend. 1/f noise is analyzed within both the mobility and carrier number fluctuation models (MFM and CNFM), respectively. Taking the MFM into account, the Hooge noise parameter α spreads in the interval of 1.5 × 10−4 to 4 × 10−2, with lower values for shorter devices. Using the same data and the CNFM, the density of interface states Dit in the Al2O3/GexOy/Ge system was estimated using the transconductance extracted from the quasi-static transfer I/V characteristics. The extracted Dit values range from 5 × 109 to 3 × 1012 cm−2 eV−1. Contact noise has also been observed in some devices at high currents. RTN analyzed in time domain exhibits a relative RTN amplitude in the 0.3%–20% range. Capture and emission time constants as a function of VG exhibit a typical behavior for metal oxide semiconductor FETs. The extracted noise parameters are comparable with Ge and III–V nanodevices of top-down and bottom-up technologies.

Van der Waals Ferroelectric Semiconductor Field Effect Transistor for In-Memory Computing.

In-memory computing is a highly efficient approach for breaking the bottleneck of von Neumann architectures, i.e., reducing redundant latency and energy consumption during the data transfer between the physically separated memory and processing units. Herein we have designed a in-memory computing device, a van der Waals ferroelectric semiconductor (InSe) based metal-oxide-ferroelectric semiconductor field-effect transistor (MOfeS-FET). This MOfeS-FET integrates memory and logic functions in the same material, in which the out-of-plane (OOP) ferroelectric polarization in InSe is used for data storage and the semiconducting property is used for the logic computation. The MOfeS-FET shows a long retention time with high on/off ratios (>106), high program/erase (P/E) ratios (103), and stable cyclic endurance. Moreover, inverter, programmable NAND, and NOR Boolean logic operations with nonvolatile storage of the results have all been demonstrated using our approach. These findings highlight the potential of van der Waals ferroelectric semiconductor-based MOfeS-FETs in the in-memory computing and their potential of achieving size scaling beyond Moore's law.

Combination of Polymer Gate Dielectric and Two-Dimensional Semiconductor for Emerging Field-Effect Transistors

Two-dimensional (2D) materials are considered attractive semiconducting layers for emerging field-effect transistors owing to their unique electronic and optoelectronic properties. Polymers have been utilized in combination with 2D semiconductors as gate dielectric layers in field-effect transistors (FETs). Despite their distinctive advantages, the applicability of polymer gate dielectric materials for 2D semiconductor FETs has rarely been discussed in a comprehensive manner. Therefore, this paper reviews recent progress relating to 2D semiconductor FETs based on a wide range of polymeric gate dielectric materials, including (1) solution-based polymer dielectrics, (2) vacuum-deposited polymer dielectrics, (3) ferroelectric polymers, and (4) ion gels. Exploiting appropriate materials and corresponding processes, polymer gate dielectrics have enhanced the performance of 2D semiconductor FETs and enabled the development of versatile device structures in energy-efficient ways. Furthermore, FET-based functional electronic devices, such as flash memory devices, photodetectors, ferroelectric memory devices, and flexible electronics, are highlighted in this review. This paper also outlines challenges and opportunities in order to help develop high-performance FETs based on 2D semiconductors and polymer gate dielectrics and realize their practical applications.

Impact of low-dose radiation on nitrided lateral 4H-SiC MOSFETs and the related mechanisms

Lateral type n-channel 4H-SiC metal--oxide--semiconductor field effect transistors (MOSFETs), fabricated using a current industrial process, are irradiated with gamma rays at different irradiation doses in this paper to carry out a profound study on the generation mechanism of radiation-induced interface traps and oxide trapped charges. Electrical parameters (e.g., threshold voltage, subthreshold swing and channel mobility) of the device before and after irradiation are investigated, and the influence of the channel orientation ( and ) on the radiation effect is discussed for the first time. A positive threshold voltage shift is observed at very low irradiation doses (< 100 krad (Si)); the threshold voltage then shifts negatively as the dose increases. It is found that the dependence of interface trap generation on the radiation dose is not the same for doses below and above 100 krad. For irradiation doses < 100 krad, the radiation-induced interface traps with relatively high generation speeds dominate the competition with radiation-induced oxide trapped charges, contributing to the positive threshold voltage shift correspondingly. All these results provide additional insight into the radiation-induced charge trapping mechanism in the SiO2/SiC interface.

Metal-Oxide FET Biosensor for Point-of-Care Testing: Overview and Perspective.

Metal-oxide semiconducting materials are promising for building high-performance field-effect transistor (FET) based biochemical sensors. The existence of well-established top-down scalable manufacturing processes enables the reliable production of cost-effective yet high-performance sensors, two key considerations toward the translation of such devices in real-life applications. Metal-oxide semiconductor FET biochemical sensors are especially well-suited to the development of Point-of-Care testing (PoCT) devices, as illustrated by the rapidly growing body of reports in the field. Yet, metal-oxide semiconductor FET sensors remain confined to date, mainly in academia. Toward accelerating the real-life translation of this exciting technology, we review the current literature and discuss the critical features underpinning the successful development of metal-oxide semiconductor FET-based PoCT devices that meet the stringent performance, manufacturing, and regulatory requirements of PoCT.

Design of Radiation-Tolerant High-Speed Signal Processing Circuit for Detecting Prompt Gamma Rays by Nuclear Explosion

Electronic equipment in nuclear power plants and nuclear warfare is damaged by transient effects that cause high-energy pulsed radiation. There is a concern that this type of damage can even cause enormous economic losses and human casualties by paralyzing control systems. To solve this problem, this study proposes a complementary metal-oxide semiconductor (CMOS) logic-based, switching detection circuit that can detect pulsed radiations at a fast rate. This circuit improved response speed and power consumption by using the switching operation of digital logic compared with conventional circuits. Furthermore, radiation tolerance to total ionizing dose (TID) effects was achieved even in a cumulative radiation environment because of the use of the design using p-metal-oxide semiconductor field effect transistor (p-MOSFET). The proposed detection circuit was manufactured by a 0.18 µm CMOS bulk process for integration. Normal operation in the detection range of 2.0 × 107 rad(si)/s was verified by pulsed radiation test evaluations, and the tolerance properties to a radiation of 2 Mrad was verified based on cumulative radiation test evaluations.

Strain Benefits of Monolayer α‐GeTe and its Application in Low‐Power Metal–Oxide–Semiconductor Field‐Effect Transistors

2D semiconductors, which have been the candidate channel materials for next‐generation field‐effect transistors (FETs), are now reaching the fundamental limits to what they can offer for higher driving current and switching speed. Low carrier mobility and correspondingly high effective mass hinder such materials to become the ideal electron transport systems. Herein, the electronic and transport properties of strained α‐GeTe are studied for low‐power transistor applications. It is found that monolayer α‐GeTe exhibits a sensitive strain response and undergoes an indirect‐to‐direct bandgap transition at about 2% of tensile uniaxial strain in the zigzag direction, significantly decreasing the electron effective mass and improving electron mobility. In addition, applying tensile strain in the armchair direction can effectively reduce the band‐edge energy of the conduction band minimum (CBM), suggesting that strain can reduce the energy barrier of electrons. These favorable strain responses considerably impact the device performance where both steeper subthreshold swing (SS) and higher on‐state currents can be achieved in monolayer α‐GeTe‐based metal–oxide–semiconductor FETs (MOSFETs). It is hoped that such strain benefits can provide an effective way to modulate the properties of α‐GeTe and finally enhance the device performance.

Simple and Seamless PWM Scheme of Isolated Bidirectional AC–DC Converter for Reducing Voltage Spike

This article proposes an improved modulation scheme based on unipolar sinusoidal pulsewidth modulation for a single-phase single-stage isolated bidirectional ac&#x2013;dc converter. A direct ac&#x2013;ac conversion system connected with a high-frequency transformer typically suffers from high-voltage spikes because of the leakage inductors of the high-frequency transformer and the grid filter inductors, resulting in reduced reliability and large power losses. The proposed modulation scheme can eliminate the high-voltage spikes in bidirectional power flow without the use of additional circuits while realizing zero-voltage switching. In addition, because the proposed method does not require individual gate control of the bidirectional power switches, the generation of gate signals can be simplified using the proposed modulation scheme. A simulation model and a 1.2 kW grid-connected ac&#x2013;dc converter based on silicon-carbide metal&#x2013;oxide&#x2013;semiconductor field-effect transistors are implemented to validate the effectiveness of the proposed modulation scheme.

How to report and benchmark emerging field-effect transistors

Emerging low-dimensional nanomaterials have been studied for decades in device applications as field-effect transistors (FETs). However, properly reporting and comparing device performance has been challenging due to the involvement and interlinking of multiple device parameters. More importantly, the interdisciplinarity of this research community results in a lack of consistent reporting and benchmarking guidelines. Here we report a consensus among the authors regarding guidelines for reporting and benchmarking important FET parameters and performance metrics. We provide an example of this reporting and benchmarking process for a two-dimensional (2D) semiconductor FET. Our consensus will help promote an improved approach for assessing device performance in emerging FETs, thus aiding the field to progress more consistently and meaningfully.