Semiconductor Wafer Fabrication System Research Articles

Multi-objective real-time dispatching for integrated delivery in a Fab using GA based simulation optimization

In a wafer fabrication Fab, the “integrated delivery”, which integrates the automated material handling system (AMHS) with processing tools to automate the material flow, is difficult to implement due to the system complexity and uncertainty. The previous dispatching studies in semiconductor manufacturing have mainly focused on the tool dispatching. Few studies have been done for analyzing combinatorial dispatching rules including lot dispatching, batch dispatching and automated guided vehicle (AGV) dispatching. To handle this problem, a GA (genetic algorithm) based simulation optimization methodology, which consists of the on-line scheduler and the off-line scheduler, is presented in this paper. The on-line scheduler is used to monitor and implement optimal combinatorial dispatching rules to the semiconductor wafer fabrication system. The off-line scheduler is employed to search for optimal combinatorial dispatching rules. In this study, the response surface methodology is adopted to optimize the GA parameters. Finally, an experimental bay of wafer fabrication Fab is constructed and numerical experiments show that the proposed approach can significantly improve the performance of the “integrated delivery system” compared with the traditional single dispatching rule approach.

Closed loop control-based real-time dispatching heuristic on parallel batch machines with incompatible job families and dynamic arrivals

In this paper, a real-time closed loop control dispatching heuristic (RCLC) algorithm is proposed to address the scheduling problem of parallel batch machines with incompatible job families, limited waiting time constraints, re-entrant flow and dynamic arrivals in the diffusion and oxidation areas of a semiconductor wafer fabrication system (SWFS), which is known to be strongly NP-hard. The basis of this algorithm is the information of lots in the buffer when the parallel batch machines are idle and available. In RCLC, if the number of any family lots is less than the maximum batch size, the dispatching heuristic can be seen as a pull–pull–push–push (P4) strategy; otherwise, a genetic algorithm (GA). A look-itself strategy, P4 strategy and GA can build a closed loop control system. The experiments are implemented on the Petri nets-based real-time scheduling simulation platform of SWFS, and demonstrate the effectiveness of our proposed method.

Multiple-objective scheduling for interbay AMHS by using genetic-programming-based composite dispatching rules generator

Semiconductor wafer fabrication system (SWFS) is one of the most complicate discrete processing systems in the world. As the wafer size grows from 200 to 300mm and then to 450mm in recent years, the interbay automated material handling system (AMHS) has been widely adopted. How to improve the overall efficiency of AMHS has therefore become a crucial and urgent problem to wafer manufacturers. However, the large-scale, dynamic and stochastic production environment significantly substantiates the complexity of the scheduling problem for interbay AMHS. Aiming to meet the demand of multiple-objective optimization, composite dispatching rules (CDR) are applied. The system parameters, including wafer cassettes due date, waiting time, and stocker buffer status are simultaneously considered. In order that the composite dispatching rules can be used in real-life dynamic production, a genetic programming based CDR generator is proposed. Discrete event simulation models are constructed using the eM-Plant software to simulate the 300mm SWFS. The numerical study indicates that by using the generated composite dispatching rules the transport efficiency is improved, meanwhile, the wafer throughput is increased and the processing cycle time is shortened. The experimental results also demonstrate that the GP-based generating algorithm is effective and efficient for a dynamic environment. Further comparisons with other scheduling methods show that the proposed approach performs better in most scenarios.

Dynamic scheduling of photolithography process based on Kohonen neural network

Semiconductor enterprises should continue to provide more capacity to meet the demands of the highly competitive semiconductor markets. Photolithography is usually the bottleneck process with the most expensive equipment in a semiconductor wafer fabrication system. Usually, photolithography area controls the performance of whole semiconductor manufacturing system. To improve the performances of the photolithography area with dynamic dispatching combination rules, a dynamic scheduling method based on Kohonen neural network (KNN) was proposed in this paper. A dynamic scheduling framework is also proposed. The method has been integrated into the dynamic scheduling framework. A KNN-based sample learning algorithm for selecting best combination rules is presented. Finally, the results of simulation experiments indicate that the proposed method is effective and feasible in real-time scheduling of semiconductor fabrication system under both closed-loop release policy and open-loop release policy.

Dynamic dispatching for interbay material handling by using modified Hungarian algorithm and fuzzy-logic-based control

Semiconductor Wafer Fabrication System (SWFS) is one of the most complicate discrete processing systems in the world. As the wafer size grows from 200 to 300 mm and then to 450 mm in recent years, the interbay automated material handling system (AMHS) has been widely adopted. How to improve the overall efficiency of interbay material handling has therefore become a critical and urgent problem to be solved. However, the large-scale, dynamic and stochastic production environment significantly substantiates the complexity of the scheduling problem. Aiming to meet the demands of adaptive adjusting, efficient scheduling and multiple-objective optimization, a dynamic dispatching method based on modified Hungarian algorithm is proposed. The system parameters, including cassette due date, cassette waiting time, and system load are simultaneously considered, and furthermore the multi-parameters’ weight coefficients are adjusted dynamically by using the fuzzy-logic-based control. Discrete event simulation models are constructed with the eM-Plant software to evaluate the proposed approach. Experimental results show that the proposed dynamic dispatching method improves the system efficiency in terms of mean delivery time, mean waiting time and so on. Meanwhile, the proposed dispatching method has a better comprehensive performance such as the robustness compared to conventional vehicle dispatching approaches.

An Improved Fault Transfer Table Based Fault Modeling Method in Etch Process of Semiconductor Wafer Manufacturing System

Fault model and detection in etch process is one of the key point problem in Semiconductor Wafer Fabrication System. A well developed fault modeling and detecting method in this process contributes greatly to the yield and Overall Equipment Effectiveness. The etch process has its unique characteristics like abundant variables, huge collections of data and nonlinearity in most batch processes; hence it poses difficulties to traditional modeling methods. In order to demonstrate the detail characteristic of faults in etch process, an improved fault transfer table based fault modeling method is proposed in this paper. The main idea of this method is to illustrate the indications, faults and their relationships in logical equations. The experimental results of an industrial example show that it has advantages such as simple expression and high capacity of information, and therefore is especially useful for the fault detection and diagnosis of semiconductor manufacturing.

Decomposition-based classified ant colony optimization algorithm for scheduling semiconductor wafer fabrication system

Due to its typical features, such as large-scale, multiple re-entrant flows, and hybrid machine types, the semiconductor wafer fabrication system (SWFS) is extremely difficult to schedule. In order to cope with this difficulty, the decomposition-based classified ant colony optimization (D-CACO) method is proposed and analyzed in this paper. The D-CACO method comprises decomposition procedure and classified ant colony optimization algorithm. In the decomposition procedure, a large and complicate scheduling problem is decomposed into several subproblems and these subproblems are scheduled in sequence. The classified ACO algorithm then groups all of the operations of the subproblems and schedules them according to machine type. To test the effect of the method, a set of simulations are conducted on a virtual fab simulation platform. The test results show that the proposed D-CACO algorithm works efficiently in scheduling SWFS.

Kohonen Neural Network – Based Performance Improvements for Wafer Photolithography Process with CONWIP Control Strategy

Photolithography is usually the bottleneck process with the most expensive equipment in a semiconductor wafer fabrication system. To improve the performances of the photolithography area with dynamic combination rules, a method of Kohonen neural network (KNN)–based performance improvements is proposed. First, a dynamic scheduling framework based on a KNN model and scheduling rules is proposed. A KNN-based sample learning algorithm for improving the performances is presented. Finally, to demonstrate the validity and feasibility of the proposed method, data from a real wafer fabrication system are used to simulate the proposed method. Results of simulation experiments indicate that the proposed method can be used to improve a complex wafer photolithography performance.

An adaptive multi-parameter based dispatching strategy for single-loop interbay material handling systems

The automation of interbay systems in 300 mm semiconductor wafer fabrication systems (SWFSs) is complex due to the dynamic, stochastic and mass transportation demands, transportation deadlocks, and vehicle blockages. An adaptive multi-parameter based (AMP) dispatching policy is proposed to obtain better performance of the interbay material handling systems and SWFSs. The system parameters, including vehicle's distance, lot's due date, lot's waiting time, and lot's origin–destination buffer status parameters are simultaneously considered, and the multi-parameter's weight coefficients are adjusted adaptively by Takagi-Sugeno fuzzy logic method. With experimental data from an interbay system of 300 mm SWFSs and running simulation experiments, it is demonstrated that the proposed approach has better performance in terms of cycle time, throughput, due-date satisfaction rate, and vehicle utilization compared to conventional single- and multi-attribute dispatching methodologies.

An optimised dynamic bottleneck dispatching policy for semiconductor wafer fabrication

A dynamic bottleneck dispatching (DBD) policy is designed in this paper to detect bottlenecks in a timely way and make adaptive dispatching decisions of semiconductor wafer fabrication systems according to the real-time conditions. Control parameters of the proposed DBD algorithm are optimised by response surface methodology (RSM) and desirability functions. Numerical results show that DBD outperforms common scheduling rules such as CR + FIFO, EDD, SRPT, SPT, SPNB and an existing dynamic bottleneck dispatching method.

A Neural Network and a Genetic Algorithm for Multiobjective Scheduling of Semiconductor Manufacturing Plants

Scheduling of semiconductor wafer fabrication system is identified as a complex problem, involving multiple objectives to be satisfied simultaneously (maximization of workstation utilization and minimization of waiting time and storage, for instance). In this study, we propose a methodology based on an artificial neural network technique, for computing the various objective functions, embedded into a multiobjective genetic algorithm for multidecision scheduling problems in a semiconductor wafer fabrication environment. A discrete event simulator, developed and validated in our previous works, serves here to feed the neural network. Six criteria related to both equipment (facility average utilization) and products (average cycle time (ACT), standard deviation of ACT, average waiting time, work in process, and total storage) are chosen as significant performance indexes of the workshop. The optimization variables are the time between campaigns and the release time of batches into the plant. An industrial size example is taken as a test bench to validate the approach.

An efficient new job release control methodology

This paper presents a new job release methodology: WIPLOAD Control (WIPLCtrl), which is a workload limited release methodology for the overall shop floor. The behaviour of WIPLCtrl is analyzed using the Markov process model of a transfer line system to observe the potential advantage of WIPLCtrl relative to the conventional measure of system workload using the WIP level. A simulation experiment is then conducted considering a simplified semiconductor wafer fabrication system. The performance of WIPLCtrl is compared with that of an open-loop release methodology and three other closed-loop workload limited release methodologies. A case study is also carried out by simulating a real-life wafer fabrication, considering the complexities and the distinguishing features of semiconductor manufacturing. The experimental results indicate that WIPLCtrl is an efficient job release methodology, capable of reducing both the mean and the standard deviation of the cycle time for a given throughput level. The performance of WIPLCtrl appears to be reliable with the increase of system congestion level and the increase of system variability caused by stochastic factors such as machine unreliability and processing time variability.

Performance modeling, real-time dispatching and simulation of wafer fabrication systems using timed extended object-oriented Petri nets

Semiconductor wafer fabrication system (SWFS) is the most complex and capital-intensive phase in the entire semiconductor manufacturing cycle. With characteristics of re-entrant processing routes, equipment uncertainty, product diversity and improving technologies, great challenges are presented in SWFS’s modeling, scheduling and simulation. To implement efficient production control, this paper provides a timed extended object-oriented Petri nets (TEOPNs) approach to performance modeling, real-timed dispatching and simulation of SWFSs. The TEOPNs models are constructed in a hierarchy to accord with the real-world SWFS’s organization, and a new type of signal place is added into the TEOPNs to respond the dynamic states of all processing facilities. A novel autonomy and coordination-based real-time dispatching mechanism (A&C-RDM) is developed in this paper, which executes under the support of the TEOPNs-based hybrid real-time dispatching control system (HRDCS). Owning to the ability of gathering dynamic real-time information of all production facilities and WIP products, the HRDCS can make adaptive dispatching decisions according to the local and global real-time processing status. Two sets of key elements of real-time dispatching, i.e. the state thresholds and dispatching rules, are defined in the HRDCS so that the A&C-RDM can integrate different types of dispatching rules. A set of simulation experiments prove the efficiency of the proposed modeling and dispatching algorithm. In summary, the proposed TEOPNs, HRDCS and A&C-RDM form the cornerstones of a real-time dispatching simulation prototype of SWFS, and the work described in this paper carries out an advanced integrated “modeling–dispatching–simulation” methodology.

Simulation-based optimization of dispatching rules for semiconductor wafer fabrication system scheduling by the response surface methodology

Scheduling of a semiconductor wafer fabrication system (SWFS) is complicated due to its re-entrant product flow, high uncertainties in operations, and rapidly changing products and technologies; thus dispatching rules have been widely used for real-time scheduling because they can provide a very quick and pretty good solution. However, deciding how to select appropriate rules is very difficult and seldom tackled. This paper describes an approach into the evaluation and optimization of dispatching rules by integrating the simulation and response surface methodology (RSM). In order to implement the proposed approach, a dynamic bottleneck dispatching (DBD) policy is designed, in which bottlenecks are detected in a timely way and adaptive dispatching decisions are made according to the real-time conditions. In addition, two case studies are carried out to demonstrate the approach. One case compares DBD to regular rules, such as CR + FIFO, EDD, SRPT, SPT, SPNB and Justice, a bottleneck dispatching method. Simulation results show that the DBD policy is superior to the other six methods. In another case study, the parameters of DBD are optimized by RSM and desirability function, and the result proves that the optimized DBD method can get even better performance.

The infrastructure of the timed EOPNs-based multiple-objective real-time scheduling system for 300 mm wafer fab

Modern semiconductor wafer fabrication systems are changing from 200 mm to 300 mm wafer processing, and with the dual promises of more chips per wafer and economy of scale, leading semiconductor manufacturers are attracted to developing and implementing 300 mm wafer fabs. However, in today's dynamic and competitive global market, a successful semiconductor manufacturer has to excel in multiple performance indices, such as manufacturing cycle time and on-time delivery, and simultaneously optimize these objectives to reach the best-compromised system achievement. To cope with this challenge, in this paper, the infrastructure of a timed EOPNs-based multiple-objective real-time scheduling system (MRSS) is proposed to tackle complex 300 mm wafer fabs. Four specific performance objectives pursued by contemporary semiconductor manufacturers are integrated into a priority-ranking algorithm, which can serve as the initial scheduling guidance, and then all wafer lots will be dynamically dispatched by the real-time state-dependent dispatching system. This dispatching control system is timed EOPN-based and adopts a heterarchical organization that leads to a better real-time performance and adaptability. As the foundation of real-time schedule, the timed EOPNs modelling approach is expounded in detail, and the prototype of the MRSS simulation system is also provided.

Modeling of photolithography process in semiconductor wafer fabrication systems using extended hybrid Petri nets

To describe a semiconductor wafer fabrication flow availably, a new modeling method of extended hybrid Petri nets (EHPNs) was proposed. To model the discrete part and continuous part of a complex photolithography process, hybrid Petri nets (HPNs) were introduced. To cope with the complexity of a photolithography process, object-oriented methods such as encapsulation and classifications were integrated with HPN models. EHPN definitions were presented on the basis of HPN models and object-oriented methods. Object-oriented hybrid Petri subnet models were developed for each typical physical object and an EHPN modeling procedure steps were structured. To demonstrate the feasibility and validity of the proposed modeling method, a real wafer photolithography case was used to illustrate the modeling procedure. The modeling results indicate that the EHPNs can deal with the dynamic modeling of a complex photolithography process effectively.

Modelling of semiconductor wafer fabrication systems by extended object-oriented Petri nets

In this paper, extended object-oriented Petri nets (EOPNs) are proposed for the effective modelling of semiconductor wafer fabrication systems (SWFSs). To cope with their complexity in terms of the re-entrant process route and the mixed production mode, a special type of transition called main-bus gate is introduced, which may lead each kind of product to undergo every re-entrant processing stage. In addition, the hierarchical approach is also applied to cope with the complexity. An etching area that processes 0.25 µm logic IC products is taken as an illustration to present the detailed modelling procedures by EOPNs, and the resulting model validates that the EOPNs may cope well with complex SWFSs modelling.

Modeling of large-scale complex re-entrant manufacturing systems by extended object-oriented Petri nets

In this paper we propose an extended object-oriented Petri nets (EOPNs) for effective modeling of large-scale complex re-entrant manufacturing systems (ReMSs). To cope with their complexity because of the re-entrant process route and the mixed production mode, a special type of transition called a main-bus gate (MBG) is introduced, which can cause products to undergo every re-entrant manufacturing stage. A hierarchical approach is also applied to cope with the complexity. As a typical large-scale complex ReMS, the semiconductor wafer fabrication system (SWFS) is taken as an example for demonstrating the proposed EOPNs. A case study is provided to show the modelling procedures, and the resulting model validates that the EOPNs can cope well with the modelling complexity of large-scale complex ReMSs.

Selection of dispatching rules on multiple dispatching decision points in real-time scheduling of a semiconductor wafer fabrication system

Semiconductor wafer fabrication involves one of the most complex manufacturing processes ever used. To control such complex systems, it is a challenge to determine appropriate dispatching strategies under various system conditions. Dispatching strategies are classified into two categories: a vehicle-initiated dispatching policy and a machine-initiated dispatching policy. Both policies are important to improve the system performance, especially for the real time control of the system. However, there has been little research focusing on combining them under various situations for the semiconductor manufacturing system. In addition, it is shown that no single dispatching strategy consistently dominates others in all situations. Therefore, the goal of this study is to develop a scheduler for selection of dispatching rules for dispatching decision variables in order to obtain the desired performance measures given by a user for each production interval. For the proposed methodology, simulation and competitive neural network approaches are used. The results of the study indicate that applying our methodology to obtaining a dispatching strategy is an effective method considering the complexity of semiconductor wafer fabrication systems.

Development of a real-time multi-objective scheduler for a semiconductor fabrication system

Semiconductor wafer fabrication involves possibly one of the most complex manufacturing processes ever used. This causes a number of decision problems. A successful system control strategy would assign appropriate decision rules for decision variables. Therefore, the goal of this study is to develop a scheduler for the selection of decision rules for decision variables in order to obtain the desired performance measures given by a user at the end of a certain production interval. In this proposed methodology, a system control strategy based on a simulation technique and a competitive neural network is suggested. A simulation experiment was conducted to collect the data containing the relationship between the change of decision rule set and current system status and the performance measures in the dynamic nature of semiconductor manufacturing fabrication. Then, a competitive neural network was applied to obtain the scheduling knowledge from the collected data. The results of the study indicate that applying this methodology to obtaining a control strategy is an effective method considering the complexity of semiconductor wafer fabrication systems.