Semiconductor Power Amplifier Research Articles

Fundamental limits of high-efficiency silicon and compound semiconductor power amplifiers in 100-300 GHz bands

This paper reviews the requirements for future digital arrays in terms of power amplifier requirements for output power and efficiency and the device technologies that will realize future energy-efficient communication and sensing electronics for the upper millimeter-wave bands (100-300 GHz). Fundamental device technologies are reviewed to compare the needs for compound semiconductors and silicon processes. Power amplifier circuit design above 100 GHz is reviewed based on load line and matching element losses. We present recently presented class-A and class-B PAs based on a InP HBT process that have demonstrated record efficiency and power around 140 GHz while discussing circuit techniques that can be applied in a variety of integrated circuits.

硅基半导体功放模块邻道干扰特性优化方法

硅基半导体功放模块邻道干扰特性优化方法

Compact high‐linearity, high‐efficiency complementary metal–oxide–semiconductor power amplifier with post‐distortion lineariser for wireless local area network and Wireless Gigabit Alliance applications

This study proposes a post-distortion linearisation technique for 5 and 60 GHz complementary metal-oxide-semiconductor (CMOS) power amplifiers (PAs). The technique improves the output 1 dB gain compression point (OP 1dB ) and power-added efficiency (PAE) of the PA when the lineariser is turned on. The 5 GHz PA that is fabricated in tsmc TM 0.18 μm CMOS achieves a 16.3 dB gain, a 20 dBm OP 1dB and a 32.6% PAE. The linearised 5 GHz PA improves the OP 1dB and PAE by 2.3 dB and 3.2% as compared to the PA without lineariser. The difference between the OP 1dB and saturated power ( P sat ) is <;0.2 dB. The 60 GHz PA was implemented in a 90 nm CMOS process with a chip area of 0.57 mm 2 . The PA achieves a 14.8 dB gain, a 16.8 dBm OP 1dB with a 16.3% PAE and a 15 GHz 3 dB bandwidth. The power difference between the OP 1dB and P sat is <;0.3 dB. The linearised 60 GHz PA improves the OP 1dB and PAE by 3.2 dB and 5.8% as compared to the PA without lineariser.

Broadband high performance laterally diffused metal–oxide–semiconductor power amplifier for mobile two‐way radio applications

This paper highlights achievement of broadband high performance power amplifier (PA) line up for mobile two-way radio applications. In typical two-way radio applications the input radio-frequency signal to the first PA stage comes directly from the voltage controlled oscillator, with typically 3 dBm power. Owing to high output power requirement (∼80 W) of mobile radio applications, up to three PA device stages are normally cascaded (pre-driver, driver and final PA stage). The key point in the design of the PA line up concerns the final stage. Here, this paper introduces a design methodology based on parallel-combined impedance matching technique (from theoretical derivation) enables the designers to develop broadband PA with actual PA device impedance (implementation of new generation laterally diffused metal–oxide–semiconductor device). Experimental results demonstrated output power of ∼80 W and gain of 45 dB, while preserving efficiency of 55% over the bandwidth from 760 to 870 MHz. According to author's knowledge, this amplifier demonstrated highest efficiency with 13 V DC supply (operating at 80 W) in UHF broadband frequency with high gain operation (more than 45 dB) up to date.

Parasitics-aware layout design of a low-power fully integrated complementary metal-oxide semiconductor power amplifier

There is a need for efficient fully integrated complementary metal-oxide semiconductor (CMOS) power amplifiers (PAs) for very low power implanted biomedical transceiver systems. However, the parasitics of on-silicon interconnections can cause significant degradation in the performance of radio frequency integrated circuits, in general, and PAs, in particular. In this article, we propose a special layout design approach, which was used to design the layout of a CMOS PA. This approach relies on modeling the interconnection wires in the simulations and optimizing their widths for minimum parasitic effects and hence optimum measured circuit performance. The PA circuit is operating at 2.45GHz and is implemented in a standard 0.18μm CMOS process. Measurement results show that at a supply voltage of 1.4V, the PA delivers an output power of 4.5mW with 28.5% power-added efficiency and a power gain of 21.5dB. Owing to the careful layout design and interconnection optimization, the implemented PA circuit shows good efficiency and demonstrates a good match between the measured and simulated performance characteristics.

Digital subband filtering predistorter architecture for wireless transmitters

In this paper, a new architecture for baseband digital predistortion dedicated to wide-band transmissions is presented. The proposed predistorter consists of a cascade of a static lookup-table-based predistorter and a subband filtering block. The subband filtering technique is used to improve the correction bandwidth limitation of conventional architectures. The cases of four- and eight-subband decomposition were considered and compared to the case where the full-band signal is processed. This revealed that the subband processing results in a better sensitivity and an independent tuning ability of the predistorter at each subband. In addition, it was shown that, in the proposed predistorter, the computational complexity and the required processing speed are reduced proportionally to the number of subbands. Moreover, in an adaptive digital predistortion context, a quicker convergence can be achieved. Experimental validation of the subband-based predistortion concept was successfully carried on a 100-W peak envelop power lateral double diffused metal-oxide semiconductor power amplifier.

Drain-voltage dependency of memory effects in W-CDMA base station digital predistortion linearizers with compound semiconductor power amplifiers

With regard to wideband predistortion type power amplifiers, such as shared amplifiers used in W-CDMA base stations, the memory effects associated with RF power amplifiers degrade power efficiency. Aiming to solve this problem, we find that a high-voltage compound semiconductor device has sufficient ACLR performance to mitigate these memory effects. We tested two kinds of compound-semiconductor devices, namely, a GaAs FET and a GaN HEMT. The GaAs FET, with an operating voltage (Vop) of 12 V, a saturation output of 240 W, and a push–pull configuration, was used as a low-voltage device. The GaN HEMT, with Vop of 50 V, a saturation output of 200 W, and a push–pull configuration as well, was used as a high-voltage device. The test results for these devices in a predistortion linearizer configuration show that the high-voltage device (the GaN HEMT) achieved excellent characteristics in terms of distortion suppression and drain efficiency in four-carrier W-CDMA applications. © 2005 Wiley Periodicals, Inc. Microwave Opt Technol Lett 45: 551–554, 2005; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.20876

Measurement of the populations of metastable levels in gadolinium vapor by diode laser-based UV and near-IR absorption spectroscopy

The metastable populations of gadolinium atoms, which were generated by an electron beam gun, were measured by diode laser-based absorption spectroscopy. Transitions originating out of the ground and low-lying metastable levels were investigated in the spectral range of 390–394 nm. A tapered semiconductor power-amplifier which was seeded by a single-mode external-cavity diode laser was used as a fundamental light source for the second-harmonic generation in the ultraviolet wavelength range. The population appears to be frozen at an atomic excitation temperature of ∼600 K, which is about 1/4 of the heated surface temperature. The results obtained from the ultraviolet absorption spectra are compared to those obtained from the near-IR absorption spectra with wavelength ranges of 673–692 and 773–775 nm.

The monolithic integration of a superluminescent diode with a power amplifier

Monolithic integration of a superluminescent diode with a tapered semiconductor power amplifier is proposed. The basic operation of the integrated optical source is demonstrated under pulse conditions. Output power obtained by the integrated device is one to two orders of magnitude higher than the conventional superluminescent diode (SLD) devices.

Dynamic beam propagation method for flared semiconductor power amplifiers

In this paper, we present the results of a dynamic two-dimensional time-domain beam propagation method (two spatial dimensions plus time) for simulating travelling wave semiconductor optical amplifiers with nonuniform transverse section in pulsed regime. Using the effective refractive index method, the paraxial approximation and a moving timeframe, we reduce the scalar wave equation to a nonlinear parabolic partial differential equation for the slow complex envelope of the electric field. Diffraction, refractive index dispersion up to the second order, gain saturation and gain dispersion are included in the model. We numerically solve the equation through a locally one-dimensional (LOD) method employing both finite-difference techniques and FFT-based pseudospectral methods.

Wavelength conversion using a T-gate laser

Wavelength conversion from 830 nm to 837 nm of a 250 Mb/s NRZ optical signal has been demonstrated at 10/sup -9/ bit-error rate and a detector sensitivity of -29 dBm using a semiconductor power amplifier monolithically integrated at 90/spl deg/ with a GaAs-AlGaAs SQW semiconductor laser. This device offers a high degree of isolation between the input and the output and has the potential for high-speed operation with a wide continuous-wavelength conversion range.

Avalanche multiplication in c.a.t.t.s

The use of avalanche and transit-time effects in microwave transistor-like structures is being explored to provide increased gain and higher-frequency operation of 3-terminal semiconductor power amplifiers. The paper describes certain aspects of the avalanche-multiplication process of importance for understanding c.a.t.t. operation and for c.a.t.t. design. It is shown that n-p-n silicon c.a.t.t.s can be designed to operate with moderate charge multiplication without requiring a critical value of collector-base bias voltage. Space-charge effects reduce the actual multiplication at high injection levels. Avalanche-generated holes, returning to the emitter and base regions, have profound effects on the d.c. and r.f. characteristics of the c.a.t.t. These effects are qualitatively understood. Experimental results are reported on device impedances, gain and bandwidth in the 2.5?4.0 GHz region.