Guoping Guo Professor Guoping Guo from the Key Laboratory of Quantum Information at the University of Science and Technology of China, talks to Electronics Letters about the paper ‘Modelling and Kink Correction of 0.18 µm Bulk CMOS at Liquid Helium Temperature‘, page 780. I am currently studying solid state quantum computing fields and extreme environment electronics with the University of Science and Technology of China (USTC) alongside my research on quantum transport and its applications. This includes the design and manufacturing process of nanostructure devices. Meanwhile, my group focuses on measurement and control systems for quantum chips, specifically the semiconductor gate quantum dot, using GaAs, Si, graphene, and other 2-D materials. The work in our submitted Electronics Letters paper focuses on cryogenic electronics, including electron devices and circuits which operate at cryogenic temperatures. This temperature range extends from −150°C (123.15 Kelvin) down to absolute zero (0 K or −273.15°C). Cryogenic electronics have good prospects in applications such as space exploration, infrared focal plane array, quantum computing and many fields where electronics face extreme low temperature environments. A quantum computer comprises a quantum processor and a classical electronic control system. The quantum processor works in a dilution refrigerator at deep cryogenic temperatures down to the millikelvin range, while traditional electronic readout and control systems are implemented using room-temperature (RT) laboratory instruments. The cryogenic complementary metal oxide semiconductor (Cryo-CMOS) technology can greatly reduce noises generated by classical electronics and thermal environment, thus enhancing the fidelity and precision of quantum information processing. The first problem to solve when designing Cryo-CMOS circuits is transistor modelling. In answer to this we present the first compact model for 0.18 µm CMOS technology based on BSIM3 down to liquid Helium temperatures (4.2µK). We also present a sub-circuit model to improve the fitting precision at 4.2 K. This work provides experimental evidence for the implementation of cryogenic CMOS technology, a valid model of industrial tape-out process, and promotes the application of integrated circuits in cryogenic environments, for applications such as quantum measurement and for control systems for semiconductor quantum chips at very low temperatures. As it is difficult to build a low-temperature CMOS model by simply extracting parameters, this provided the motivation for us to establish a sub-circuit model to correct the kink deviations. In the short term, we can design and simulate cryogenic CMOS circuits using our model. In the longer term, cryo-CMOS can help us implement the cryogenic readout and control system for quantum computing. We plan to implement ADC (Analog-to-Digital Converter), DAC (Digital-to-Analog Converter), oscillator, FPGA (Field Programmable Gate Array), and other adaptive/passive integrated circuits at cryogenic temperatures or in irradiative environments. This involves research and progress in three main topics, namely: Cryo-CMOS characterization and modelling, Cryogenic integrated circuits on chips and Cryogenic circuits on boards. More and more researchers are beginning to pay attention to cryogenic electronics. With the current standard of, and growing pace of, development in quantum computing, cryogenic electronics will also receive faster development, and can be applied in future quantum computing and space exploration systems.