Semiconductor Assembly Process Research Articles

Precision Machining by Dicing Blades: A Systematic Review

Diamond dicing blades are profound cutting tools that find their applications in semiconductor back-end packaging and assembly processes. To fully appreciate the benefits of the dicing blade technique for precision machining, a deeper understanding is required. This paper systematically reviews the contribution of dicing blades in machining, followed by the context of dicing blades: production, characterization, methodology, and optimization. The readers are enlightened about the potential prospects that can be exploited for precision spectra as a result of current research and engineering developments.

Estimation of the Six Sigma Quality Index

The measurement of the process capability is a key part of quantitative quality control, and process capability indices are statistical measures of the process capability. Six Sigma level represents the maximum achievable process capability, and many enterprises have implemented Six Sigma improvement strategies. In recent years, many studies have investigated Six Sigma quality indices, including Qpk. However, Qpk contains two unknown parameters, namely δ and γ, which are difficult to use in process control. Therefore, whether a process quality reaches the k sigma level must be statistically inferred. Moreover, the statistical method of sampling distribution is challenging for the upper confidence limits of Qpk. We address these two difficulties in the present study and propose a methodology to solve them. Boole’s inequality, Demorgan’s theorem, and linear programming were integrated to derive the confidence intervals of Qpk, and then the upper confidence limits were used to perform hypothesis testing. This study involved a case study of the semiconductor assembly process in order to verify the feasibility of the proposed method.

Sulfur Ingression on Encapsulated Leadframe of Discrete Semiconductor Package

Methanesulfonic acid (MSA) has been widely used in the electroplating step at a backend semiconductor assembly process. This process comes after component encapsulation, which serves primarily to protect internal components of a device as well as to prevent ingression of chemical byproducts. The objective of this article is to study sulfur (S) ingression activities with respect to both electroplating and encapsulation processes and their effect on leadframe surface conditions. This can be achieved through observation of leadframe surface condition on samples prepared through laser ablation or mechanical decapsulation. Results from 17 engineering lots show that 25% of samples analyzed were observed with leadframe surface irregularities. The energy-dispersive X-ray spectroscopy (EDX) analysis confirmed the trace of S element on the area with surface irregularities, which can be linked to S ingression based on the trace of its path from outside, probably due to the existence of a microgap on the package. These findings provide a clearer understanding of the ingression path of S for encapsulated copper (Cu) leadframe. Even though ingression of S does not directly cause a failure, it is thought that this could act as a precursor to further failure mechanisms such as corrosion-like phenomena.

Data Science for Delamination Prognosis and Online Batch Learning in Semiconductor Assembly Process

The transformation of wafers into chips is a complex manufacturing process involving literally thousands of equipment parameters. Delamination, a leading cause of defective products, can occur between die and epoxy molding compound (EMC), epoxy and substrate, lead frame and EMC, and so on. Troubleshooting is generally on a case-by-case basis and is both time-consuming and labor-intensive. We propose a three-phase data science (DS) framework for process prognosis and prediction. The first phase is for data preprocessing. The second phase uses least absolute shrinkage and selection operator (LASSO) regression and stepwise regression to identify the key variables affecting delamination. The third phase develops a backpropagation neural network (BPNN), support vector regression (SVR), partial least squares (PLS), and gradient boosting machine (GBM) to predict the ratio of the delamination area in a die. We also investigate the imbalance between a false positive rate and a false negative rate after quality classification with BPN and GBM models to improve the tradeoff between the two types of risks. We conducted an empirical study of a semiconductor manufacturer, and the results show that the proposed framework provides an effective delamination prediction supporting the troubleshooting. In addition, for online prediction, it is necessary to determine the batch size for the timing of retraining the model, and we suggest the cost-oriented method to solve the issue.

Multifeature, Sparse-Based Approach for Defects Detection and Classification in Semiconductor Units

Automated inspection systems play an important role in manufacturing to guarantee higher quality and reduce production costs. In the semiconductor manufacturing industry, assembly and testing processes are getting more complex, resulting in a greater tendency of defects to impact the production process. These defects can cause field failures and can result in customer dissatisfactions and returns. Currently available defect detection and classification systems are customized and hard-wired to the detection of particular classes of defects and cannot deal with new unknown classes of defects. This issue is aggravated by the very small sample size of available anomalies for learning, by the data imbalance problem, since the number of defective samples is significantly much smaller than the number of normal samples, and by the presence of noise. This paper presents a novel multifeature, sparse-based defect detection and classification approach that uses the stacking concept to enhance the classification accuracy. The stacking-based classifier is augmented with a novel adaptive over/downsampling technique to deal with the data imbalance problem. A new pruning technique is proposed to eliminate bad base learners. Shortage of defective units, similarities within different classes of defects, wide variation within the same defect class, and data imbalance are the basic challenges to deal with. Experimental results on real-world data from Intel show that the proposed approach results in a high classification accuracy as compared with the existing methods. Note to Practitioners —The basic motivation of this paper is to design an automated cost-effective, adaptive, and intelligent defect detection and classification system that is easy to train using a small-size sample set of defects and that is robust to noise. The system is scalable in terms of the numbers and types of defects and features, which leads to a shorter development cycle. The presented system is immediately applicable to different types of defects. Inputs of the system are grayscale images. These images are processed to perform defects detection, features extraction, and classification.

Prediction of Field Failure Rate using Data Mining in the Automotive Semiconductor

Since the 20th century, automobiles, which are the most common means of transportation, have been evolving as the use of electronic control devices and automotive semiconductors increases dramatically. Automotive semiconductors are a key component in automotive electronic control devices and are used to provide stability, efficiency of fuel use, and stability of operation to consumers. Since automotive semiconductors have a high data rate basically, a microprocessor unit is being used instead of a micro control unit. For example, semiconductors based on ARM processors are being used in telematics, audio/video multi-medias and navigation. Automotive semiconductors require characteristics such as high reliability, durability and long-term supply, considering the period of use of the automobile for more than 10 years. The reliability of automotive semiconductors is directly linked to the safety of automobiles. The semiconductor industry uses JEDEC and AEC standards to evaluate the reliability of automotive semiconductors. In addition, the life expectancy of the product is estimated at the early stage of development and at the early stage of mass production by using the reliability test method and results that are presented as standard in the automobile industry. However, there are limitations in predicting the failure rate caused by various parameters such as customer’s various conditions of use and usage time. To overcome these limitations, much research has been done in academia and industry. Among them, researches using data mining techniques have been carried out in many semiconductor fields, but application and research on automotive semiconductors have not yet been studied.In this regard, this study investigates the relationship between data generated during semiconductor assembly and package test process by using data mining technique, and uses data mining technique suitable for predicting potential failure rate using customer bad data.

Ultra-Compact Four-Channel 5–18 GHz Switched Filter Bank Utilizing PolyStrata® Microfabrication and 3D Packaging

Abstract This paper presents a new approach to switched filter banks (SFB's) where the PolyStrata® microfabrication process is used to create three-dimensional signal routing and monolithic filter structures. This approach reduces the size of the SFB by an order of magnitude while achieving performance compared to legacy products. Nuvotronics' “Proto Filter Package” is a four-channel SFB design covering 5 – 18 GHz. It showcases how existing semiconductor and microelectronic assembly processes can be packaged with Polystrata®. The paper also describes how higher frequency designs (up to 110GHz) can be implemented using the same fabrication and assembly processes.

Data Mining for Delamination Diagnosis in the Semiconductor Assembly Process

The delamination in die-attach layer is a problem that results in defects of semiconductor products. There are several elements and parameters, which are difficultly observed, causing delamination during the assembly process. Thus, it's critical to identify abnormal factors immediately for the real-time correction and improvement. This paper proposes a two-stage analysis framework to achieve two goals: identifying the key factors affecting delamination via variable selection and predicting the ratio of the delamination area in a die via the prediction models.

Frequency-Domain ILC Approach for Repeating and Varying Tasks: With Application to Semiconductor Bonding Equipment

Iterative learning control (ILC) enables high performance for exactly repeating tasks in motion systems. Besides such tasks, many motion systems also exhibit varying tasks. In such cases, ILC algorithms are known to deteriorate performance. An example is given by bonding equipment in semiconductor assembly processes, which contains motion axes with tasks that can vary slightly. The aim of this paper is to develop an ILC approach that obtains high machine performance for possibly varying tasks, while enabling straightforward and effective industrial design rules. In particular, a frequency-domain-based design of ILC filters is pursued, which is combined with basis functions to cope with variations in tasks. Application to a high-speed axis of an industrial wire bonder shows that high servo performance is obtained for both repeating and varying tasks.

반도체 조립공정의 화학물질 노출특성 및 작업환경관리

Objectives: The purpose of this study was to evaluate the characteristics of worker exposure to hazardous chemical substances and propose the direction of work environment management for protecting worker's health in the semiconductor assembly process. Methods: Four assembly lines at two semiconductor manufacturing companies were selected for this study. We investigated the types of chemicals that were used and generated during the assembly process, and evaluated the workers’ exposure levels to hazardous chemicals such as benzene and formaldehyde and the current work environment management in the semiconductor assembly process. Results: Most of the chemicals used at the assembly process are complex mixtures with high molecular weight such as adhesives and epoxy molding compounds(EMCs). These complex mixtures are stable when they are used at room temperature. However workers can be exposed to volatile organic compounds(VOCs) such as benzene and formaldehyde when they are used at high temperature over 100°C. The concentration levels of benzene and formaldehyde in chip molding process were higher than other processes. The reason was that by-products were generated during the mold process due to thermal decomposition of EMC and machine cleaner at the process temperature(180°C). Conclusions: Most of the employees working at semiconductor assembly process are exposed directly or indirectly to various chemicals. Although the concentration levels are very lower than occupational exposure limits, workers can be exposed to carcinogens such as benzene and formaldehyde. Therefore, workers employed in the semiconductor assembly process should be informed of these exposure characteristics.

Electrodeposition of palladium on the copper lead frame: Electrode reaction characteristics and the effects of primary additives

This study is mainly concerned with the electrodeposition of palladium on the copper alloy lead frame used for semiconductor assembly process. The role and effect of additives on palladium electrodeposition were studied by using various electrochemical methods. Ortho-formylbenzenesulfonic acid as a primary additive was used in palladium plating on the lead frame in this study. The electrochemical characteristics of electrode reaction were measured by the hanging mercury drop electrode for electrochemical system and the qualities of the plated surface of lead frames were also examined. The additive agent in Pd solution could have been classified as the grain refiner. It acted as the electroactive species, which increased the polarization and decreased the roughness, by adsorption on the electrode in palladium pre-plated process. The reduction of palladium ion was identified to be an irreversible reaction and the diffusion coefficient of palladium ion and the reaction rate constant were obtained from chronopotentiometry experiment.

A study on the weighted composite dispatching rule in modular production systems

Scheduling semi-conductor manufacturing process systems is a complicated and difficult job, due to such characteristics as re-entry into manufacturing processes, high uncertainty of processes, and products and technologies changing rapidly. The researchers have carried out many studies to find efficient techniques for semi-conductor manufacturing systems with a view to accomplishing the goals of systems, such as saving cycling time and increasing production quantity per unit time. The production flow in the semi-conductor industry has the most unique characteristics, which makes it difficult to plan production and to schedule semi-conductor manufacturing. Currently, the scheduling methods in semi-conductor assembly processes follow the dispatching rule on a simple first come first serve (FCFS) basis, and a backlog is operated as a buffer based on the daily production quantity. In this study, therefore, we will apply various dispatching rules on a real-time basis and verify the effect and result of exact scheduling through simulation, based on the assumption that competitive advantages in production come from efficient inventory control and exact scheduling.

The effect of arc ion pre-bombardment on the impact failure of TiN coating on Co-WC

Co-WC is increasingly used for precision dies and punches in semiconductor assembly process. The enhancement of impact resistance of hard layer coatings on Co-WC dies and punches is crucial for the application of hard coatings such as TiN. In this study, Co-WC has been deposited with a TiN film after Ti bombardment at various bias voltages of 0–750 V using the cathodic arc ion plating process. The surfaces' etching morphology and the temperature increase upon pre-bombardment with Ti ion onto Co-WC were evaluated by SEM and in-situ monitoring, respectively. The increase of bias voltage over 500 V significantly induced selective etching of Co and enhanced the substrate temperature higher than 300 °C in 10 min, thereby promoting the formation of a dense TiN film onto it. The prior etching of the surface by Ti ion bombardment with a high bias voltage was very effective in improving the adhesion of the TiN film on Co-WC and therefore reduced plastic deformation and crack density around the indentation area in a Rockwell C indentation test. The impact failure of a TiN coating on Co-WC could be consequently reduced under loads up to 150 N.