Chaos-based block encryption algorithms have been proposed for years and their securities have been tested using conventional statistical methodologies, i.e. frequency analysis, avalanche analysis, entropy analysis, etc. However, when those algorithms are carried out on hardware devices, some crucial physical information may leak during the encryption or decryption processes. Feistel chaotic block cryptosystem has been proposed recently and is used for the block ciphers in different applications such as Internet-of-Things. In this work, the security of a Feistel chaotic block cryptographic algorithm is investigated by using Correlation Power Analysis (CPA) when the cryptographic system is in the process of performing encryption. Especially, the cryptosystem is implemented on an Atmel XMEGA128D4 micro controller. The attack points of Feistel chaos-based block encryption algorithm and power mapping model are analyzed in detail, and the procedure of utilizing CPA is given to cryptanalyze its hardware security. In theory, Multiple Samples Correlation Power Analysis (MSCPA) has a higher correct key differentiating level than CPA. However, in practice, if the correct key cannot be recovered by using CPA, the interesting sample points of power trace cannot be found for MSCPA. Experimental results show that the CPA can successfully obtain the secret key of Feistel cryptosystems and interesting sample points of power trace can be found, which laid a foundation of MSCPA to combine multiple samples of power trace. Further, the CPA can hit 100% success rate within [Formula: see text]50 power traces. Overall, this work can help efficiently evaluate the hardware security of Feistel chaotic block cryptosystem.