Second-harmonic Voltage Research Articles

Capacitor voltage balancing method for hybrid modular multilevel converters based on second-harmonic voltage injection

Capacitor voltage balancing method for hybrid modular multilevel converters based on second-harmonic voltage injection

Authors’ Response to Comments on “Investigation of a Class-J Mode Power Amplifier in Presence of a Second-Harmonic Voltage at the Gate Node of the Transistor”

Authors’ Response to Comments on “Investigation of a Class-J Mode Power Amplifier in Presence of a Second-Harmonic Voltage at the Gate Node of the Transistor”

Comments on “Investigation of a Class-J Mode Power Amplifier in Presence of a Second-Harmonic Voltage at the Gate Node of the Transistor”

Comments on “Investigation of a Class-J Mode Power Amplifier in Presence of a Second-Harmonic Voltage at the Gate Node of the Transistor”

A Second-Harmonic Suppression Method Based on Differentiated-Capacitance Design for Input-Parallel Output-Series DAB Fed Single-Phase VSI

In the single-phase voltage source inverter (VSI), the instantaneous output power pulsates at twice the line frequency, generating second-harmonic voltage in dc bus. Bulky electrolytic capacitors or additional auxiliary circuits are used in traditional methods, which inevitably limit the system lifetime, efficiency, and power density. In this article, the input-parallel output-series (IPOS) dual active bridge (DAB) with differentiated-capacitance design is adopted as the front-end dc–dc stage. The pulsating power is compensated by the energy gap that the differentiated output capacitors release. The small-signal model of the IPOS DAB fed VSI is built, and based on which, the voltage-complementary algorithm is proposed. Then, the preferred zone and optimization scheme of the main circuit parameters are designed according to the quantitative analysis of the suppressing effect. Furthermore, a 625-W IPOS DAB fed VSI design example is presented and tested. The experimental result shows that at least seven times the capacitance requirements can be reduced without any additional components, and the power quality of both the input current and the output voltage is well guaranteed.

Second-Harmonic Response in Magnetic Nodal-Line Semimetal Fe3GeTe2

We experimentally investigate second-harmonic transverse voltage response to ac electrical current for a magnetic nodal-line semimetal Fe3GeTe2 (FGT). For zero magnetic field, the observed second-harmonic voltage behaves as a square of the longitudinal current, as it should be expected for nonlinear Hall effect. The magnetic field behavior is found to be sophisticated: while the first-harmonic response shows the known anomalous Hall hysteresis in FGT, the second-harmonic Hall voltage is characterized by the pronounced high-field hysteresis and flat (B-independent) region with curves touching at low fields. The high-field hysteresis strongly depends on the magnetic field sweep rate, so it reflects some slow relaxation process. For the lowest rates, it is also accomplished by multiple crossing points. Similar shape of the second-harmonic hysteresis is known for skyrmion spin textures in nonlinear optics. Since skyrmions have been demonstrated for FGT by direct visualization techniques, we can connect the observed high-field relaxation with deformation of the skyrmion lattice. Thus, the second-harmonic Hall voltage response can be regarded as a tool to detect spin textures in transport experiments.

Enhancement of spin–orbit torques by change in uniaxial in-plane magnetic anisotropy of Py/Pt bilayers on single crystal 128° Y-Cut LiNbO3 substrate

We have investigated the correlations between the in-plane uniaxial magnetic anisotropy (Ku) and spin–orbit torque (SOT) of Ni80Fe20 (Py)/Pt thin films sputtered on a single-crystal 128° Y-Cut LiNbO3 (LNO) substrate by performing second-harmonic voltage measurements. The results show that the value of the damping-like (DL) SOT torque varies with the angle χ between Ku and the applied current and increases with χ from 0° to 90°. The effective spin Hall angle θSH, Pteff = 0.073 and 0.123 for χ = 0 and 90°, respectively, indicate a difference of approximately 1.7 times. The θSH,Pteff at χ = 90° is greater because the direction of the DL-SOT on the magnetization is the same as the Ku direction. This result implies that the effective spin Hall angle can be controlled by the Ku direction of the ferromagnetic metal layer induced on the LNO substrate, thereby providing valuable insight for the development of spin devices using SOT.

Second-Harmonic Voltage Response for the Magnetic Weyl Semimetal Co3Sn2S2

We experimentally investigate longitudinal and transverse second-harmonic voltage response to ac electrical current for a magnetic Weyl semimetal Co$_3$Sn$_2$S$_2$. In contrast to the previously observed Berry-curvature induced non-linear Hall effect for non-magnetic Weyl and Dirac semimetals, the second-harmonic transverse voltage demonstrates sophisticated interplay of different effects for Co$_3$Sn$_2$S$_2$. In high magnetic fields, it is of Seebeck-like square-B law, while the low-field behavior is found to be linear and sensitive to the direction of sample magnetization. The latter can be expected both for the non-linear Hall effect and for the surface state contribution to the Seebeck effect in Weyl semimetals. Thus, thermoelectric effects are significant in Co$_3$Sn$_2$S$_2$, unlike non-magnetic Weyl and Dirac materials.

A Tiny Complementary Oscillator With 1/f 3 Noise Reduction Using a Triple-8-Shaped Transformer

This letter presents a triple-8-shaped transformer-based complementary oscillator. It features tiny area, wide tuning range (TR), electromagnetic compatibility (EMC), and low flicker phase noise (PN), combining the merits of both $LC$ -tank and ring oscillators. We identify that after suppressing the second-harmonic voltage by the complementary operation itself, the third-harmonic current entering the capacitive path is now the main cause of asymmetry in the rising and falling edges, leading to the $1/f$ noise upconversion. By tuning the capacitance ratio between gate and drain nodes of the switching transistors, it mitigates the third-harmonic voltage and introduces a specific gate–drain phase shift, reducing the $1/f^{3}$ PN. Fabricated in 22-nm FDSOI CMOS, the prototype occupies an area of 0.01 mm2 and achieves $1/f^{3}$ PN corner of 70 kHz, PN of −110 dBc/Hz @1MHz and Figure-of-Merit (FoM) of −182 dB at 9 GHz, 39% TR, resulting in the best FoM with normalized TR and area (FoMTA) of −214 dB@1 MHz.

A Study of the Impacts Caused by Unbalanced Voltage (2%) in Isolated Synchronous Generators

This paper presents an analysis of the oscillations caused by unbalanced loads in salient pole synchronous generators that operate in isolation under steady state. The oscillatory disturbances, arising from the second-order harmonics, may have or have the potential to cause electromechanical damage to the salient pole synchronous generator. In this paper, the goal is to identify and quantify the magnitude of the electromagnetic torque, which assumes an oscillatory form due to the current component from the negative sequence, caused by unbalanced currents. The self-same analysis was included for second-harmonic voltage oscillations in the qd0 domain, the currents induced on the damper windings together with the oscillation of the load angle and on the field current. These oscillations situated on the synchronous generator are analyzed for a degree of voltage unbalance close to 2% which is an acceptable value according to international regulations for power supply from distribution networks, and this same degree of tolerated voltage unbalance will be used herein for isolated synchronous generators.

Comments on “Investigation of a Class-J Mode Power Amplifier in Presence of a Second-Harmonic Voltage at the Gate Node of the Transistor”

In the above paper, the authors present theoretical formulations for the optimum load impedances, output power, and drain efficiency of class-J mode power amplifiers when a second-harmonic voltage component is added to the input node of the device. It is shown that the inclusion of a proper second-harmonic voltage at the gate node of the transistor improves the drain efficiency and output power. However, some errors have been found, which may affect the readers’ understanding. The reason why will be indicated in this letter.

Authors’ Reply to “Comments on ‘Investigation of a Class-J Mode PA in Presence of a Second-Harmonic Voltage at the Gate Node of the Transistor”’

The authors appreciate the comments made by Liu and Zhang [1] that indicate issues in the above paper [2] .

Improved Design and Control of FBSM MMC With Boosted AC Voltage and Reduced DC Capacitance

Reducing the capacitance of submodules (SM) and handling short-circuit faults in HVdc systems are crucial for economical and reliable operation of modular multilevel converters (MMC). This paper proposes an SM capacitance reduction method for full-bridge submodule (FBSM)-MMC, which combines circulating current injection and ac voltage boosting. An optimized circulating current control method considering the limitation of fixed semiconductor current rating is introduced. By adding second-harmonic voltage to the reference arm voltage, the capacitor voltage ripple can be controlled to be a targeted value under all operating conditions. To further decrease the SM capacitor voltage ripples, the negative voltage state of FBSM is fully utilized to boost the ac voltage under fixed dc voltage with the modulation index up to 1.414. Consequently, the capacitance requirement for ac voltage boosting FBSM-MMC can be significantly reduced as compared to the conventional FBSM-MMC. Experimental results confirm the feasibility and validity of the proposed SM capacitance reduction method.

Investigation of a Class-J Mode Power Amplifier in Presence of a Second-Harmonic Voltage at the Gate Node of the Transistor

In this paper, performance of class-J mode power amplifiers (PAs) is studied when a second-harmonic voltage component is added to the input node of the device. Theoretical formulations for the optimum load impedances, output power, and drain efficiency are developed for this case, and it is shown that the inclusion of a proper second-harmonic voltage at the gate node of the transistor improves the drain efficiency and output power. To check the accuracy of the theoretical analyses and the simulation results, a proof-of-concept 1-GHz 0.65-W class-J PA is fabricated in a 0.25- $\mu \text{m}$ AlGaAs-InGaAs pHEMT technology. The nonlinear gate-source capacitor ( $C_{\mathrm{ GS}}$ ) of the transistor is employed to generate the required second-harmonic voltage at the gate node. With chip dimensions of 1.57 $\times$ 1.0 mm2, the designed PA achieves a 62% power added efficiency and an 18 dB small-signal gain at 1 GHz frequency.

A Modified Reference of an Intermediate Bus Capacitor Voltage-Based Second-Harmonic Current Reduction Method for a Standalone Photovoltaic Power System

A typical configuration of a standalone photovoltaic power system consists of PV arrays, storage units, a front-end dc–dc converter, a bidirectional dc–dc converter, and a dc–ac inverter. This paper addresses the second-harmonic current (SHC) issue in the front-end dc–dc converter and the bidirectional dc–dc converter when they regulate the intermediate dc bus voltage for the downstream single-phase inverter. The propagations of SHC under different operation modes of the power system are studied, based on which, a method that could make the intermediate bus capacitor fully provide the SHC induced by the dc–ac inverter is proposed. In the proposed method, a modified reference of the intermediate bus capacitor voltage is obtained by adding the desired second-harmonic voltage fluctuation to the original dc voltage reference. By the means of letting the control loop of the dc–dc converter track the modified reference of the intermediate bus voltage, the SHC in the dc–dc converter is well suppressed. The proposed method is easy to be applied in each operation mode of the power system, and it is proved to have the advantage of suppressing the SHC effectively without sacrificing the dynamic performance of the dc–dc converters. The SHC suppressing mechanism of the proposed method is analyzed from the viewpoint of output impedance and a proportional-integral-resonant controller is employed to further enhance the SHC suppressing ability. Finally, a 6-kW photovoltaic power system is built in the laboratory, and the experimental results verify the effectiveness of the proposed method.

First- and second-harmonic detection of spin accumulation in a multiterminal lateral spin valve under high-bias ac current

We have investigated the transport properties of electrically and thermally excited spin currents in a lateral spin valve consisting of a spin injector and detector with a middle ferromagnetic wire by detecting the first- and second-harmonic voltages. The first-harmonic spin signal was significantly suppressed by the middle ferromagnetic wire because of the spin absorption effect. On the other hand, in the second-harmonic signal, a small signal related to the middle ferromagnetic wire was observed in addition to a conventional spin signal with a reduced magnitude. This indicates that the additional ferromagnetic wire acts not only as the spin absorber but also as another spin injector under thermal spin injection, because the heat current caused by direct spin injection propagates to the middle ferromagnetic wire and creates another temperature gradient. By using this effect, we show that the magnetization direction of a ferromagnetic nanodot embedded in a nonmagnetic Cu wire becomes measurable.

Detection of Vortex Core Oscillation Using Second-Harmonic Voltage Detection Technique

A sensitive and reliable detection method for magnetic vortex core dynamics at the remanent state has been demonstrated. Perfectly symmetric potential created in a circular-shaped disk produces twofold symmetry in the position dependence of the resistance of the ferromagnetic disk. We find that the detectable second-harmonic voltage can be induced by flowing the dc current when the circular-shaped core oscillation is excited by the microwave magnetic field. The consistent features have been observed in the current dependence and field dependence of the signals, indicating that the present method is a powerful technique to characterize the core dynamics, even at the remanent state.

Modeling, Impedance Design, and Efficiency Analysis of Quasi- <inline-formula> <tex-math notation="TeX">$Z$</tex-math></inline-formula> Source Module in Cascaded Multilevel Photovoltaic Power System

The quasi-Z source (qZS) cascaded multilevel inverter (CMI) (qZS-CMI) presents attractive advantages in application to photovoltaic (PV) power system. Each PV panel connects to an H-bridge qZS inverter (qZSI) to form a power generation module. The distributed maximum power point tracking and all modules' dc-link peak voltage balance can be achieved. However, it is the same with the conventional CMI that the second-harmonic (2ω) voltage and current ripples exist in each qZSI module. It is crucial for a qZS-CMI to design the reasonable qZS network parameters to limit the ripples within a desired range. This paper proposes an analytic model to accurately calculate the 2ω voltage and current ripples of each qZSI module. A qZS impedance design method based on the built model is proposed to limit the 2ω ripples of dc-link voltage and inductor current. Simulated and experimental results through using the designed 1.5-kW prototype validate the proposed analytic model and the design method. Furthermore, this paper analyzes all of the operating states for a qZSI module and calculates the power loss. The measured efficiency from the prototype verifies the theoretical calculation, and the qZS-CMI-based grid-tie PV power system is tested in practical.

Switching Behavior of Class-E Power Amplifier and Its Operation Above Maximum Frequency

The switching behavior of Class-E power amplifiers (PAs) is described. Although the zero voltage switching can be performed properly, the <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">out</sub> charging process at the switch-off transition cannot be abrupt and the waveform deviates from the ideal shape, degrading the efficiency. For the operation above maximum frequency, the charging process should be even faster but it cannot follow. Moreover, the discharging process is not sufficiently fast and further degrades the efficiency. The discharging process is assisted by the bifurcated current at saturation. The performance of the Class-E PA above the maximum frequency is enhanced by the nonlinear <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">out</sub> , which helps to shape the voltage waveform. The bifurcated current itself cannot generate enough of a second-harmonic voltage component to shape the required voltage waveform. The performance of the Class-E PA can be further improved by a second-harmonic tuning and a conjugate matched output load, leading to the saturated PA. Compared with the Class-E PA, the saturated amplifier delivers higher output power and efficiency. A highly efficient saturated amplifier is designed using a Cree GaN HEMT CGH40010 device at 3.5 GHz. It provides a drain efficiency of 75.8% at a saturated power of 40.2 dBm (10.5 W).

A second-harmonic LC-quadrature voltage controlled oscillator with direct connection of MOSFETs’ substrate

This work introduces a new low noise second-harmonic quadrature voltage controlled oscillator (QVCO) made by coupling two identical cross-connected LC voltage controlled oscillators. In each of the core oscillators the substrate nodes of the MOS varactors, and also the substrate nodes of the cross-connected MOSFETs are configured in such a way that they act as common mode nodes. Then the core oscillators are coupled together via direct connection of the substrates of the MOS varactors in one of the core oscillators to the substrates of the cross-connected MOSFETs in the other core oscillator, and vice versa. No extra elements are used for coupling of the two core oscillators and therefore no extra noise sources are imposed on the circuit. Operation of the proposed QVCO was investigated with simulation using a commercial 0.18 μm RF CMOS technology: it shows a power dissipation of 9.7 mW from a 1.8 V supply voltage and a simulated phase noise of ?125.5 dBc/Hz at 1 MHz offset from center oscillation frequency of 5 GHz. Since the tail transistor can be eliminated, the proposed QVCO can operate with supply voltages as low as 0.5 V, as confirmed with simulation.

CMOS second-harmonic quadrature voltage controlled oscillator using substrate for coupling

In this work, a new circuit configuration for second-harmonic quadrature voltage controlled oscillator (QVCO) with CMOS technology is proposed. The proposed QVCO is made by coupling two identical cross-connected VCOs. The coupling elements (two resistors and two capacitors) do not increase the power consumption of the core VCOs and do not disturb the resonant frequency of the tank circuit in the core VCOs and also, according to the simulations the coupling elements do not adversely affect the phase noise. The role of the substrate terminal of cross-connected MOSFETs of the core oscillators as common mode nodes is demonstrated. Using this node for coupling makes it possible to eliminate the tail transistors in the core oscillators and therefore the circuit can operate with supply voltages as low as 0.5 V. Using the same method to couple more than two core oscillators, results in a multiphase VCO.