Performance Of Schottky Diodes Research Articles

Wafer‐scale epitaxial lift‐off of GaN using bandgap‐selective photoenhanced wet etching

An epitaxial lift‐off (ELO) process for GaN materials has been demonstrated using bandgap‐selective photoenhanced wet etching of an InGaN release layer. This process has been applied to GaN layers grown on sapphire as well as native GaN substrates using a perforation technique to scale the process up to wafers of arbitrary size. The process has the advantage of leveraging conventional MOCVD growth to form the release layer, with minimal degradation of films grown on top of the release layer. The ELO process is non‐destructive and can enable cost reduction through reuse of the native GaN substrate after ELO. The GaN films have been characterized before and after ELO using AFM, SEM, XRD, TEM and by fabricating Schottky barrier diodes. The performance of Schottky diodes fabricated on GaN‐on‐sapphire structures was found to improve after ELO. Potential applications for this technology include GaN power and optoelectronic devices as well as flexible electronics. Shown is a 5‐micron‐thick GaN epitaxial film released from a 4‐inch sapphire substrate using perforations on a 1‐mm pitch. The yellow luminescence of the nitrogen face of the released film is visible under ultraviolet illumination.

Thin-film GaN Schottky diodes formed by epitaxial lift-off

The performance of thin-film GaN Schottky diodes fabricated using a large-area epitaxial lift-off (ELO) process is reported in this work. Comparison of the device characteristics before and after lift-off processing reveals that the Schottky barrier height remains unchanged by the liftoff processing and is consistent with expectations based on metal-semiconductor work function differences, with a barrier height of approximately 1 eV obtained for Ni/Au contacts on n− GaN. However, the leakage current in both reverse and low-forward-bias regimes is found to improve significantly after ELO processing. Likewise, the ideality factor of the Schottky diodes also improves after ELO processing, decreasing from n = 1.12–1.18 before ELO to n = 1.04–1.10 after ELO. A possible explanation for the performance improvement obtained for Schottky diodes after substrate removal by ELO processing is the elimination of leakage paths consisting of vertical leakage along threading dislocations coupled with lateral conduction through the underlying n+ buffer layer that is removed in the ELO process. Epitaxial liftoff with GaN may enable significant improvement in device performance and economics for GaN-based electronics and optoelectronics.

Cd1 − xS:B/CuInSe2 interface of thin film solar cells improved with iodine passivation

This study revealed the band gap, visible transmittance, and crystallinity variation Cd1−x S:B emitter layer at different boron concentrations, as well as the CuInSe2 absorption layer nucleation mechanism at pH values ranging from 1.53 to 2.13. CuInSe2 deposited at a pH of 1.73 showed the highest grain size (24.29nm) and approached the stoichiometric state of [Cu]/[In]=0.98, which produced was used for solar cells and Schottky diode. The conversion efficiency of Al/AZO/Cd1−xS:B/CuInSe2/Mo/Glass structure cell was 2.37% (Voc: 293mV, Jsc: 26.85mA/cm2, and FF: 0.301). Moreover, the aluminum material were deposited on CuInSe2 as a Schottky diode (Al/CuInSe2/Mo/Glass), which diode was used to estimate the work function (Φ) and ideality factor (n) through Schottky barrier. These device parameters of Al/CuInSe2 structure was ΦCuInSe2=4.791eV and n=3.52, respectively. This result revealed that the Cd1−xS:B/CuInSe2 interface state can cause Fermi-level pinning with an interface recombination velocity of 2.328×103cms−1. This indicates the poor performance of Schottky diodes and thin film solar cells comprising Cd1−xS:B/CuInSe2. However, experimental results demonstrated that the passivation of the surface by using iodine treatment can improve the Fermi-level pinning effect on Cd1−xS:B/CuInSe2 interfaces.

Frequency and voltage dependence of electric and dielectric properties of Au/TiO2/n-4H-SiC (metal-insulator-semiconductor) type Schottky barrier diodes

The main electrical and dielectric properties of Au/TiO2/n-4H-SiC (MIS) type Schottky barrier diodes (SBDs) have been investigated as functions of frequency and applied bias voltage. We believe that the use of high dielectric interfacial layer between metal and semiconductor can improve the performance of Schottky diodes. From the experimental data, both electrical and dielectric parameters were found as strong function of frequency and applied bias voltage. The Fermi energy level (EF), the concentration of doping donor atoms (P), barrier height (ΦB) and series resistance (Rs) values were obtained from reverse and forward bias C–V characteristics. The changes in EF and ND with frequency are considerably low. Therefore, their values were taken at about constant. The real and imaginary parts of dielectric constant ( ), tangent loss (tanδ), ac electrical conductivity (σac), and real and imaginary parts of electric modulus (M′ and M″) values were also obtained from reverse and forward bias C–V and G/ω-V characteristics. In addition, the voltage dependent profiles of all these electrical and dielectric parameters were drawn for each frequency. These results confirmed that both electrical and dielectric properties of Au/TiO2/n-4H-SiC (MIS) type SBD are quite sensitive to both the frequency and applied bias voltage due to surface polarization, density distribution of interface traps (Dit), and interfacial layer.

Vertically grown Ge nanowire Schottky diodes on Si and Ge substrates

The processing and performance of Schottky diodes formed from arrays of vertical Ge nanowires (NWs) grown on Ge and Si substrates are reported. The goal of this work is to investigate CMOS compatible processes for integrating NWs as components of vertically scaled integrated circuits, and elucidate transport in vertical Schottky NWs. Vertical phosphorus (P) doped Ge NWs were grown using vapor-liquid-solid epitaxy, and nickel (Ni)-Ge Schottky contacts were made to the tops of the NWs. Current-voltage (I-V) characteristics were measured for variable ranges of NW diameters and numbers of nanowires in the arrays, and the I-V characteristics were fit using modified thermionic emission theory to extract the barrier height and ideality factor. As grown NWs did not show rectifying behavior due to the presence of heavy P side-wall doping during growth, resulting in a tunnel contact. After sidewall etching using a dilute peroxide solution, rectifying behavior was obtained. Schottky barrier heights of 0.3–0.4 V and ideality factors close to 2 were extracted using thermionic emission theory, although the model does not give an accurate fit across the whole bias range. Attempts to account for enhanced side-wall conduction due to non-uniform P doping profile during growth through a simple shunt resistance improve the fit, but are still insufficient to provide a good fit. Full three-dimensional numerical modeling using Silvaco Atlas indicates that at least part of this effect is due to the presence of fixed charge and acceptor like traps on the NW surface, which leads to effectively high ideality factors.

Si and Mg pair-doped interlayers for improving performance of AlGaN/GaN heterostructure field effect transistors grown on Si substrate**Project supported by the National Natural Science Foundation of China (Grant Nos. 51177175 and 61274039), the National Basic Research Project of China (Grant Nos. 2010CB923200 and 2011CB301903), the Ph.D. Program Foundation of Ministry of Education of China (Grant No. 20110171110021), the International Sci.

We report a novel structure of AlGaN/GaN heterostructure field effect transistors (HFETs) with a Si and Mg pair-doped interlayer grown on Si substrate. By optimizing the doping concentrations of the pair-doped interlayers, the mobility of 2DEG increases by twice for the conventional structure under 5 K due to the improved crystalline quality of the conduction channel. The proposed HFET shows a four orders lower off-state leakage current, resulting in a much higher on/off ratio (∼ 109). Further temperature-dependent performance of Schottky diodes revealed that the inhibition of shallow surface traps in proposed HFETs should be the main reason for the suppression of leakage current.

不同封装方式对肖特基二极管高频性能的影响

不同封装方式对肖特基二极管高频性能的影响

Optical and Schottky diode performance of Au/4-hydroxy Coumarin/ITO heterojunction

The current–voltage (I–V), micro-Raman and various optical properties of 4-hydroxy coumarin Schottky diode were studied. From its optical study, the optical band gap (Eg), transport band gap, binding energy and Urbach energy were found to be around 3.5eV, 3.72eV, 0.28eV and 327meV respectively. The given compound was following an indirect allowed transition. Photoluminescence of the current compound shows a various emission bands in UV region. From micro-Raman study, different modes related with the current structure were obtained and discussed. Some basic techniques related with device were carried out to find out different diode parameters. The observed properties shown by this molecule indicates its possible application for modern organic devices.

Schottky diode performance of an Au/Pd/GaAs device fabricated by deposition of monodisperse palladium nanoparticles over a p-type GaAs substrate

Au/Pd/p-GaAs Schottky diodes were fabricated by simple assembly of monodisperse Pd nanoparticles on a p-type GaAs semiconductor. Monodisperse 5-nm Pd nanoparticles were synthesized via reduction of palladium(II) acetylacetonate in oleylamine using a borane tert-butylamine complex. The Au/Pd/p-GaAs Schottky diodes provided a barrier height of 0.68eV, which is higher than room-temperature values reported in the literature. A double distribution was observed for the barrier height for the Schottky diodes from I–V–T measurements. A decrease in temperature lowered the zero-bias barrier height and increased the ideality factor. These observations were ascribed to barrier height inhomogeneities at the interface that altered the barrier height distribution. Values of the series resistance obtained by the Norde method decreased with increasing temperature. Understanding the temperature dependence of the current–voltage characteristics of Au/Pd/p-GaAs devices might be helpful in improving the quality of Pd deposited on GaAs for future device technologies.

Temperature Dependent DC and RF Performance of n-GaN Schottky Diode: A Numerical Approach

This paper reports the temperature dependent DC and RF characteristics of n-GaN Schottky diode simulated using Atlas/Blaze developed by Silvaco. It was found that as the temperature increases from 300K to 900K the forward current decreases due to lowering of the Schottky barrier with an increase in series-resistance and ideality factor. These observations indicates that tunneling behavior dominates the current flow rather than thermionic emission. Furthermore, the breakdown voltage decreases in reverse bias and insertion loss for RF behavior increases with respect to temperature due to the increase in capacitance near diode junction.Keywords: Atlas/Blaze, Schottky barrier, series resistance, ideality factor, insertion loss.

Analysis of junction properties of gold–zinc oxide nanorods-based Schottky diode by means of frequency dependent electrical characterization on textile

Present work is an effort to reveal the junction properties of gold/zinc oxide (ZnO) nanorods-based Schottky diode by using the frequency dependent electrical properties. The most important electrical parameters such as conductance, resistance, capacitance, and impedance were studied as function of frequency across the series of AC voltages. Moreover, current density–voltage (J–V) was measured to know the performance of present Schottky diode. The effect of native defects was also studied by using cathodoluminescence spectroscopy measured at different accelerating voltage. The textile substrate was used for the growth of ZnO nanorods by using the aqueous chemical growth method and Schottky diode fabrication. Diode fabrication on textile fabric is a step forward toward the fabrication of electronic devices on nonconventional, economical, soft, light weight, flexible, wearable, washable, recyclable, reproducible, and nontoxic substrate.

Enhancement in performance of polycarbazole-graphene nanocomposite Schottky diode

We report formation of polycarbazole (PCz)–graphene nanocomposite over indium tin oxide (ITO) coated glass substrate using electrochemical technique for fabrication of high performance Schottky diodes. The synthesized nanocomposite is characterized before fabrication of devices for confirmation of uniform distribution of graphene nanosheets in the polymer matrix. Pure PCz and PCz-graphene nanocomposites based Schottky diodes are fabricated of configuration Al/PCz/ITO and Al/PCz-graphene nanocomposite/ITO, respectively. The current density–voltage (J-V) characteristics and diode performance parameters (such as the ideality factor, barrier height, and reverse saturation current density) are compared under ambient condition. Al/PCz-graphene nanocomposite/ITO device exhibits better ideality factor in comparison to the device formed using pure PCz. It is also observed that the Al/PCz-graphene nanocomposite/ITO device shows large forward current density and low turn on voltage in comparison to Al/PCz/ITO device.

Scaling of GaN HEMTs and Schottky Diodes for Submillimeter-Wave MMIC Applications

In this paper, we report state-of-the-art high frequency performance of GaN-based high electron mobility transistors (HEMTs) and Schottky diodes achieved through innovative device scaling technologies such as vertically scaled enhancement and depletion mode (E/D mode) AlN/GaN/AlGaN double-heterojunction HEMT epitaxial structures, a low-resistance <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">$n^{+}$</tex></formula> -GaN/2DEG ohmic contact regrown by MBE, a manufacturable 20-nm symmetric and asymmetric self-aligned-gate process, and a lateral metal/2DEG Schottky contact. As a result of proportional scaling of intrinsic and parasitic delays, an ultrahigh <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$f_{T}$</tex></formula> exceeding 450 GHz (with a simultaneous <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$f_{\rm max}$</tex></formula> of 440 GHz) and a <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$f_{\rm max}$</tex></formula> close to 600 GHz (with a simultaneous <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$f_{T}$</tex></formula> of 310 GHz) are obtained in deeply scaled GaN HEMTs while maintaining superior Johnson figure of merit. Because of their extremely low on-resistance and high gain at low drain voltages, the devices exhibited excellent noise performance at low power. 501-stage direct-coupled field-effect transistor logic ring oscillator circuits are successfully fabricated with high yield and high uniformity, demonstrating the feasibility of GaN-based E/D-mode integrated circuits with <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${&gt;}{1000}$</tex> </formula> transistors. Furthermore, self-aligned GaN Schottky diodes with a lateral metal/2DEG Schottky contact and a 2DEG/ <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$n^{+}$</tex></formula> -GaN ohmic contact exhibited <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$RC$</tex></formula> -limited cutoff frequencies of up to 2.0 THz.

Degradation of pentacene deposited on gold, aluminum and parylene surfaces: Impact of pentacene thickness

In this work, the impact of film thickness in thermally evaporated pentacene thin films and metal electrodes is studied. In particular, we report electrical performance and stability of un-encapsulated organic Schottky diodes. The chemical composition, surface morphology and ambient stability of the resulting films were also studied. The electrical measurements were carried out in vertical Schottky diodes and its performance and stability was evaluated as function of shelf life time. Oxygen was detected at the pentacene surface. This oxygen is the main cause of the diode degradation and attributed to diffusion of oxygen into the bulk of the pentacene films. Thicker pentacene films resulted in more stable for Schottky diodes.

Performance of Hybrid 4.5 kV SiC JBS Freewheeling Diode and Si IGBT

The performance of Junction Barrier Schottky (JBS) diodes developed for medium voltage hard-switched Naval power conversion is reported. Nominally 60 A, 4.5kV rated JBS freewheeling diodes were paired with similarly rated Si IGBTs and evaluated for temperature dependent static and dynamic characteristics as well as HTRB and surge capability. The SiC JBS/Si IGBT pair was also directly compared to Si PiN diode/Si IGBT with similar ratings. Compared to Si, the SiC freewheeling diode produced over twenty times lower reverse recovery charge leading to approximately a factor-of-four-reduction in turn-on loss. Alternatively, for equivalent total switching loss, the SiC JBS/Si IGBT hybrid configuration allows for at least a 50% increase in specific switched power density. Reliability testing showed the devices to be robust with zero failures.

Temperature-Dependent Characteristics of SiC Devices: Performance Evaluation and Loss Calculation

Silicon Carbide (SiC) devices have obvious advantages compared with conventional Si devices, and especially so at high temperatures. This paper aims at developing a method for the characterization of SiC JFET conduction and switching losses at high temperatures as well as the calculation of semiconductor losses in SiC JFET-based converters. To this end, the steady-state performance of SiC JFET and Schottky diodes at different temperatures is studied, and an improved conduction loss evaluation is proposed considering the bidirectional conduction paths of the JFET. Specifically, a SiC JFET bridge test bed is built to measure the switching losses at different temperatures with and without antiparallel diodes, where experimental results show that using SiC Schottky diodes in antiparallel eliminates the reverse recovery of the JFET body diode, improving the switching behavior and reducing the losses of the devices. Further, these test results are used to estimate the losses of a 10-kW ac–dc–ac converter, which shows that the use of Schottky diodes as freewheeling devices helps reduce both conduction and switching losses, presenting an even greater reduction at higher operating temperatures.

Characterization and performance of Schottky diode based on wide band gap semiconductor ZnO using a low-cost and simplified sol–gel spin coating technique

In this study, a Schottky diode based on wide band gap semiconductor ZnO was fabricated on p-type Si substrate using sol–gel spin coating method. Al/ZnO/p-Si diode indicates a rectification behavior. At lower voltages, the forward current of the diode was found to obey the intrinsic thermally generated charge carriers and at relatively higher voltages, the current mechanism of the diode is controlled by a space charge limited conduction mechanism. Under reverse bias conditions, the current–voltage characteristics of the diode exhibit the lower current as compared under forward bias, indicating the existence of a current limitation mechanism induced by two field lowering mechanisms which are Poole–Frenkel and Schottky mechanisms. The parameters, series resistance R S, the ideality factor n and the barrier height φ B0 of the diode were determined by performing different plots obtained from the experimental forward bias current–voltage. The capacitance measurements show that the values of capacitance were almost independent of the forward bias under various frequencies. The higher values of the capacitance at low frequencies were attributed to the excess capacitance resulting from the interface states in equilibrium with the ZnO.

Zinc Oxide-Based Schottky Diode Prepared Using Radio-Frequency Magnetron Cosputtering System

The rectifying property of a zinc oxide (ZnO)-based Schottky diode prepared using a radio-frequency (rf) magnetron cosputtering system was improved by enhancing the cosputtered ZnO crystal quality, thereby optimizing the ohmic contact resistance and compensating the Schottky contact surface states. An undoped ZnO layer with a high c-axis orientation and a low internal residual stress was achieved using a postannealing treatment. A homogeneous n-type ZnO–indium tin oxide (ITO) cosputtered film was deposited onto the undoped ZnO layer to optimize the ohmic contact behavior to the Al electrode. The Schottky contact surface of the undoped ZnO layer to the Ni/Au electrode was passivated using an oxygen plasma treatment. Owing to the compensation of the native oxygen vacancies (VO) on the undoped ZnO surface, the leakage current markedly decreased and subsequently led to a quality Schottky diode performance with an ideality factor of 1.23 and a Schottky barrier height of 0.82 eV.

Schottky metal-GaN interface KOH pretreatment for improved device performance

The effect of KOH pretreatment for Au/Ni Schottky contacts to GaN is investigated using I-V and x-ray photoemission spectroscopy (XPS) analysis. The molten KOH pretreatment reduces the interface trap density from 1.0×1012 to 2×1011 cm−2 eV−1, improves the on-state performance, and increases the barrier height by 10%. XPS indicates that KOH improves the GaN Schottky diode performance by eliminating an oxide layer between the metal and the semiconductor, increasing the band bending through charge transfer, and improving the GaN stoichiometry at the surface. First principle simulations indicate that the nitrogen antisite and to a minor extent the gallium antisite are also possible constituents of this interfacial layer along with gallium and nitrogen vacancies. These antisite defects can be passivated by KOH.

Large area Schottky diodes of ZnO films fabricated on platinum layer by pulsed-laser deposition

Large area Schottky diode with novel inverted vertical metal–semiconductor–metal type of structure (Pt/Ti/ZnO/Pt/SiO2/Si) was demonstrated. The effects of crystallinity and native defects of ZnO films on the performance of Schottky diodes were investigated. Through oxygen plasma and post-annealing, the barrier height of Schottky diodes was dramatically enhanced, and the reverse leakage current was reduced by over six orders of magnitude. The obtained Schottky diodes with best performance of Schottky rectification exhibit the barrier height of 0.88 eV, and low reverse leakage current of 4.25 × 10−8 A cm−2 under reverse bias voltage of −2 V. The novel structure was promising for the application of high performance opt-electrical devices.