Loop Scheduling Research Articles

Estimation of Correlated Gaussian Samples in Impulsive Noise

We consider the estimation of correlated Gaussian samples in (correlated) impulsive noise, through message-passing algorithms. The factor graph includes cycles and, due to the mixture of Gaussian (samples and noise) and Bernoulli variables (the impulsive noise switches), the complexity of messages increases exponentially. We first analyze a simple but suboptimal solution, called Parallel Iterative Scheduling. Then we implement both Expectation Propagation — for which numerical stability must be addressed — and a simple variation thereof (called Transparent Propagation) that is inherently stable and simplifies the overall computation. Both algorithms reach a performance close to ideal, practically coinciding with the lower bound on the mean square estimation error.

GenASiSBasics: Object-oriented utilitarian functionality for large-scale physics simulations (Version 3)

GenASiS Basics provides Fortran 2003 classes furnishing extensible object-oriented utilitarian functionality for large-scale physics simulations on distributed memory supercomputers. This functionality includes physical units and constants; display to the screen or standard output device; message passing; I/O to disk; and runtime parameter management and usage statistics. This revision---Version 3 of Basics---includes a significant name change, some minor additions to functionality, and a major addition to functionality: infrastructure facilitating the offloading of computational kernels to devices such as GPUs.

Foreword to the special issue of the workshop on high performance computing systems (XVIII Simpósio em Sistemas Computacionais de Alto Desempenho, WSCAD 2017)

Foreword to the special issue of the workshop on high performance computing systems (XVIII Simpósio em Sistemas Computacionais de Alto Desempenho, WSCAD 2017)

Preliminary RAMI assessment for HCPB and HCLL ITER test blanket module ancillary systems

A RAMI (Reliability, Availability, Maintainability and Inspectability) assessment performed on the ITER Test Blanket Module (TBM) ancillary systems is presented. The assessment is aimed at evaluating design that may jeopardize the achievement of the overall 75% availability requirements for the TBM plant breakdown structure. The ancillary systems of the European Test Blanket Modules to be operated in ITER that have been analyzed in this assessment are the helium cooling systems (HCSs) of both the Helium Cooled Lithium Lead (HCLL) and Helium Cooled Pebble Bed (HCPB), the lithium-lead loop of the HCLL TBM and the Tritium Extraction System (TES) of the HCPB TBM. RAMI performance was assessed by means of reliability block diagrams (RBDs) over a foreseen mission of 20 years, with operating cycles reflecting ITER schedule. In particular, a set of events leading to unavailability of the systems was initially defined by means of a failure mode and effect analysis. Then RBDs were implemented according to reliability-wise integration of the components included in such systems. Different RBDs were defined depending on the component being judged to impact normal operation or start-up operation mode. Systems analysis was performed exploiting a modular approach in order to elicit the relative contribution to overall availability so to support possible design improvement by highlighting critical sub-systems. In particular the unavailability of cooling, tritium extraction and trapping functions were assessed separately for HCLL and HCPB concepts. Finally the integrated impact of all ancillary systems on overall tokamak operational availability was estimated and the assessed systems, considering the current preliminary level of design development, appear able to meet the expected performance.

A comprehensive performance evaluation of the BinLPT workload‐aware loop scheduler

SummaryWorkload‐aware loop schedulers were introduced to deliver better performance than classical loop scheduling strategies. However, they presented limitations such as inflexible built‐in workload estimators and suboptimal chunk scheduling. Targeting these challenges, we proposed previously a workload‐aware scheduling strategy called BinLPT, which relies on three features: (i) user‐supplied estimations of the workload of the loop; (ii) a greedy heuristic that adaptively partitions the iteration space in several chunks; and (iii) a scheduling scheme based on the Longest Processing Time (LPT) rule and on‐demand technique. In this paper, we present two new contributions to the state‐of‐the‐art. First, we introduce a multiloop support feature to BinLPT, which enables the reuse of estimations across loops. Based on this feature, we integrated BinLPT into a real‐world elastodynamics application, and we evaluated it running on a supercomputer. Second, we present an evaluation of BinLPT using simulations as well as synthetic and application kernels. We carried out this analysis on a large‐scale NUMA machine under a variety of workloads. Our results revealed that BinLPT is better at balancing the workloads of the loop iterations and this behavior improves as the algorithmic complexity of the loop increases. Overall, BinLPT delivers up to 37.15% and 9.11% better performance than well‐known loop scheduling strategies, for the application kernels and the elastodynamics simulation, respectively.

A new heuristic scheduling method for the make-pack-route problem in make-to-order supply chains

To cater to the growing personalized need of customers, increasingly more make-to-order distribution centers consider a two-phase production (i.e. raw material granulation and order packaging) process when making production and routing decisions, especially for time-sensitive commodities. In this article, we extend the production routing problem to the make-pack-route problem (MPRP) to devise production and routing schedules that allow for flexible order composition and ensure in-time delivery. To solve the MPRP, we propose an iterative sequential scheduling heuristic embedded with the local search, which sequentially solves the three corresponding scheduling problems and improves the overall schedule in an iterative manner. Our numerical studies verify that our method can solve practically meaningful instances (e.g. up to 200 orders and 30 items) in an acceptable time duration (i.e. 1 hour). Our studies show an average 11.6% reduction in the total processing cost compared to an ad hoc scheduling method commonly used in practice. Our studies also suggest that our solution method saves more costs with more orders, higher order variety and larger average commodity quantity and variety in each order.

The European roadmap towards fusion electricity.

The European roadmap to the realization of fusion electricity breaks the quest into eight missions. For each mission, it reviews the current status of research, identifies open issues, and proposes a research and development programme. ITER is the key facility on the roadmap as it is expected to achieve most of the important milestones on the path to fusion power. The Fusion Roadmap is tightly connected to the ITER schedule and the vast majority of resources in fusion research are presently dedicated to ITER and its accompanying experiments. Parallel to the ITER exploitation in the 2030s, the construction of the demonstration power plant DEMO needs to be prepared. DEMO will for the first time supply fusion electricity to the grid and it will have a self-sufficient fuel cycle. The design, construction and operation of DEMO require full involvement of industry to ensure that, after a successful DEMO operation, industry can take responsibility for commercial fusion power. The European fusion roadmap provides a coherent path towards the fusion power plant, and it proposes in an integrated way to find solutions for all challenges that still need to be addressed.This article is part of a discussion meeting issue ‘Fusion energy using tokamaks: can development be accelerated?’

Set Theory-Based Safety Supervisory Control for Wind Turbines to Ensure Adequate Frequency Response

Inadequate frequency response can arise due to a high penetration of wind turbine generators (WTGs) and requires a frequency support function to be integrated in the WTG. The appropriate design for these controllers to ensure adequate response has not been investigated thoroughly. In this paper, a safety supervisory control (SSC) is proposed to synthesize the supportive modes in WTGs to guarantee performance. The concept, region of safety (ROS), is stated for safe switching synthesis. An optimization formula is proposed to calculate the largest ROS. By assuming a polynomial structure, the problem can be solved by a sum of squares program. A feasible result will generate a polynomial, the zero sublevel set of which represents the ROS and is employed as the safety supervisor. A decentralized communication architecture is proposed for small-scale systems. Moreover, a scheduling loop is suggested so that the supervisor updates its boundary with respect to the renewable penetration level to be robust with respect to variations in system inertia. The proposed controller is first verified on a single-machine three-phase nonlinear microgrid, and then implemented on the IEEE 39-bus system. Both results indicate that the proposed framework and control configuration can guarantee adequate response without excessive conservativeness.

Energy-Aware Joint User Scheduling and Power Control for Two-Tier Femtocell Networks: A Hierarchical Game Approach

Femtocells are considered as promising technologies for the next generation wireless networks to improve system capacity and enhance indoor coverage. The dense deployment of femtocells brings a lot of challenges in terms of interference management and energy consumption. To alleviate co-channel interference, we investigate interference management based on hierarchically joint user scheduling and power control in downlink femtocell networks considering the impact of energy cost. Then, we formulate this problem as a Stackelberg game with one leader and multiple followers. Specifically, macro base station and femtocell base stations select their optimal scheduled users and determine the optimal transmission power, based on their own net utilities considering power cost. To obtain the Stackelberg equilibrium (SE) in a distributed manner, a hierarchical and iterative user scheduling and power update framework is proposed. Moreover, we prove that the optimization of user-scheduling and power control can be decoupled in our scheme and the proposed scheme converges to a unique SE under mild conditions. Simulation results are presented to show the convergence and effectiveness of the proposed hierarchical game.

Human performance on random interval schedules.

Four experiments explored the factors controlling human responding on random interval (RI) schedules of reinforcement. All experiments identified 2 types of responding: "bout-initiation" and "within-bout" responding. Responding on RI schedules was related to the interval value rates, being higher on an RI-30s than on an RI-60s or RI-120s schedule, which impacted bout-initiation responding to the greater degree (Experiments 1 and 3). Experiment 2 found similar overall response rates on random ratio (RR) and random interval with a linear feedback loop (RI+) schedules, with both higher than on an RI schedule. Bout-initiation rates were similar across all schedules, but within-bout responding differed. Experiments 3 and 4 examined the impact of a response cost and noted greater bout-initiation responding but not greater within-bout rates with low costs. Overall, these experiments suggest that bout-initiation responding may be subject to control by factors that increase the strength of conditioning to the context, whereas within-bout responding is less sensitive to these influences. (PsycINFO Database Record

Reducing the burden of parallel loop schedulers for many-core processors

This work proposes a low-overhead half-barrier pattern to schedule fine-grain parallel loops and considers its integration in the Intel OpenMP and Cilkplus schedulers. Experimental evaluation demonstrates that the scheduling overhead of our techniques is 43% lower than Intel OpenMP and 12.1x lower than Cilk. We observe 22% speedup on 48 threads, with a peak of 2.8x speedup.

Iterative Relay Scheduling With Hybrid ARQ Under Multiple User Equipment (Type II) Relay Environments

In this paper, we propose an iterative relay scheduling with hybrid ARQ (IRS-HARQ) scheme, which realizes fast jump-in/successive relaying and subframe-based decoding under the multiple user equipment (UE) relay environments applicable to the next-generation cellular systems (e.g., LTE-advanced and beyond). The proposed IRS-HARQ aims to increase the achievable data rate by iteratively scheduling a relatively better UE relay closer to the end user in a probabilistic sense, provided that the relay-to-end user link should be operated in an open-loop and transparent mode. The latter is due to the fact that not only there are no dedicated control channels between the UE relay and the end user, but also a new cell is not created. Under this open-loop and transparent mode, our proposed protocol is implemented by partially exploiting the channel state information based on the overhearing mechanism of acknowledge/negative acknowledge for HARQ. Further, the iterative scheduling enables UE-to-UE direct communication with proximity that offers spatial frequency reuse and energy saving.

Symbolic Multi-Level Loop Mapping of Loop Programs for Massively Parallel Processor Arrays

Today’s MPSoCs (multiprocessor systems-on-chip) have brought up massively parallel processor array accelerators that may achieve a high computational efficiency by exploiting multiple levels of parallelism and different memory hierarchies. Such parallel processor arrays are perfect targets, particularly for the acceleration of nested loop programs due to their regular and massively parallel nature. However, existing loop parallelization techniques are often unable to exploit multiple levels of parallelism and are either I/O or memory bounded. Furthermore, if the number of available processing elements becomes only known at runtime—as in adaptive systems—static approaches fail. In this article, we solve some of these problems by proposing a hybrid compile/runtime multi-level symbolic parallelization technique that is able to: (a) exploit multiple levels of parallelism as well as (b) different memory hierarchies, and (c) to match the I/O or memory capabilities of the target architecture for scenarios where the number of available processing elements is only known at runtime. Our proposed technique consists of two compile-time transformations: (a) symbolic hierarchical tiling followed by (b) symbolic multi-level scheduling. The tiling levels scheduled in parallel exploit different levels of parallelism, whereas the sequential one, different memory hierarchies. Furthermore, by tuning the size of the tiles on the individual levels, a tradeoff between the necessary I/O-bandwidth and memory is possible, which facilitates obeying resource constraints. The resulting schedules are symbolic with respect to the problem size and tile sizes. Thus, the number of processing elements to map onto does not need to be known at compile time. At runtime, when the number of available processors becomes known, a simple prologue chooses a feasible schedule with respect to I/O and memory constraints that is latency-optimal for the chosen tile size. In summary, our approach determines the set of feasible, latency-optimal symbolic loop schedule candidates at compile time, from which one is dynamically selected at runtime. This approach exploits multiple levels of parallelism, is independent of the problem size of the loop nest, and thereby avoids any expensive re-compilation at runtime. This is particularly important for low cost and memory-scarce embedded MPSoC platforms that may not afford to host a just-in-time compiler.

Scientific and technical challenges on the road towards fusion electricity

The goal of the European Fusion Roadmap is to deliver fusion electricity to the grid early in the second half of this century. It breaks the quest for fusion energy into eight missions, and for each of them it describes a research and development programme to address all the open technical gaps in physics and technology and estimates the required resources. It points out the needs to intensify industrial involvement and to seek all opportunities for collaboration outside Europe. The roadmap covers three periods: the short term, which runs parallel to the European Research Framework Programme Horizon 2020, the medium term and the long term. ITER is the key facility of the roadmap as it is expected to achieve most of the important milestones on the path to fusion power. Thus, the vast majority of present resources are dedicated to ITER and its accompanying experiments. The medium term is focussed on taking ITER into operation and bringing it to full power, as well as on preparing the construction of a demonstration power plant DEMO, which will for the first time demonstrate fusion electricity to the grid around the middle of this century. Building and operating DEMO is the subject of the last roadmap phase: the long term. Clearly, the Fusion Roadmap is tightly connected to the ITER schedule. Three key milestones are the first operation of ITER, the start of the DT operation in ITER and reaching the full performance at which the thermal fusion power is 10 times the power put in to the plasma. The Engineering Design Activity of DEMO needs to start a few years after the first ITER plasma, while the start of the construction phase will be a few years after ITER reaches full performance. In this way ITER can give viable input to the design and development of DEMO. Because the neutron fluence in DEMO will be much higher than in ITER, it is important to develop and validate materials that can handle these very high neutron loads. For the testing of the materials, a dedicated 14 MeV neutron source is needed. This DEMO Oriented Neutron Source (DONES) is therefore an important facility to support the fusion roadmap.

Iterative Schedule Optimization for Parallelization in the Polyhedron Model

The polyhedron model is a powerful model to identify and apply systematically loop transformations that improve data locality (e.g., via tiling) and enable parallelization. In the polyhedron model, a loop transformation is, essentially, represented as an affine function. Well-established algorithms for the discovery of promising transformations are based on performance models. These algorithms have the drawback of not being easily adaptable to the characteristics of a specific program or target hardware. An iterative search for promising loop transformations is more easily adaptable and can help to learn better models. We present an iterative optimization method in the polyhedron model that targets tiling and parallelization. The method enables either a sampling of the search space of legal loop transformations at random or a more directed search via a genetic algorithm. For the latter, we propose a set of novel, tailored reproduction operators. We evaluate our approach against existing iterative and model-driven optimization strategies. We compare the convergence rate of our genetic algorithm to that of random exploration. Our approach of iterative optimization outperforms existing optimization techniques in that it finds loop transformations that yield significantly higher performance. If well configured, then random exploration turns out to be very effective and reduces the need for a genetic algorithm.

Dynamic Task Scheduling Via Policy Iteration Scheduling Approach for Cloud Computing

Dynamic task scheduling is one of the most popular research topics in the cloud computing field. The cloud scheduler dynamically provides VM resources to variable cloud tasks with different scheduling strategies in cloud computing. In this study, we utilized a valid model to describe the dynamic changes of both computing facilities (such as hardware updating) and request task queuing. We built a novel approach called Policy Iteration Scheduling (PIS) to globally optimize the independent task scheduling scheme and minimize the total execution time of priority tasks. We performed experiments with randomly generated cloud task sets and varied the performance of VM resources using Poisson distributions. The results show that PIS outperforms other popular schedulers in a typical cloud computing environment.

Simulation and FPGA-Based Implementation of Iterative Parallel Schedulers for Optical Interconnection Networks

High-performance interconnection networks are required for inter-board, intra-board, and on-chip data communication. With the growth of data communication, the requirements for high bandwidth density, high scalability, low latency, and low power consumption are becoming more stringent, making optical solutions appealing. Such requirements should be achieved not only by the hardware architecture but also by the electronic scheduler that is in charge of deciding the packet transmissions and controlling the optical devices. In particular, low-latency schedulers are of paramount importance—especially for optical interconnection networks whose switching capabilities may be constrained by the optical domain. This paper focuses on the hardware implementation and optimization of a scheduler suitable for optical interconnection networks. Parallel, iterative scheduling algorithms are considered for high computational efficiency. More specifically, an iterative parallel implementation of the longestqueue- first algorithm (ipLQF) is proposed and compared to the well-known iSLIP algorithm. Hardware optimization is carried out to improve their implementation efficiency. Although ipLQF achieves better network performance in terms of packet latency, the hardware implementation indicates that iSLIP stands for execution time and resource utilization in commercial field programmable gate array boards.

Tapir

This paper explores how fork-join parallelism, as supported by concurrency platforms such as Cilk and OpenMP, can be embedded into a compiler's intermediate representation (IR). Mainstream compilers typically treat parallel linguistic constructs as syntactic sugar for function calls into a parallel runtime. These calls prevent the compiler from performing optimizations across parallel control constructs. Remedying this situation is generally thought to require an extensive reworking of compiler analyses and code transformations to handle parallel semantics. Tapir is a compiler IR that represents logically parallel tasks asymmetrically in the program's control flow graph. Tapir allows the compiler to optimize across parallel control constructs with only minor changes to its existing analyses and code transformations. To prototype Tapir in the LLVM compiler, for example, we added or modified about 6000 lines of LLVM's 4-million-line codebase. Tapir enables LLVM's existing compiler optimizations for serial code -- including loop-invariant-code motion, common-subexpression elimination, and tail-recursion elimination -- to work with parallel control constructs such as spawning and parallel loops. Tapir also supports parallel optimizations such as loop scheduling.

Assessing the Performance of the SRR Loop Scheduler with Irregular Workloads

The input workload of an irregular application must be evenly distributed among its threads to enable cutting-edge performance. To address this need in OpenMP, several loop scheduling strategies were proposed. While having this ever-increasing number of strategies at disposal is helpful, it has become a non-trivial task to select the best one for a particular application. Nevertheless, this challenge becomes easier to be tackled when existing scheduling strategies are extensively evaluated. Therefore, in this paper, we present a performance and scalability evaluation of the recently-proposed loop scheduling strategy named Smart Round-Robin (SRR). To deliver a comprehensive analysis, we coupled a synthetic kernel benchmarking technique with several rigorous statistical tools, and considered OpenMP’s Static and Dynamic loop schedulers as our baselines. Our results unveiled that SRR performs better on irregular applications with symmetric workloads and coarse-grained parallelization, achieving up to 1.9x and 1.5x speedup over OpenMP’s Static and Dynamic schedulers, respectively.

Battery Energy Storage System and Demand Response Based Optimal Virtual Power Plant Operation

With certain controllability of various distribution energy resources (DERs) such as battery energy storage system (BESS), demand response (DR) and distributed generations (DGs), virtual power plant (VPP) can suitably regulate the powers access to the distribution network. In this paper, an optimal VPP operating problem is used to optimize the charging/discharging schedule of each BESS and the DR scheme with the objective to maximize the benefit by regulating the supplied powers over daily 24 hours. The proposed solution method is composed of an iterative dynamic programming optimal BESS schedule approach and a particle swarm optimization based (PSO-based) DR scheme approach. The two approaches are executed alternatively until the minimum elec-tricity cost of the whole day is obtained. The validity of the proposed method was confirmed with the obviously decreased supplied powers in the peak-load hours and the largely reduced electricity cost.