Scenario-based Specifications Research Articles

Scenario-based and value-based specification mining: better together

Specification mining takes execution traces as input and extracts likely program invariants, which can be used for comprehension, verification, and evolution related tasks. In this work we integrate scenario-based specification mining, which uses a data-mining algorithm to suggest ordering constraints in the form of live sequence charts, an inter-object, visual, modal, scenario-based specification language, with mining of value-based invariants, which detects likely invariants holding at specific program points. The key to the integration is a technique we call scenario-based slicing, running on top of the mining algorithms to distinguish the scenario-specific invariants from the general ones. The resulting suggested specifications are rich, consisting of modal scenarios annotated with scenario-specific value-based invariants, referring to event parameters and participating object properties.We have implemented the mining algorithm and the visual presentation of the mined scenarios within a standard development environment. An evaluation of our work over a number of case studies shows promising results in extracting expressive specifications from real programs, which could not be extracted previously. The more expressive the mined specifications, the higher their potential to support program comprehension and testing.

Guest authors are not welcome

Software Testing, Verification and ReliabilityVolume 22, Issue 2 p. 65-65 EditorialFree Access Guest authors are not welcome First published: 11 October 2013 https://doi.org/10.1002/stvr.1466AboutSectionsPDF ToolsRequest permissionExport citationAdd to favoritesTrack citation ShareShare Give accessShare full text accessShare full-text accessPlease review our Terms and Conditions of Use and check box below to share full-text version of article.I have read and accept the Wiley Online Library Terms and Conditions of UseShareable LinkUse the link below to share a full-text version of this article with your friends and colleagues. Learn more.Copy URL Share a linkShare onFacebookTwitterLinkedInRedditWechat This issue has two excellent papers. The first, Regression Testing Minimisation, Selection andPrioritisation: A Survey, by Yoo and Harman, provides an extensive survey of research on minimizing and prioritizing tests for regression testing, including a total of 189 references. The second, Timing Analysis of Scenario-based Specifications Using Linear Programming, by Li, Pan, Bu, Wang and Zhao, presents an approach to analysing UML sequence diagrams to solve reachability, constraint conformance and bounded delay problems. A colleague recently asked me for an opinion on ‘guest authorship’ of papers, referring to an essay from Scientific American 1. A guest author is added to a paper despite not adding any intellectual content, labor in the work behind the paper or contribution to the writing. Some guest authors are added as part of a mutual support deal. I add your name to my papers and you add mine to yours, inflating both publication records. Some add ‘big names’ to a paper in the hopes that the paper will get favorable reviews. (I can ensure you this does not work—if anything, ‘big name’ scientists are subjected to more critical scrutiny.) Some junior scientists are expected to add senior colleagues’ names to papers as an appreciation for the extra administrative burden they shoulder. I have even heard of PhD advisors who expect their former students to add their names to papers long after graduating. To be direct and clear, my firm opinion, and the policy of this journal, is that putting your name on a paper you did not contribute to is lying. It deceives readers. It is theft of credit. It claims credit for something you did not do. It is simply a form of plagiarism. If the editorial staff for STVR finds guest authorship, the paper will be handled just as any other type of plagiarism. The paper will be rejected, department chairs or deans will be notified and the authors (all authors) will not be welcome to submit papers to STVR again. I have only thought of three gray areas. One is if the guest author is the source of funds, the PI who supports the scientists who did the work. Another is if the guest author taught the class the paper was initially written for. In both cases, the guest author can claim credit for creating the environment that allowed the research to flourish and possibly for teaching knowledge and skills that were directly reflected in the paper. Personally, I would not accept being a guest author in this situation (and have declined such invitations) but can see some merit to the argument. Third is if the guest author did not know his or her name was being used. The contributing authors are certainly to blame, but perhaps not the guest author (maybe I could use this technique to increase my Erdös number …). Science can only flourish in an atmosphere of honesty and openness. Dishonesty, corruption and obscurity corrupt and disrupt the scientific process. JEFF OFFUTT [email protected] 21 January 2012 REFERENCES 1 Janet D. Scientific authorship: guests, courtesy, contributions, and harms, Stemwedel, Scientific American, (November, 2011). Available from: http://blogs.scientificamerican.com/doing-good-science/2011/11/04/scientific-authorship-guests-courtesy-contributions-and-harms/ [last accessed on 29 January 2012]. Volume22, Issue2March 2012Pages 65-65 ReferencesRelatedInformation

Symbolic Message Sequence Charts

Message sequence charts (MSCs) are a widely used visual formalism for scenario-based specifications of distributed reactive systems. In its conventional usage, an MSC captures an interaction snippet between concrete objects in the system. This leads to voluminous specifications when the system contains several objects that are behaviorally similar. MSCs also play an important role in the model-based testing of reactive systems, where they may be used for specifying (partial) system behaviors, describing test generation criteria, or representing test cases. However, since the number of processes in a MSC specification are fixed, model-based testing of systems consisting of process classes may involve a significant amount of rework: for example, reconstructing system models, or regenerating test cases for systems differing only in the number of processes of various types. In this article we propose a scenario-based notation, called symbolic message sequence charts (SMSCs), for modeling, simulation, and testing of process classes. SMSCs are a lightweight syntactic and semantic extension of MSCs where, unlike MSCs, a SMSC lifeline can denote some/all objects from a collection. Our extensions give us substantially more modeling power. Moreover, we present an abstract execution semantics for (structured collections of) SMSCs. This allows us to validate MSC-based system models capturing interactions between large, or even unbounded, number of objects. Finally, we describe a SMSC-based testing methodology for process classes, which allows generation of test cases for new object configurations with minimal rework. Since our SMSC extensions are only concerned with MSC lifelines, we believe that they can be integrated into existing standards such as UML 2.0. We illustrate our SMSC-based framework for modeling, simulation, and testing of process classes using a weather-update controller case-study from NASA.

시나리오 기반 명세 모델로부터 반응형 시스템 모델 개발

It is an important and a difficult task to analyze external inputs and interactions between objects for designing and modeling a reactive system consisting of multiple object. Also the reactive system is required huge efforts on confirm it can satisfy requirements under all possible circumstances. In this paper, we build from requirements to a scenario-based specification model using LSC(Live Sequence Chart) extending MSC(Message Sequence Chart) with richer syntax and semantic. Then the reactive system model satisfying all requirements for each object in this system can be automatically created through LTL Synthesis. Finally, we propose a method of reactive system development by iterative process transforming a reactive system model to codes.

Timing analysis of scenario-based specifications using linear programming

Scenario-based specifications (SBSs), such as UML interaction models, offer an intuitive and visual way of describing design requirements, and are playing an increasingly important role in the design of software systems. This paper presents an approach to timing analysis of SBSs expressed by UML interaction models. The approach considers more general and expressive timing constraints in UML sequence diagrams (SDs), and gives a solution to the reachability analysis, constraint conformance analysis and bounded delay analysis problems, which reduces these problems into linear programs. With the synchronous interpretation of the SD compositions, the timing analysis algorithms in the approach form a decision procedure for a class of SBSs where any loop in any path is time-independent of the other parts in the path. These algorithms are also a semi-decision procedure for general SBSs with both the synchronous and asynchronous composition semantics. The approach also supports bounded timing analysis of SBSs, which investigates all the paths in the bound limit one by one, and performs the timing analysis for each finite path by linear programming. A tool prototype has been developed to support this approach. Copyright © 2010 John Wiley & Sons, Ltd. (This paper presents a linear programming-based approach to timing analysis of scenario-based specifications (SBSs) expressed by UML interaction models. With more general and expressive timing constraints in UML sequence diagrams, the algorithms in the approach solve the problems of the reachability, constraint conformance and bounded delay analysis of SBSs. These algorithms form a decision procedure for the loop-unlimited SBSs where any loop in any path is time-independent of the other parts in the path, and a semi-decision procedure for general SBSs.)

A train control system simulation and analysis method

Experiments in physical and real environment would be expensive, time consuming and unsafe. This project aims to develop a tool to reduce the above mentioned efforts by simulating a whole railway environment, fulfilling the interfaces between subsystems and the elements of these subsystems, testing and analysing the specifications of European Train Control System Level-2 (ETCS L2). UML sequence diagrams and state diagrams are used to model the scenario-based specification and the dynamic behaviours of on-board equipment. The examples of using this method to simulate on-board equipment, test and validate the specifications, as well as the system performance simulation results are also introduced.

A Compiler for Multimodal Scenarios

We exploit the main similarity between the aspect-oriented programming paradigm and the inter-object, scenario-based approach to specification, in order to construct a new way of executing systems based on the latter. Specifically, we transform multimodal scenario-based specifications, given in the visual language of live sequence charts (LSC), into what we call scenario aspects , implemented in AspectJ. Unlike synthesis approaches, which attempt to take the inter-object scenarios and construct intra-object state-based per-object specifications or a single controller automaton, we follow the ideas behind the LSC play-out algorithm to coordinate the simultaneous monitoring and direct execution of the specified scenarios. Thus, the structure of the specification is reflected in the structure of the generated code; the high-level inter-object requirements and their structure are not lost in the translation. The transformation/compilation scheme is fully implemented in a UML2-compliant tool we term the S2A compiler (for Scenarios to Aspects), which provides full code generation of reactive behavior from inter-object multimodal scenarios. S2A supports advanced scenario-based programming features, such as multiple instances and exact and symbolic parameters. We demonstrate our work with an application whose inter-object behaviors are specified using LSCs. We discuss advantages and challenges of the compilation scheme in the context of the more general vision of scenario-based programming.

Synthesis from scenario-based specifications

We consider the problem of the automatic generation of reactive systems from specifications given in the scenario-based language of live sequence charts (LSCs). We start by extending the language so that it becomes more suitable for synthesis. We then translate a system specification given in the language into a two-player game between the system and the environment. By solving the game, we generate a winning strategy for the system, which corresponds to a correct implementation of the specification. We also define two notions of system correctness, and show how each can be synthesized.

AoURN-based modeling and analysis of software product lines

Software Product Line Engineering concerns itself with domain engineering and application engineering. During domain engineering, the whole product family is modeled with a preferred flavor of feature models and additional models as required (e.g., domain models or scenario-based models). During application engineering, the focus shifts toward a single family member and the configuration of the member's features. Recently, aspectual concepts have been employed to better encapsulate individual features of a Software Product Line (SPL), but the existing body of SPL work does not include a unified reasoning framework that integrates aspect-oriented feature description artifacts with the capability to reason about stakeholders' goals while taking feature interactions into consideration. Goal-oriented SPL approaches have been proposed, but do not provide analysis capabilities that help modelers meet the needs of the numerous stakeholders involved in an SPL while at the same time considering feature interactions. We present an aspect-oriented SPL approach for the requirements phase that allows modelers (a) to capture features, goals, and scenarios in a unified framework and (b) to reason about stakeholders' needs and perform trade-off analyses while considering undesirable interactions that are not obvious from the feature model. The approach is based on the Aspect-oriented User Requirements Notation (AoURN) and helps identify, prioritize, and choose products based on analysis results provided by AoURN editor and analysis tools. We apply the AoURN-based SPL framework to the Via Verde SPL to demonstrate the feasibility of this approach through the selection of a Via Verde product configuration that satisfies stakeholders' needs and results in a high-level, scenario-based specification that is free from undesirable feature interactions.

Scenario-Driven Service Behavior Manipulation

PDF HTML阅读 XML下载 导出引用 引用提醒 场景驱动的服务行为调控 DOI: 10.3724/SP.J.1001.2011.04019 作者: 作者单位: 作者简介: 通讯作者: 中图分类号: 基金项目: 国家自然科学基金(90818022, 91018006, 61021062); 国家重点基础研究发展计划(973)(2009CB320702); 核高基项目(2009z01036-001-001-3) Scenario-Driven Service Behavior Manipulation Author: Affiliation: Fund Project: 摘要 | 图/表 | 访问统计 | 参考文献 | 相似文献 | 引证文献 | 资源附件 | 文章评论 摘要:提出了一个场景驱动的服务行为调控途径.首先,用UML 顺序图模型作为场景规约以描述用户对服务行为的需求,并且基于目标服务的BPEL 行为规约,构造表示服务行为的BPEL-Petri 网模型(简称BPN 模型);其次,基于并发变迁分析BPN 模型上表示服务行为的路径,并通过遍历BPN 模型获取包含UML 顺序图描绘场景的服务行为集合;最后,根据行为分析的结果构建了调控服务,通过在运行时监听、检查并过滤用户与目标服务的消息交互,从目标服务中抽取或过滤顺序图描绘的场景.在此基础上,开发了原型工具BASIS,以支撑场景驱动的服务行为调控途径,并通过实例研究展示了该方法的可行性. Abstract:This paper proposes an approach for scenario-driven Web services behavior manipulation. First, the study uses UML sequence diagrams as the scenario-based specification to describe user’s requirement on the behavior of the service and construct BPEL-Petri nets model (BPN model for short) to represent the service behavior based on its BPEL specification. Second, the service behavior is analyzed based on paths of the BPN model by utilizing the notion of concurrent transitions. The set of behavior with occurrence of the scenario depicted by the UML Sequence Diagram is obtained by traversing the BPN model. Finally, by using the result of behavior analysis, the study constructs the manipulator services to extract or filter out the behavior at run-time by listening to, checking, and filtering the messages exchanged between the user and the target service. In addition, the study has developed a prototype tool called BASIS to facilitate the behavior manipulation and conduct a case study to illustrate the feasibility of this approach. 参考文献 相似文献 引证文献

Scenario-Based Specification of Automotive Requirements With Quantitative Constraints and Synthesis of SL/SF Monitors

Requirements of embedded systems often describe the system behavior with quantitative constraints over parameters such as timing, memory, and other resources. In this letter, we present a visual language suited for scenario-based specification of requirements with quantitative constraints. Our language, known as event sequence charts with quantitative constraints (ESC-QC), is inspired by message sequence charts (MSC) and its variants. We introduce ESC-QC notations through an example from automotive requirements and then describe the formal syntax and semantics. Besides being useful for formal documentation and analysis of system requirements, ESC-QC specifications can be translated into monitors and used for run-time verification of designs. In automotive systems Simulink/Stateflow (SL/SF) is widely used for design of control systems. We have developed an algorithm for automatic synthesis of SL/SF monitors from ESC-QC specifications. We have used this algorithm for generating monitors for verification of controller models from active safety and body control applications.

A formal methodology for semantics and time consistency checking of UML dynamic diagrams

UML 2.0 is a multi-paradigm language which copes well with modeling of reactive and real-time systems by offering many visual and flexible notations for description of their various aspects including their time constraints. However, their development remains a complex task and error-prone even if object-oriented concepts are used. Consequently, one is interested in validation techniques which allow analyzing the behaviors of a design already in early phases. Nevertheless, the consistency and compatibility checking of designed artifacts for a reactive system is a difficult task; because of both the imprecise dynamic semantics of UML diagrams and the expressiveness gap between them. In this setting, this article proposes a methodology for semantics and time consistency checking between behavioral models and scenario-based specifications depicted, respectively, by state and sequence diagrams.

UML interaction model-driven runtime verification of Java programs

The authors use unified modelling language (UML) 2.0 interaction overview diagrams (IODs) and sequence diagrams to construct simple and expressive scenario-based specifications, and present an approach to runtime verification of Java programs for exceptional consistency and mandatory consistency. The exceptional consistency requires that any forbidden scenario described by a given IOD never happens during the execution of a program, and the mandatory consistency requires that if a reference scenario described by a given sequence diagram occurs during the execution of a program, it must immediately adhere to a scenario described by a given IOD. In the approach, the authors first instrument a program under verification so as to gather the program execution traces related to a given scenario-based specification; then they drive the instrumented program to execute for generating the program execution traces; finally they check if the collected program execution traces satisfy the given specification. The approach leads to a supporting tool for testing in which UML interaction models are used as automatic test oracles to detect the wrong temporal ordering of message interaction in programs.

Polymorphic scenario-based specification models: semantics and applications

We present polymorphic scenarios, a generalization of a UML2-compliant variant of Damm and Harel's live sequence charts (LSC) in the context of object-orientation. Polymorphic scenarios are visualized using (modal) sequence diagrams where lifelines may represent classes and interfaces rather than concrete objects. Their semantics takes advantage of inheritance and interface realization to allow the specification of most expressive, succinct, and reusable universal and existential inter-object scenarios for object-oriented system models. We motivate the use of polymorphic scenarios, formally define their trace-based semantics, and present their application for scenario-based testing and execution, as implemented in the S2A compiler developed at the Weizmann Institute of Science. We further discuss advanced semantic issues arising from the use of scenarios in a polymorphic setting, suggest possible extensions, present a UML profile to support polymorphic scenarios, consider the application of the polymorphic semantics to other variants of scenario-based specification languages, and position our work in the broader context of behavioral subtyping.

Synthesis of Reo Circuits from Scenario-based Specifications

It is difficult to construct correct models for distributed large-scale service-oriented applications. Typically, the behavior of such an application emerges from the interaction and collaboration of multiple components/services. On the other hand, each component, in general, takes part in multiple scenarios. Consequently, not only components, but also their interaction protocols are important in the development process for distributed systems. Coordination models and languages, like Reo, offer powerful “glue-code” that encode the interaction protocols. In this paper we propose a novel synthesis technique, which can be used to generate Reo circuits directly from scenario specifications. Inspired by the way UML2.0 sequence diagrams can be algebraically composed, we define an algebraic framework for merging connectors generated from partial specifications by exploiting the algebraic structure of UML sequence diagrams.

Scenario-Based Consistency Verification of Component-Based Real-Time System Designs

For real-time software systems, this paper considers the problem of checking component-based designs for timing scenario-based specifications, which is one of the challenges in real-time computing domain. Firstly the timing scenario-based specifications are specified by UML sequence diagrams with a set of boolean expressions, then the interface automata for modeling real time systems through adding time intervals on the actions is extened. The component-based designs are modeled by a real-time interface automaton network which contains a set of real-time interface automata synchronized by shared actions. Based on analyzing the compatible integer state space of a real-time interface automata network, a corresponding reachability graph is constructed and finally an algorithm for checking the consistency between the real-time component-based designs and the timing scenario-based specifications is developed.

Verification of Scenario-based Specifications using Templates

Specifying dynamic behaviour of a system by listing scenarios of its interactions has become a popular practice. Message sequence chart (MSC) is a rigorous and widely used notation for specifying such scenarios of system behaviour. High-level MSCs (HMSC) provide hierarchical and modular composition facilities for constructing complex scenarios from basic MSCs. Although the general problem of formal verification of properties of HMSCs is intractable, we propose a framework for restricted verification. We present simple templates for commonly used types of properties and discuss efficient algorithms for verifying them.

Merging partial behavioural models

Constructing comprehensive operational models of intended system behaviour is a complex and costly task. Consequently, practitioners have adopted techniques that support incremental elaboration of partial behaviour descriptions. A noteworthy example is the wide adoption of scenario-based notations such as message sequence charts. Scenario-based specifications are partial descriptions that can be incrementally elaborated to cover the system behaviour that is of interest. However, how should partial behavioural models described by different stakeholders with different viewpoints covering different aspects of behaviour be composed? How should partial models of component instances of the same type be put together. In this paper, we propose model merging as a general solution to these questions. We formally define model merging based on observational refinement and show that merging consistent models is a process that should result in a minimal common refinement. Because minimal common refinements are not guaranteed to be unique, we argue that the modeller should participate in the process of elaborating such a model. We also discuss the role of the least common refinement and the greatest lower bound of all minimal common refinements in this elaboration process. In addition, we provide algorithms for i) checking consistency between two models; ii) constructing their least common refinement if one exists; iii) supporting the construction of a minimal common refinement if there is no least common refinement.

Realizability and verification of MSC graphs

Scenario-based specifications such as message sequence charts (MSC) offer an intuitive and visual way to describe design requirements. MSC-graphs allow convenient expression of multiple scenarios, and can be viewed as an early model of the system that can be subjected to a variety of analyses. Problems such as LTL model checking are undecidable for MSC-graphs in general, but are known to be decidable for the class of bounded MSC-graphs. Our first set of results concerns checking realizability of bounded MSC-graphs. An MSC-graph is realizable if there is a distributed implementation that generates precisely the behaviors in the graph. There are two notions of realizability, weak and safe, depending on whether or not we require the implementation to be deadlock-free. It is known that for a finite set of MSCs, weak realizability is coNP-complete while safe realizability has a polynomial-time solution. We establish that for bounded MSC-graphs, weak realizability is, surprisingly, undecidable, while safe realizability is in E XPSPACE. Our second set of results concerns verification of MSC-graphs. While checking properties of a graph G , besides verifying all the scenarios in the set L ( G ) of MSCs specified by G , it is desirable to verify all the scenarios in the set L w ( G ) —the closure of G , that contains the implied scenarios that any distributed implementation of G must include. For checking whether a given MSC M is a possible behavior, checking M ∈ L ( G ) is NP-complete, but checking M ∈ L w ( G ) has a quadratic solution. For temporal logic specifications, considering the closure makes the verification problem harder: while checking LTL properties of L ( G ) is P SPACE-complete for bounded graphs G , checking even simple “local” properties of L w ( G ) is undecidable.

Incremental elaboration of scenario-based specifications and behavior models using implied scenarios

Behavior modeling has proved to be successful in helping uncover design flaws of concurrent and distributed systems. Nevertheless, it has not had a widespread impact on practitioners because model construction remains a difficult task and because the benefits of behavior analysis appear at the end of the model construction effort. In contrast, scenario-based specifications have a wide acceptance in industry and are well suited for developing first approximations of intended behavior; however, they are still maturing with respect to rigorous semantics and analysis tools.This article proposes a process for elaborating system behavior that exploits the potential benefits of behavior modeling and scenario-based specifications yet ameliorates their shortcomings. The concept that drives the elaboration process is that of implied scenarios . Implied scenarios identify gaps in scenario-based specifications that arise from specifying the global behavior of a system that will be implemented component-wise. They are the result of a mismatch between the behavioral and architectural aspects of scenario-based specifications. Due to the partial nature of scenario-based specifications, implied scenarios need to be validated as desired or undesired behavior. The scenario specifications are then updated accordingly with new positive or negative scenarios. By iteratively detecting and validating implied scenarios, it is possible to incrementally elaborate the behavior described both in the scenario-based specification and models. The proposed elaboration process starts with a message sequence chart (MSC) specification that includes basic, high-level and negative MSCs. Implied scenario detection is performed by synthesis and automated analysis of behavior models. The final outcome consists of four artifacts: (1) an MSC specification that has been evolved from its original form to cover important aspects of the concurrent nature of the system that were under-specified or absent in the original specification, (2) a behavior model that captures the component structure of the system that, combined with (3) a constraint model and (4) a property model that provides the basis for modeling and reasoning about system design.