Scanned Laser Annealing Research Articles

Atomic Layer MoTe2 Field-Effect Transistors and Monolithic Logic Circuits Configured by Scanning Laser Annealing.

Atomically thin semiconductors such as transition metal dichalcogenides have recently enabled diverse devices in the emerging two-dimensional (2D) electronics. While scalable 2D electronics demand monolithic integrated circuits consisting of complementary p-type and n-type transistors, conventional p-type and n-type doping in desired regions, monolithically in the same semiconducting atomic layers, remains elusive or impractical. Here, we report on an agile, high-precision scanning laser annealing approach to realizing 2D monolithic complementary logic circuits on atomically thin MoTe2, by reliably designating p-type and n-type transport polarity in the constituent transistors via localized laser annealing and modification of their Schottky contacts. Pristine p-type field-effect transistors (FETs) transform into n-type ones upon controlled laser annealing on their source/drain gold electrodes, exhibiting a mobility of 96.5 cm2 V-1 s-1 (the highest known to date) and an On/Off ratio of 106. Elucidation and validation of such an on-demand configuration of polarity in MoTe2 FETs further enable the construction and demonstration of essential logic circuits, including both inverter and NOR gates. This dopant-free, spatially precise scanning laser annealing approach to configuring monolithic complementary logic integrated circuits may enable programmable functions in 2D semiconductors, exhibiting potential for additively manufactured, scalable 2D electronics.

Comparison of scanning laser annealing and microwave annealing for As+ implanted Si

Laser annealing and microwave (MW) annealing are rapid annealing techniques that can be used for postannealing of ion implanted semiconductors. In this study, laser annealing and MW annealing of As+ implanted Si are compared in terms of dopant activation, energy absorption, recrystallization, and dopant diffusion. Laser annealing caused similar recrystallization and a slightly higher dopant activation than MW annealing did, at the same time, the energy density absorbed during laser annealing is ∼1/7 lower than during MW annealing, due to surface heating. Rapid dopant activation and negligible dopant diffusion were achieved in the MW annealed sample. This indicates that MW annealing is a promising method for annealing ion implanted source, drain, and channel regions for shallow-junction transistor fabrication. On the other hand, laser annealing results in significant but uniform dopant diffusion, and therefore, laser annealing appears to be beneficial for quickly forming deep wells with uniform dopant concentrations for small scale wafer.

Simulation of Millisecond Laser Anneal on SOI: A Study of Dopant Activation and Mobility and its Application to Scaled FinFET Thermal Processing

ABSTRACTThis work investigates scanning laser annealing used for ultra-shallow junction (USJ) activation. We investigate the laser system via simulation to determine the peak temperature achieved in the active area during processing. We employed the Sentaurus TCAD software by Synopsys to perform a 2D simulation of a laser scans across the active area of the device, solving the heat equation in both time and space. An absorber layer is deposited on the wafer surface to enhance the absorption of incident energy and reduce SOI reflectivity. An effective absorption coefficient of α=8000cm-1 was calculated for the absorber layer, calibrated with the experimental laser intensity. This absorption coefficient correctly predicts the silicon temperature as a function of power with any arbitrarily defined scan speed. To investigate the role of dopant activation, an SOI wafer was implanted with arsenic 25 keV, dose 3e15 /1.5e15 cm-2 and laser annealed in areas of target temperatures ranging from 850-1300°C. The sheet resistance was measured using 4-point probe showing sheet resistance improvement with increasing laser temperature. The extracted temperature cycle from the 2D heat simulation was used as an equivalent millisecond RTA in a full 3D process simulation to study dopant distribution and activation using Sentaurus Process Kinetic Monte Carlo (KMC), considering the effect of dopants, dopant clusters, and point defects. The results of this simulation demonstrate deactivation of arsenic above 1050°C, which is inconsistent with Hall measurements that suggest increasing laser temperature will increase mobility and activation. The results are analyzed versus the expected trends and suggest future improvements needed to the KMC model or the laser temperature profiles in order to describe activation kinetics in millisecond anneals within SOI.

Defect Evolution During Laser Annealing

AbstractImplementation of millisecond annealing requires the identification of the operating conditions for that technique which minimize the residual defects. In addition, possible combinations of low temperature annealing with millisecond annealing could result in minimal residual defects. The samples studied here were implanted with Ge+ pre-amorphization and boron dopant ions and were activated with a scanning laser annealing technique with maximum temperature dwell times of about one millisecond. The laser anneal conditions were varied, along with combinations of spike anneals. The annealed samples were analyzed by plan-view transmission electron microscopy (TEM) to measure the residual defect density and size. The effects of spike temperature, laser annealing temperature, and scan rate will be discussed.

Electromigration in Cu interconnects with very different grain structures

To determine the effects of grain structures on the rate of electromigration-induced failure of Cu interconnects, scanned laser annealing (SLA) has been used to produce Cu interconnects with very different grain structures. SLA, in which a moving hot-zone induces local grain growth, can be used to produce interconnects with fully bamboo grain structures that have bamboo grain lengths up to ten times the interconnect width. Electromigration experiments have been carried out on interconnects with very-long-grained bamboo structures, as well as on interconnects with polygranular structures in which the average grain size is less than the linewidth. Such differences are known to lead to orders of magnitude changes in lifetimes for Al-based interconnects. However, no significant differences in the failure rates were found for these Cu interconnects. This result supports earlier work that suggested that electromigration in Cu interconnects with now-standard liners and interlevel diffusion-barrier layers occurs by mechanisms that are faster than grain boundary self-diffusion.

Simulation of microstructural evolution induced by scanned laser annealing of metallic interconnects

Through modeling and simulations, we have determined the mechanisms that lead to the observed microstructural evolution induced by the scanned laser annealing (SLA) of interconnects. We found that higher laser powers and lower scan rates lead to greater transformation to bamboo microstructures, as well as to longer average bamboo grain lengths. The thermal profile along the interconnect length is shown to have a weak effect on the fraction transformed to bamboo, but a strong effect on the average bamboo grain length. Additionally, using simulations, we have determined SLA conditions that should lead to the development of single crystal structures, which are velocities of 1 μm/s or lower, laser powers 9.7 mW or higher, and steep thermal profiles.

Use of scanned laser annealing to control the bamboo grain length of Cu interconnects

Microstructural evolution induced by scanned laser annealing (SLA) of Cu interconnects was found to produce unique large-grained “bamboo” grain structures, with bamboo grain lengths up to ten times the linewidth. These bamboo grain lengths are shown to depend on the scan rate and laser power. By comparing results from experiments on different structures with grain growth simulations, the bamboo grain length induced by SLA is shown to be a strong function of the thermal profile, where steeper thermal profiles yield longer bamboo grains.

The effects of microstructural transitions at width transitions on interconnect reliability

Interconnect reliability is usually assessed through lifetime tests on straight stud-to-stud lines with fixed widths. However, real interconnects often have junctions with narrow-to-wide transitions. We have carried out experimental and modeling-based studies of interconnects with narrow-to-wide transitions to test the Korhonen model for electromigration-induced failure and determine parameters for failure. Two-level Al-0.5% Cu via-to-via electromigration test structures with narrow-to-wide width transitions have been studied as a function of the ratio of linewidths and as a function of the ratio of lengths of the wide and narrow line segments. The narrow-to-wide transition was found to be a site of atomic flux divergence due to the discontinuity in diffusivities between the narrow and wide segments, which have bamboo and polygranular microstructures, respectively. Consequently, it was found that the electromigration failure rate increases as the position of width transition is decreased below a critical distance from the electron–source via. This occurs due to an interaction between evolution of the stress field at the electron–source via and the evolution of the stress field at the width transition. Narrow-to-wide transitions with positions greater than a critical distance from the electron–source via have much higher lifetimes which are not a function of the transition location, due to a lack of interaction between the electron–source via and the width transition. Because the mode of failure was identical for all structures (i.e., failure by voiding at the electron–source via), use of experimental results with simulations allows determination that the critical stress range for void-nucleation failure in these structures is 600 MPa±108. It was experimentally found that changing linewidth ratios did not affect interconnect reliability when the transition was 150 μm away from the electron–source via. However, simulations indicate that if the width transition is close to the electron–source via, the lifetime should decrease with the width of the polygranular region. Additional electromigration studies have been conducted on constant-width interconnects in which microstructural transitions were created using a scanned laser annealing. Analyses of the experiments are consistent with those on microstructural transitions caused by width transitions.

Microstructural evolution induced by scanned laser annealing in Al interconnects

A method has been developed for inducing controlled microstructural evolution in thin films patterned into lines, using scanned laser annealing (SLA). Experimental studies show at least three distinct types of microstructures resulting from SLA, depending on the scan rate and laser power. Starting with a polygranular initial microstructure, scanned laser annealing leads to either a large-grained polygranular structure, a bamboo structure, or an agglomerated structure. Microstructural evolution induced by SLA was found to lead to different evolution than conventional annealing, as well as to produce unique large-grained “bamboo” structures. Simulations of SLA further suggest the possibility of producing near-single crystal microstructures under properly controlled conditions.

Spatial distribution of the components in the Au/GaAs system after scanning laser annealing

Spatial distribution of the components in the Au/GaAs system after scanning laser annealing

Mapping the redistributed components of the AuGe/GaAs system after scanning laser Annealing

Mapping the redistributed components of the AuGe/GaAs system after scanning laser Annealing

Epitaxial Ge/GaAs Heterostructures by Scanned CW Laser Annealing of a-GE Layers on GaAS

ABSTRACTEpitaxial regrowth of Ge/GaAs heterostructures by scanned laser annealing of amorphous Ge films on GaAs substrates has been studied as a function of laser power and scan rate. At least eight regimes representing different film regrowth characteristics were observed. Of these, two were of primary interest. At low powers (between~1.6 and 3.2 W for a beam diameter of~40 μm) and scan rates between 1 and 400 cm/sec, polycrystalline Ge with a (100) preferred orientation was formed by an “explosive” crystallization mechanism. At higher powers, and over a scan rate range of 25 to 400 cm/sec, single crystal metastable (GaAs)1−x Gexalloys were obtained by liquid phase regrowth. Typical film resistivities, ρ, were as follows: as-deposited ρ=180Ωcm; polycrystalline films, ρ=3 × 10−2 Ωcm; single crystal films,ρ=9×10−4Ωcm.