Scalar Multiplication Operation Research Articles

Generalized orthopair fuzzy matrices based on Hamacher operations

The objective of this paper is to apply the concept of intuitionistic fuzzy matrices and pythagorean fuzzy matrices to q-rung orthopair fuzzy matrices. In this paper, we introduce the Hamacher operations of q-rung orthopair fuzzy matrices and prove some desirable properties of these operations, such as commutativity, idempotency and monotonicity. Further, we prove De Morgan's laws over complement for these operations. Then we constructed the scalar multiplication (n.hA) and exponentiation (A ∧hn ) operations of q-rung orthopair fuzzy matrices and investigate their algebraic properties. Finally, we prove some properties of necessity and possibility operators of q-rung orthopair fuzzy matrices.

The elliptic scalar multiplication graph and its application in elliptic curve cryptography

In this work, a new graph has been defined as a main point to design a new version of an asymmetric encryption scheme. This graph is formed based on the scalar multiplication operation on elliptic curve defined over a prime field, which is called an elliptic scalar multiplication (ESM) graph. Some mathematical facts to show the ESM graph is a complete graph are proved theoretically. On the complete elliptic scalar multiplication (CESM) graph, an asymmetric encryption algorithm has been implemented. Fast computations on the proposed algorithm are Z obtained through the matrices representation and determination of the minimum spanning tree (MST) to compute the ciphertext. More secure computations with the CESM graphic encryption algorithm in comparison with the previous asymmetric encryption algorithms. So, the CESM graphic asymmetric encryption algorithm is considered as a new sight for elliptic curve cryptographic usages.

Novel Key Recovery Attack on Secure ECDSA Implementation by Exploiting Collisions between Unknown Entries

In this paper, we propose a novel key recovery attack against secure ECDSA signature generation employing regular table-based scalar multiplication. Our attack exploits novel leakage, denoted by collision information, which can be constructed by iteratively determining whether two entries loaded from the table are the same or not through side-channel collision analysis. Without knowing the actual value of the table entries, an adversary can recover the private key of ECDSA by finding the condition for which several nonces are linearly dependent by exploiting only the collision information. We show that this condition can be satisfied practically with a reasonable number of digital signatures and corresponding traces. Furthermore, we also show that all entries in the pre-computation table can be recovered using the recovered private key and a sufficient number of digital signatures based on the collision information. As case studies, we find that fixed-base comb and T_SM scalar multiplication are vulnerable to our attack. Finally, we verify that our attack is a real threat by conducting an experiment with power consumption traces acquired during T_SM scalar multiplication operations on an ARM Cortex-M based microcontroller. We also provide the details for validation process.

Parallel strategies for SIDH: Towards computing SIDH twice as fast

We present novel strategies and concrete algorithms for the parallel computation of the Supersingular Isogeny-based Diffie-Hellman key exchange (SIDH) protocol when executed on multi-core platforms. The most relevant design idea exploited by our approach is that of concurrently computing scalar multiplication operations along with a parallelized version of the strategies required for constructing and evaluating large smooth degree isogenies. We report experimental results showing that a three-core implementation of our parallel approach achieves an acceleration factor of 1.45 compared against a sequential implementation of the Supersingular Isogeny Key Encapsulation (SIKE) protocol instantiated with the prime p751

Pseudo-random scalar multiplication based on group isomorphism

Elliptic curve cryptography is an essential cryptography which is widely used in data encryption, key agreement, digital signature, and other applications. Scalar multiplication is the fundamental operation in all ECC schemes, such as ECDSA, ECIES, and ECMQV. Even a slight improvement of scalar multiplication is precious. Various methods have been proposed for improving efficiency of the scalar multiplication, including the windows method, the NAF method, and the w-NAF method. However, the endeavour in this direction almost exhausted in the past several years since it is hard to find a method substantially better than the w-NAF method. This paper focuses on the scalar multiplication algorithm for the case when the scalar is a pseudo-random number. A faster pseudo-random scalar multiplication method is proposed based on a group isomorphism between the pseudo-random number group and elliptic curve point group. Experimental results show that the proposed method can considerably reduce the computation time compared with those traditional methods. The pseudo-random scalar multiplication accounts for a significant proportion of total scalar multiplication operations in almost all ECC schemes. Therefore, the proposed method is promising and applicable for various ECC applications in the fields such as Internet of things, edge computing, and swarm robotics.

Algebraic operations on new interval neutrosophic vague sets

The interval neutrosophic set plays an important role to handle indeterminacy and inconsistency of information during decision making process. Recently, the interval neutrosophic vague sets have been proposed as an extension of the neutrosophic sets. Similar with other sets, this newly proposed set have to fulfill some algebraic operations. This paper aims to present algebraic operations for the interval neutrosophic vague sets. Some algebraic operations on interval neutrosophic vague set are introduced. Specifically, algebraic operations of addition, multiplication, scalar multiplication and power for the interval neutrosophic vague sets are presented. In addition, several related examples are also presented together with supporting proofs.

Compact implementations of Curve Ed448 on low‐end IoT platforms

Elliptic curve cryptography is a relatively lightweight public-key cryptography method for key generation and digital signature verification. Some lightweight curves (eg, Curve25519 and Curve Ed448) have been adopted by upcoming Transport Layer Security 1.3 (TLS 1.3) to replace the standardized NIST curves. However, the efficient implementation of Curve Ed448 on Internet of Things (IoT) devices remains underexplored. This study is focused on the optimization of the Curve Ed448 implementation on low-end IoT processors (ie, 8-bit AVR and 16-bit MSP processors). In particular, the three-level and two-level subtractive Karatsuba algorithms are adopted for multi-precision multiplication on AVR and MSP processors, respectively, and two-level Karatsuba routines are employed for multi-precision squaring. For modular reduction and finite field inversion, fast reduction and Fermat-based inversion operations are used to mitigate side-channel vulnerabilities. The scalar multiplication operation using the Montgomery ladder algorithm requires only 103 and 73 M clock cycles on AVR and MSP processors.

Fuzzy Linear space using triangular fuzzy numbers

In this paper, we discussed the elementary structure of linear space for triangular fuzzy system, linear subspace of the triangular fuzzy numbers and linear transformations between two triangular fuzzy spaces. We introduce a study of new concept of a Hamel base for any linear space and the uniqueness of its cardinality of fuzzy numbers. We begin with some basic definitions and properties of linear space triangular fuzzy system which will be used throughout this paper. Also the axioms of the primary field and the addition and scalar multiplication operations for triangular fuzzy system have been included.

Design and leakage assessment of side channel attack resistant binary edwards Elliptic Curve digital signature algorithm architectures

Considering that Elliptic Curve Digital Signature Algorithm (ECDSA) implementations need to be efficient, flexible and Side Channel Attack (SCA) resistant, in this paper, a design approach and architecture for ECDSA and the underlined scalar multiplication operation is proposed for GF(2k), satisfying the above three directives. To achieve that, in the paper, Binary Edwards Curves (BECs) are adopted as an alternative to traditional Weierstrass Elliptic Curves (ECs) for GF(2k) since they offer intrinsic SCA resistance against simple attacks due to their uniformity, operation regularity and completeness. To achieve high performance and flexibility, we propose a hardware/software ECDSA codesign approach where scalar multiplication is implemented in hardware and integrated in the ECDSA functionality through appropriate drivers of an ECDSA software stack. To increase BEC scalar multiplier performance and introduce SCA resistance we adopt and expand a parallelism design strategy/methodology where GF(2k) operations of a scalar multiplier round for both point operations performed in this round are reordered and assigned into parallelism layer in order to be executed concurrently. Within this strategy we include hardware and software based SCA countermeasures that rely on masking/randomization and hiding. While scalar randomization is realized by the ECDSA software stack in an easy way, in order to achieve resistance using hardware means, we propose and introduce in every scalar multiplier round, within the parallelism layers, projective coordinates randomization of all the round’s output points. So, in our approach, considering that with the proposed parallelism plan in every scalar multiplier round BEC point operations are performed in parallel and that the round’s output points are randomized with a different number in each round, we manage to achieve maximum SCA resistance. To validate this resistance, we introduce and realize a leakage assessment process on BEC scalar multipliers for the first time in research literature. This process is based on real measurements collected from a controlled SAKURA X environment with a GF(2233) based scalar multiplier implementation. Using Welch’s t-test we investigate possible information leakage of the multiplier’s input point and scalar and after an extended analysis we find trivial leakage. Finally, we validate the ECDSA architecture and its scalar multiplier efficiency by implementing it on a Zynq 7000 series FPGA Avnet Zedboard and collecting very promising, well balanced, results on speed and hardware resources in comparison with other works.

A Low Hardware Consumption Elliptic Curve Cryptographic Architecture over GF(p) in Embedded Application

In this paper, a low hardware consumption design of elliptic curve cryptography (ECC) over GF(p) in embedded applications is proposed. The adder-based architecture is explored to reduce the hardware consumption of performing scalar multiplication (SM). The Interleaved Modular Multiplication Algorithm and Binary Modular Inversion Algorithm are improved and implemented with two full-word adder units. The full-word register units for data storage are also optimized. The design is based on two full-word adder units and twelve full-word register units of pipeline structure and was implemented on Xilinx Virtex-4 platform. Design Compiler is used to synthesized the proposed architecture with 0.13 μm CMOS standard cell library. For 160, 192, 224, 256 field order, the proposed architecture consumes 5595, 7080, 8423, 9370 slices, respectively, and saves 17.58∼54.93% slice resources on FPGA platform when compared with other design architectures. The synthesized result uses 35.43 k, 43.37 k, 50.38 k, 57.05 k gate area and saves 52.56∼91.34% in terms of gate count in comparison. The design takes 2.56∼4.07 ms to perform SM operation over different field order under 150 MHz frequency. The proposed architecture is safe from simple power analysis (SPA). Thus, it is a good choice for embedded applications.

A high‐speed RSD‐based flexible ECC processor for arbitrary curves over general prime field

SummaryThis workpresents a novel high‐speed redundant‐signed‐digit (RSD)‐based elliptic curve cryptographic (ECC) processor for arbitrary curves over a general prime field. The proposed ECC processor works for any value of the prime number and curve parameters. It is based on a new high speed Montgomery multiplier architecture which uses different parallel computation techniques at both circuit level and architectural level. At the circuit level, RSD and carry save techniques are adopted while pre‐computation logic is incorporated at the architectural level. As a result of these optimization strategies, the proposed Montgomery multiplier offers a significant reduction in computation time over the state‐of‐the‐art. At the system level, to further enhance the overall performance of the proposed ECC processor, Montgomery ladder algorithm with (X,Y)‐only common Z coordinate (co‐Z) arithmetic is adopted. The proposed ECC processor is synthesized and implemented on different Xilinx Virtex (V) FPGA families for field sizes of 256 to 521 bits. On V‐6 platform, it computes a single 256 to 521 bits scalar point multiplication operation in 0.65 to 2.6 ms which is up to 9 times speed‐up over the state‐of‐the‐art.

Koblitz Curves over Quadratic Fields

In this work, we retake an old idea that Koblitz presented in his landmark paper (Koblitz, in: Proceedings of CRYPTO 1991. LNCS, vol 576, Springer, Berlin, pp 279–287, 1991), where he suggested the possibility of defining anomalous elliptic curves over the base field $${\mathbb {F}}_4$$ . We present a careful implementation of the base and quadratic field arithmetic required for computing the scalar multiplication operation in such curves. We also introduce two ordinary Koblitz-like elliptic curves defined over $${\mathbb {F}}_4$$ that are equipped with efficient endomorphisms. To the best of our knowledge, these endomorphisms have not been reported before. In order to achieve a fast reduction procedure, we adopted a redundant trinomial strategy that embeds elements of the field $${\mathbb {F}}_{4^{m}},$$ with m a prime number, into a ring of higher order defined by an almost irreducible trinomial. We also suggest a number of techniques that allow us to take full advantage of the native vector instructions of high-end microprocessors. Our software library achieves the fastest timings reported for the computation of the timing-protected scalar multiplication on Koblitz curves, and competitive timings with respect to the speed records established recently in the computation of the scalar multiplication over binary and prime fields.

Zimbabwean in-service mathematics teachers’ understanding of matrix operations

In Zimbabwe, school pupils study matrix operations, a topic that is usually covered as part of linear algebra courses taken by most mathematics undergraduate students at university. In this study we focused on Zimbabwean teachers who were studying the topic at university while also teaching the topic to their high school pupils. The purpose of the study was to explore the mental conceptions of matrix operations concepts of a sample of 116 in-service mathematics teachers. The Action Process Object Schema (APOS) theoretical framework describes the development in understanding of mathematics concepts through the hierarchical growth of mental constructions called action, process, object and schema. The results showed that many of the participants had interiorized actions on matrix operations of addition, scalar multiplication and matrix multiplication into processes. However, more than 50% of the participants struggled with scalar multiplication of a row matrix by a column matrix. In terms of notational errors, some participants could not distinguish between brackets that denote a matrix and that of a determinant, while some used the equal sign as an operator symbol and not as one denoting equivalence between two objects. It is recommended that future in-service teacher programs should try to create more structured opportunities to allow participants to engage more deeply with these concepts.

Design and FPGA implementation of an efficient security mechanism for mobile pay‐TV systems

SummaryA mobile pay‐TV service is one of the ongoing services of multimedia systems. Designing an efficient mechanism for authentication and key distribution is an important security requirement in mobile pay‐TV systems. Until now, many security protocols have been proposed for mobile pay‐TV systems. However, the existing protocols for mobile pay‐TV systems are vulnerable to various security attacks. Recently, Wang and Qin proposed an authentication scheme for mobile pay‐TV systems using bilinear pairing on elliptic curve cryptography. They claimed that their scheme could withstand various attacks. In this paper, we demonstrate that Wang and Qin's scheme is vulnerable to replay attacks and impersonation attacks. Furthermore, we propose a novel security protocol for mobile pay‐TV systems using the elliptic curve cryptosystem to overcome the weaknesses of Wang and Qin's scheme. In order to improve the efficiency, the proposed scheme is designed in such a way that needs fewer scalar multiplication operations and does not use bilinear pairing, which is an expensive cryptographic operation. Detailed analyses, including verification using the Automated Validation of Internet Security Protocols and Applications tool and implementation on FPGA, demonstrate that the proposed scheme not only withstands active and passive attacks and provides user anonymity but also has a better performance than Wang and Qin's scheme.

An Energy-Efficient ECC Processor of UHF RFID Tag for Banknote Anti-Counterfeiting

In this paper, we present the design and analysis of an energy-efficient 163-b elliptic curve cryptographic (ECC) processor suitable for passive ultrahigh frequency (UHF) radio frequency identification (RFID) tags that are usable for banknote authentication and anti-counterfeiting. Even partial public key cryptographic functionality has long been thought to consume too much power and to be too slow to be usable in passive UHF RFID systems. Utilizing a low-power design strategy with optimized register file management and an architecture based on the Lopez-Dahab Algorithm, we designed a low-power ECC processor that is used with a modified ECC-DH authentication protocol. The ECC-DH authentication protocol is compatible with the ISO/IEC 18000-63 (“Gen2”) passive UHF RFID protocol. The ECC processor requires 12 145 gate equivalents. The ECC processor consumes 5.04 nJ/b at a frequency of 960 kHz when implemented in a 0.13- $\mu \text{m}$ standard CMOS process. The tag identity authentication function requires 30 600 cycles to complete all scalar multiplication operations. This size, speed, and power of the ECC processor makes it practical to use within a passive UHF RFID tag and achieve up to 1500 banknote authentications per minute, which is sufficient for use in the fastest banknote counting machines.

On the real complexity of a complex DFT

We present a method to construct a theoretically fast algorithm for computing the discrete Fourier transform (DFT) of order N = 2 n . We show that the DFT of a complex vector of length N is performed with complexity of 3.76875N log2 N real operations of addition, subtraction, and scalar multiplication.

Optimizing {0, 1, 3}-NAF Recoding Algorithm Using Block-Method Technique in Elliptic Curve Cryptosystem

The most expensive and time-consuming operation in Elliptic curve cryptosystem is scalar multiplication operation. Optimization of scalar multiplication will substantially enhance the ECC performance. Scalar multiplication can be improved by using an enhanced scalar recoding algorithm that can decrease the number of operations in the scalar representation process. The objective of this research is to introduce an efficient design and implementation of {0,1,3}-NAF scalar recoding algorithm by applying block method technique. The base algorithm has a complex look up table. With block method application on base algorithm, a complex look up table is undesired. Instead a fix look up table is introduced with less computation required for recoding. The Big-O notation is used to measure the complexity and (µs) used to evaluate the running time of base and proposed algorithm.

A Statistical Framework for Generalized Linear Image Processing Systems

Generalized linear image processing systems have been developed from physical image formation models, human visual perception models, and mathematical models. Although there have been many papers on the extension, parameterization, and symmetrization of some of these systems, what is lacking is a unified framework such that the development and study of such systems can be performed based on a common ground. In this paper, we propose a conceptual image sensor which models how the light energy is converted into the sensor data. In the proposed sensor model, the input energy is regarded as a random variable and the conversion is through the cumulative distribution function. Based on the sensor model, we suggest a statistical framework by which new systems can be derived, and existing and seemingly unrelated systems can be studied from a unified perspective. The proposed statistical framework not only provides a principled way to symmetrizing systems through the even extension of the probability distribution function (PDF) and a natural way for the parameterization of systems through parameters of PDF. In this paper, we demonstrate new applications of the statistical framework through a numerical approximation of the lower incomplete gamma function, through the enhancement of the dynamic range and manipulation of the sharpness of images by using the scalar multiplication operation of the parametric system, through an application of a new system in fusion of multi-exposure images, and through an application of the three new systems for the correction of incorrect exposure.

A ROLE OF SYMBOLS OF MINIMUM TYPE IN EXPONENTIAL CALCULUS

Abstract. We introduce formal symbols of product type and of minimumtype and show that the formal power series representation for e p is a formalsymbol of product type, where p is a formal symbol of minimum type. 1. IntroductionPseudodi erential operators are essential for studying the theory of partialdi erential equations and itself have been studied in various respects. A pseudo-di erential operator can be represented as an equivalent class of some functionde ned on the cotangent bundle. We call this function a symbol of pseudodi er-ential operator. We can represent the operations of addition, scalar multiplica-tion, composition, formal adjoint and change of variables of pseudodi erentialoperators by using these symbols and so can treat pseudodi erential operatorsconcretely. Symbolic calculus means calculating pseudodi erential operatorsby using symbols. Exponential calculus means symbolic calculus on pseudodif-ferential operators expressed as symbols of exponential functions. A symbol ofexponential function means that the symbol can be expressed as a form of expo-nential function. We can analyze (pseudo) di erential operators of in nite orderor (pseudo) di erential equations of in nite order by studying the pseudodi er-ential operators expressed as symbols of exponential functions. In particular,Sato, M., T. Kawai and M. Kashiwara (ref. [16]) won epoch-making results inthe theory of transformation of the system of linear partial (pseudo) di eren-tial equations by using pseudodi erential operators of in nite order. T. Aokiaccomplished exponential calculus of analytic pseudodi erential operators( ref.[1] { [8]). The author considers the case of a kind of the direct product structure(ref. [12] { [15]). That is, we introduce and study calculus of analytic pseudo-di erential operators of product type and generalize the theory of T. Aoki insome sense. This study is deeply connected with exponential calculus of posi-tive de nite operators of in nite order which have deep relation to the energymethod in the hyperfunction theory(ref. [9] { [11]). In this article, we introduce

FPGA Based High Speed SPA Resistant Elliptic Curve Scalar Multiplier Architecture

The higher computational complexity of an elliptic curve scalar point multiplication operation limits its implementation on general purpose processors. Dedicated hardware architectures are essential to reduce the computational time, which results in a substantial increase in the performance of associated cryptographic protocols. This paper presents a unified architecture to compute modular addition, subtraction, and multiplication operations over a finite field of large prime characteristicGF(p). Subsequently, dual instances of the unified architecture are utilized in the design of high speed elliptic curve scalar multiplier architecture. The proposed architecture is synthesized and implemented on several different Xilinx FPGA platforms for different field sizes. The proposed design computes a 192-bit elliptic curve scalar multiplication in 2.3 ms on Virtex-4 FPGA platform. It is 34%faster and requires 40%fewer clock cycles for elliptic curve scalar multiplication and consumes considerable fewer FPGA slices as compared to the other existing designs. The proposed design is also resistant to the timing and simple power analysis (SPA) attacks; therefore it is a good choice in the construction of fast and secure elliptic curve based cryptographic protocols.