Delay Savings Research Articles

Quadrant Roadway Intersections: Tradeoffs between Control Delay Savings and Extra Travel Time

A quadrant roadway intersection (QRI) reduces congestion relative to a four-phase intersection. (Note: this study relates to traffic systems where vehicles drive on the right-hand side of the road.) It does this by removing left-turn traffic from the main intersection, resulting in a two-phase signal. Nevertheless, there is a lack of clear understanding of the tradeoffs between savings in control delay versus extra travel time experienced by the rerouted movements. This research compared the operational performance of five QRI designs with the counterpart conventional intersection (CI) under various traffic demand scenarios via TransModeler microsimulation modeling. Three measures-of-effectiveness (MOEs) were employed: time-in-system (TIS), control delay, and intersection capacity utilization. Simulation results show that all QRI designs outperform CI design for all three MOEs under all demand scenarios. QRIs with direct left-turn design have a smaller average TIS than those with loop left-turn design, indicating that savings in control delays did not offset the extra travel times. Under a relatively low demand condition, a single QRI design can generally balance the tradeoffs between control delay and extra travel time. Under a high demand scenario, a dual or full QRI with direct left-turns is preferred, since it reroutes or partially reroutes left- and right-turn traffic to secondary intersections, thus the main intersection has a lower capacity utilization and can accommodate more through-traffic demands than CI, single QRI, and dual or full QRIs with loop left-turns.

Mitigation of signalized intersection collision risks with trajectory based dynamic dilemma zone protection

Dilemma zone is one of the major factors causing red-light violations, right-angled and rear-end crashes at signalized intersections. In this paper, a dilemma zone protection system is introduced, which employs a dynamic vehicular trajectory optimization approach to guide vehicles approaching a signalized intersection. Unlike conventional methods that aim to eliminate dilemma zones, this system adjusts the speed profiles of individual vehicles to shift the distribution of dilemma zones and prevent vehicles from becoming trapped. Extensive simulated experiments were conducted to test and validate the proposed system for both individual vehicles and platoons. Results demonstrate that the system offers superior protection for individual vehicles, with full coverage across various settings of initial speeds and distances to the stop line. In the traffic environment with realistic platooning settings, the proposed system significantly reduces the number of vehicles in the dilemma zone, resulting in improved operational and safety benefits such as reduced risks of hazardous maneuvers and savings in vehicular delay.

Evaluation of the Trade-Off between Ground Delays and Intersecting Departures under Various Pilot Acceptance Rate Scenarios

The increasing demand for air traffic at airports necessitates the efficient utilization of ground facilities such as runways and taxiways. Intersecting departures, in which one or more aircraft take off from intersecting points on the runway, is a commonly used approach to increase runway capacity and reduce ground delays and taxi times, as well as noise and air pollution. However, the procedure carries potential risks such as runway incursion and excursion. This creates a trade-off between minimizing the number of intersecting departures and minimizing ground delays. In practice, the decision to perform an intersecting departure is ultimately up to the pilot, resulting in uncertainty in the acceptance rate of these types of takeoffs. In this study, a departure sequencing model was developed for a single-runway airport that considers intersecting departures and various pilot acceptance rate scenarios. The primary objective of the model is to minimize total ground delay, including taxi delays, runway holds, and conflict holds. The secondary objective is to minimize the number of intersecting departures by directing the most operationally critical aircraft to the intersection takeoff. The epsilon constraint method—a multi-objective scalarization method—was used to reveal the trade-offs between the objective functions. The results of the model were compared with a traditional scenario that only allows take offs from the beginning of the runway. As a result, average delay savings ranged from 17.1% to 31.5% in various acceptance rate scenarios, as well as average taxi time savings ranging from 4.9% to 8.4% compared with the traditional scenario.

Optimized reverse converters with multibit soft error correction support at 7nm technology

Residue number system (RNS) speeds up digital signal processing systems involving dominant addition and multiplication. Addition and multiplication are accelerated further and performed with a balanced performance on one-hot coded (OHC) residue digits. However, the high complexity of the RNS reverse converter (RC) may kill the performance gain. This paper proposes a high-speed and scalable RNS-RC for both regular and one-hot RNS. For redundant RNS (RRNS), an RRNS-RC is proposed, which based on majority-voting between OHC residue digits, corrects multibit soft errors occurring in a single residue channel. With pass-transistor logic and low-power FinFETs, the proposed RCs are optimized. The simulated RRNS-RC corrected 98.5% of soft errors, while consuming 7, 6.2 and 0.4% of the system's area, leakage power and dynamic power, respectively. As compared to the leading lookup table RC in the literature, RNS-RC exhibited 10.3X, 4.4X and 1.8X savings in area, average power, and delay, respectively.

Aircraft sequencing under the uncertainty of the runway occupancy times of arrivals during the backtrack procedure

AbstractIn some small airports, a parallel taxiway is not built due to space restrictions or financial issues; hence, the runway itself is often used as a taxiway in this type of airport. After touch down, aircraft move to the U-turn area at the end of the runway and turn 180 degrees, then move back to the desired point, such as a gate or the apron, using the runway. The runway is blocked to other arrivals and departures during this process. This process, called backtrack or back-taxi, can result in high delays for both arrivals and departures. Runway occupancy times (ROTs) vary depending on numerous conditions, including pilot performance, weather conditions, aircraft type, etc. Although there are speed restrictions and procedures announced in advance, the actual performance can be uncertain. In addition, most aircraft can make a U-turn as soon as they sufficiently reduce their speed before they reach the U-turn area especially if they are already delayed. These situations bring enormous uncertainties for traffic management at such an airport. Controllers may need help to sequence aircraft, particularly in busy traffic. In this study, a stochastic mathematical model is developed to sequence arrival/departure operations at such an airport considering the ROT uncertainties of arrivals. The objective function of the developed model is determined as the minimisation of the total delay. ROT data was obtained by observing radar tracks of 120 arriving flights. Reasonable ROT scenarios with various probabilities to represent ROT uncertainties were integrated into the mathematical modeling. In addition, two different sequencing approaches are presented as well as the first come first serve (FCFS) approach. As a result, the proposed stochastic approach provides robust sequences applicable for all ROT scenarios with significant delay savings up to an average of 18.4% and 39.5% compared to deterministic and FCFS approaches, respectively.

Çoklu terk ediş noktası bulunan pistler için stokastik sıralama planlama modeli

The runway exit points (REPs) of the airport are constructed considering the operational performance of different types of aircraft based on historical flight data. In sequence planning, it is assumed that aircraft will vacate the runway from an expected exit point. However, real performance can be uncertain, and the same type of aircraft may vacate the runway from different exit points rather than the expected point. In addition, the runway occupancy times (ROTs) of aircraft that vacate the runway from the same exit point may not be equal. This situation brings two types of uncertainty when making traffic plans in an airport with several REPs. The first uncertainty is the REP of the aircraft, and the second is the ROT uncertainty considering the exit points. In this study, a two-stage stochastic programming model was developed for aircraft sequencing in an airport that has multiple runway exit points. In the model, both runway exit and ROT uncertainties are considered. A runway with multiple exit points at an airport in Turkey was selected and flight track data of 154 arrival flights to this runway was examined. Various expected time of arrival and departure (ETAD) scenarios were generated based on real data and integrated into the mathematical models. The proposed model was then compared with deterministic and first come first serve (FCFS) approaches in terms of total delay. As a result of the comparison and analyses, the presented stochastic programming model provided robust solutions and delay savings compared to the other approaches.

Measuring the Impacts of Employer-based Transportation Demand Management Programs on an Interstate Corridor

This article is based on a study that analyzed the impacts of employer-based transportation demand management (TDM) strategies and the performance of a transportation system. The study simulated the effects of the Washington State Commute Trip Reduction (CTR) programs implemented by 189 employers on an 8.6-mile segment of I-5 in the Seattle downtown area. This comprehensive dataset included before/after employer trip reduction plans and the origins/destinations of nearly 63,000 commuters working for those 189 employers. The current performance of the selected network was compared to that of a scenario with reduced vehicle trips due to CTR programs added back onto the network. The hypothesis of the research was that a widescale adoption of employer-based strategies is likely to have a measurable difference on the performance of a transportation system. The analysis found the reduction in AM peak delay due to TDM programs implemented in the study area was 152,489 vehicle-minutes and 17,297 vehicle-miles of travel. Savings in PM-peak delay were 169,486 vehicle-minutes and 14,510 vehicle-miles were reduced. Fuel saved in the AM and PM peaks were 3,489 and 4,314 gallons, respectively. Some segments and periods saw significant improvement. The study proved that comprehensive TDM programs could have a significant impact on the operation of a major Interstate corridor.

Development and Evaluation of the Dynamic Left Turn Intersection

Dual left turn lanes are typically operated with protected left turn signals, which means extra delay during non-peak hours compared to permissive operation. To reduce this delay, the authors designed, installed, and tested a “dynamic left turn intersection” (DLTi), which is a new way to operate dual left turn lanes. With DLTi, the both lanes are operated with protected phasing during the peak hours when higher capacity is needed, and only the leftmost left turn lane remains open for protected-permissive operation during off-peak hours. The test showed substantial delay savings, the crash experience has been minimal, and the public comments received have been predominantly negative but not overwhelming. Around 85 percent of left-turning motorists complied when the rightmost left turn lane was closed. The team believes that the DLTi test has been a success, and that agencies should begin searching for other suitable locations for DLTi installation.

Badge sign-in and report cards improve first case start times in gastrointestinal endoscopy: A prospective quality improvement study.

Background and study aims First case start (FCS) time is often a key metric used to gauge efficiency in an endoscopy suite. There are limited data on tools and methods to improve the FCS time in the endoscopy suite. Methods A prospective observational cohort study was conducted in an academic tertiary care endoscopy suite examining the effect of badge sign-in (Period 2) and badge sign-in coupled with report cards (Period 3) compared to an initial observational period (Period 1). Results After the badge sign-in reader was introduced in P2, the unit experienced a mean time savings of 5 ± 18 minutes in FCS delays compared to P1 ( P = .03). In P3, an 8 ± 17-minute time savings in FCS time delay was observed compared to P1 ( P = 0.0006). Sign-in compliance significantly increased for the overall unit between P2 and P3 (49 % vs. 59 %, P = .002). Increases in first case on-time start (FCOTS) rates compared to P1 were observed for the unit, with a 14% absolute increase in P2 ( P < .0001) and a 17 % absolute increase in P3 ( P < .0001). FCS delays for on-time badge sign-ins were significantly lower compared to FCS delays for missed badge sign-ins and late badge sign-ins ( P < .0001). Conclusions The use of badge sign-in and report cards improve endoscopy unit efficiency as it can increase FCOTS rates and decrease FCS time delays.

Energy efficient high-performance approximate adders for imprecision-tolerant signal processing applications

The trade-off between Delay and Power consumption has become a major concern as process technology reached less than 10 nm proximity in the modern Very Large-Scale Integration (VLSI) technology. This trade-off can be compensated with accuracy and is vanquished by the development of Approximate Computing (AC). In this paper, six diverse Approximate Adders (AAs) have been proposed based on logic complexity reduction at the transistor level. Simulation results reveal that the Proposed AAs has a significant amount of Power and Delay savings, lesser Power-Delay Product (PDP). The Proposed AAs:PA1, PA3, PA5, PA3 exhibits 12.85 %, 41.59%, 72.05 %, 1.91% lesser power than the Existing AAs EAA1, EAA5, EAA6, EAA9 respectively. The Proposed AAs: PA2, PA3 incorporates 37.5 %, 54.5%, of lesser number of transistors compared to Existing AAs: EAA5, EAA9 whereas PA4, PA5 incorporates 40 % of reduction in the number of transistors compared to Existing AAs: EAA6, EAA8. These results are promising for high performance and energy efficient systems for error-resilient applications such as multimedia and signal processing where a slightly degraded output quality is acceptable, which could lead to significant power reduction.

Fixed-Posit: A Floating-Point Representation for Error-Resilient Applications

Today, almost all computer systems use IEEE-754 floating point to represent real numbers. Recently, posit was proposed as an alternative to IEEE-754 floating point as it has better accuracy and a larger dynamic range. The configurable nature of posit, with varying number of regime and exponent bits, has acted as a deterrent to its adoption. To overcome this shortcoming, we propose <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">fixed-posit</i> representation where the number of regime and exponent bits are fixed, and present the design of a fixed-posit multiplier. We evaluate the fixed-posit multiplier on error-resilient applications of AxBench and OpenBLAS benchmarks as well as neural networks. The proposed fixed-posit multiplier has 47%, 38.5%, 22% savings for power, area and delay respectively when compared to posit multipliers and up to 70%, 66%, 26% savings in power, area and delay respectively when compared to 32-bit IEEE-754 multiplier. These savings are accompanied with minimal output quality loss (1.2% average relative error) across OpenBLAS and AxBench workloads. Further, for neural networks like ResNet-18 on ImageNet we observe a negligible accuracy loss (0.12%) on using the fixed-posit multiplier.

An integrated intersection design for promoting bus and car traffic

Signal priority and exclusive bus lanes are common measures used to promote bus travel at signalized intersections. However, these bus priority measures create significant damage to the car traffic especially at intersections with heavy bus and car traffic. For this reason, bus priority is not welcome at busy intersections. We examine a novel intersection approach design that can solve the above dilemma. The design integrates a bus lane, bus signal priority, and a midblock pre-signal for sorting different car traffic streams in tandem in the approach. Car capacity gains from the use of pre-signal can potentially recover the car capacity lost to bus lane and signal priority schemes. This paper first presents how the pre-signal and main signal can be timed to realize bus signal priority, and where the pre-signal should be placed. Models are then formulated for estimating the expected bus delay and car capacity under the integrated design. They are compared against three alternative designs, including a conventional intersection design without bus priority or pre-signal. Numerical results unveil that the integrated design produces not only significant bus delay savings, but also higher car capacities in most instances. Even greater car capacity gains are observed with higher bus frequencies. Moreover, the benefits are fairly robust when real-world operating features, such as bus arrival time prediction error, are considered. Thus, the integrated design can potentially promote both bus and car traffic at congested intersections.

Gaussian-Wiener Representation and Hierarchical Coding Scheme for Focal Stack Images

Focal stack images (FoSIs) are a set of 2D images that captured one scene with serial focal depths. The redundancies of FoSIs mainly come from gradual focused depths changes rather than motion of objects. Conventional coding schemes cannot fully exploit such redundancies, leading to coding inefficiency. In this paper, we propose a new Gaussian-Wiener representation to model the gradual focused depths changes among FoSIs. In the representation, image degradation-restoration relations are utilized to describe the focus-defocus changing characteristics of FoSIs. Based on this representation, we propose a new hierarchical coding scheme for fully exploiting the inter-frame redundancies of FoSIs. In the scheme, a Gaussian-Wiener representation based inter prediction (GWR-IP) is presented by embedding Gaussian convolution and Wiener deconvolution into normal video encoder. Block-wise focus-defocus changing of FoSIs can be predicted in bi-directional manner by solving optimization problem. For higher coding efficiency, a Gaussian-Wiener representation based hierarchical prediction structure (GWR-HPS) is also designed and applied in the coding scheme. The proposed coding scheme is performed on 10 test sequences, including 5 synthetic scenes and 5 realistic scenes. Experimental results show that proposed coding scheme can obtain 2.640 dB PSNR gains and 51.830% bitrate savings on average of all test sequences in Low Delay P configuration, 2.123 dB PSNR gains and 43.975% bitrate savings in Low Delay B configuration, and 1.044 dB PSNR gains and 26.078% bitrate savings in Random Access configuration. Particularly, it achieves up to 65.544% bit rate savings and 3.901 dB PSNR increments for test sequence I09 in Low Delay P configuration. Furthermore, ablation test demonstrates that Gaussian representation contributes more on coding performance than Wiener representation and GWR-HPS.

LORAx: A High-speed Energy-efficient Lower-Order Rounding-based Approximate Multiplier

Applications such as image, audio, and video processing are tolerant to certain amounts of error. This tolerance/resiliency can be exploited to construct approximate circuits with improved design parameters such as area, power, and delay. This paper presents a high-speed yet energy-efficient approximate multiplier for low-power applications. In the proposed scheme, the operands are divided into accurate (significant) and rounded (insignificant) sections at half of the operand bit-length. Further, simplified multiplication operations are performed between these sections to obtain the final product. The proposed multiplier architecture involves an accurate small width multiplier as well as shifter blocks, which leads to delay- and energy-efficient architecture. The performance of proposed multiplier over the existing is evaluated by coding the designs in Verilog implementing on Artix7 family XC7A100TCSG324 FPGA device using Xilinx ISE tool chain. The simulation results show 23–31% and up to 26% in delay and energy savings, respectively, over the existing approximate architectures.

Near-zero computing using NCFET for IoT applications

The energy consumption of the devices or circuits built on the IoT's is becoming a significant concern with the complementary metal oxide semiconductor (CMOS) technology scaling. To reduce energy consumption, supply voltage (VDD) scaling has proved to be an effective technique with near-threshold/subthreshold computations depicting the endpoint of voltage scaling. This paper discusses how the near-zero computing (NZC) is achieved by scaling the VDD beyond the subthreshold regime using the negative capacitance FET (NCFET) to enable IoT with beyond CMOS features. After characterising the NCFET for near zero operation, the basic computational circuits: logic gates and 1-bitfull adder circuit are designed and simulated using NCFET at near-zero VDD of 0.1 V. In comparison with the CMOS counterparts, the NCFET logic designs have achieved significant improvements and is found that the NCFET logic results in more than 54%, 68%, 85%, and 95% savings in power, delay, energy, and EDP respectively.

The Tradeoff between Mean Delay and Energy Saving Factor under DRX Scheme

The Tradeoff between Mean Delay and Energy Saving Factor under DRX Scheme

Sliding Mode Network Perimeter Control

Urban traffic congestion is a chronic problem faced by many cities in the US and worldwide. It results in inefficient infrastructure use as well as increased vehicle fuel consumption and emission levels. Congestion is intertwined with delay, as road users waste precious hours on the road, which in turn reduces productivity. Researchers have developed, and continue to develop, tools and systems to alleviate this problem. Network perimeter control is one such tool that has been studied extensively. It attempts to control the flow of vehicles entering a protected area to ensure that the congested regime predetermined by the Network Fundamental Diagram (NFD) is not reached. In this paper, an approach derived from sliding mode control theory is presented. Its main advantages over proportional-integral controllers include (1) minimal tuning, (2) no linearization of the governing equations, (3) no assumptions with regard to the shape of the NFD, and (4) ability to handle various demand profiles without the need to retune the controller. A sliding mode controller was implemented and tested on a congested grid network. The results show that the proposed controller produces network-wide delay savings and disperses congestion effectively.

Computing optimum traffic signal cycle length considering vehicle delay and fuel consumption

Traffic signal cycle lengths are traditionally optimized to minimize vehicle delay at intersections using the Webster formulation. This study continues previous work by the authors to enhance the Webster model and develop new formulations to compute the optimum cycle length, considering vehicle delay, fuel consumption, and tailpipe emissions. The microscopic simulation software INTEGRATION is used to simulate two-phase and four-phase isolated intersections over a wide range of traffic demand levels, traffic demand distributions, cycle lengths, and signal timing lost times. Intersection delay, fuel consumption levels, and emissions of carbon dioxide (CO2), hydrocarbon (HC), carbon monoxide (CO), and oxides of nitrogen (NOx) are derived from the simulation software. The optimum cycle lengths for various measures of effectiveness are then used to develop the proposed formulations. The simulation results demonstrate that the Webster method overestimates the optimum cycle length and produces unrealistically long cycle length estimates when the traffic volume-to-capacity ratio exceeds 50%. A new logarithmic delay model is proposed herein to address the shortcomings of the Webster model. This model is then calibrated to compute the optimum cycle lengths considering vehicle fuel consumption and emission levels. The estimated optimum cycle lengths for emissions are shown to be longer than the optimum cycle lengths for vehicle delay for lower levels of congestion. The paper demonstrates how a multi-objective cycle length can be computed to simultaneously minimize vehicle delays and fuel consumption levels. After computing the optimum cycle length, the optimum phase split can then be computed using the traditional approach of equating the degree of saturation across all phases. It is anticipated that the proposed formulations will produce significant savings in vehicle delay and fuel consumption levels.

Estimating the impacts of transit signal priority on intersection operations: A moving bottleneck approach

Transit Signal Priority (TSP) is a commonly used strategy to improve bus operations at signalized intersections. However, the impacts of TSP in mixed traffic environments has not been analytically studied. This is a challenging problem since car queues can slow down buses, while slow-moving buses can create bottlenecks for cars in mixed traffic. Furthermore, it is typically assumed that TSP is activated using bus information obtained from a fixed detector. The benefits of TSP to buses could be improved by using information from connected buses or even connected cars. To tackle these challenges, this paper models buses as moving bottlenecks, incorporating it into a kinematic wave theory (KWT) model. A dynamic programming (DP) algorithm is developed to evaluate the changes in delays to buses and cars caused by TSP using KWT and queuing theories considering the bus as a moving bottleneck. The proposed algorithm is utilized for sensitivity tests to determine the changes to car and bus delays as a result of TSP implementation as a function of the bus detector location, bus stop location and dwell duration, the existence of a downstream bottleneck, and bus detection technology. The detector location sensitivity analysis reveals that there exists an optimal (and different) bus detector location associated with each demand. The bus stop location and bus dwell duration sensitivity tests show that TSP implementation can reduce system-wide (i.e., total car and bus) delays. However, in general, it is found that the presence of a downstream bottleneck can diminish the benefits of providing TSP. Finally, different bus detection technologies are tested to quantify the benefits of using connected buses or connected cars for TSP provision in terms of car and bus delay savings. As a result of this test, it is found that connected cars can significantly improve both car and bus delays if used for TSP provision.

Managing Unplanned Rail Disruptions: Policy Implications and Guidelines Towards an Effective Bus Bridging Strategy

Bus bridging is a key strategy used by transit agencies to handle rail service interruptions. In practice, buses are dispatched from scheduled services to act as temporary shuttles along the disrupted rail segment. This study provides a robust analysis of four factors affecting bus bridging policies: 1) initial dispatch direction of shuttle buses, 2) dispatch time (i.e., the response time for requesting shuttle buses), 3) uncertainty in predicting the incident duration, and 4) reduction of metro passengers demand because of disruption. A user delay modeling tool is used to assess various bus bridging policies based on their resulting users’ delays (for affected passengers) and other system performance measures. The tool was validated, and sensitivity analysis was conducted based on real disruption scenarios that suspended various segments of the metro service in the City of Toronto. The main results indicate that: 1) the initial dispatch direction of shuttle buses should take into consideration the demand at the disrupted segment while maintaining a moderate level of shuttle bus utilization; 2) a 1-min increase in the dispatch time causes about 0.4 min additional waiting time at disrupted metro stations per passenger; 3) incidents with high forecasting errors can cause excessive delays for metro passengers and significant wasted time of non-utilized shuttle buses; and, 4) significant users’ delay savings are observed at higher demand reduction levels. This paper provides transportation practitioners and planners with a better understanding of the different aspects of bus bridging policies based on users’ delays and shuttle buses’ performance metrics.