Sallen Key Research Articles

NCRC to improve linearity and sensitivity for RuO 2 urea biosensor sensing measurement

A novel noise-cancelling readout circuit (NCRC) is proposed to improve the linearity and sensitivity of traditional voltage–time (V–T) measurement system for ruthenium dioxide (RuO2) urea biosensor. To reduce the non-ideal effect related to traditional V–T measurement system that negatively threatened by the impact of power line noise, this NCRC adopts a new power line noise elimination scheme. Moreover, by employing the Twin-T notch filter and the Sallen–Key low-pass filter, the proposed NCRC can increase the linearity by 161% while retaining the sensitivity at an average level than V–T measurement system. A new NCRC for measuring the linearity and sensitivity of RuO2 urea biosensor is implemented by a real circuit board. The experimental results show that the proposed NCRC can achieve 0.956 linearity and 1.22 mV/(mg/dl) average sensitivity.

Study of Sallen–Key digital filters in nuclear pulse signal processing

The Sallen–Key filter (S–K) is widely used in nuclear pulse signal processing because of its simple working principle and good performance. Related research has only reviewed the recursive numerical model of digital S–K using idealized parameters. The use of digital S–K thus has limitations under these circumstances. This paper comprehensively deduces a recursive numerical model of digital S–K and discusses the effects of resistance and capacitance on the filter quality factor, cutoff frequency and amplitude–frequency response. The numerical recursive function, transfer function and amplitude–frequency response are analyzed using different parameters. From a comparative analysis of the shaper in a simulation and an actual nuclear signal, an optimal parameter selection principle is obtained. Using different forming parameters, the energy resolution and pulse counting rate of the $$^{55}$$ Fe energy spectrum are compared and analyzed based on a Si-PIN detector. Capacitance has a stronger influence on the Gaussian shape, whereas the influence of resistance is stronger on the shaping amplitude.

Robust Stability Analysis of Uncertain Linear Fractional-Order Systems With Time-Varying Uncertainty for 0 < α < 2

This paper focuses on the stability analysis of linear fractional-order systems with fractional-order 0<α<2, in the presence of time-varying uncertainty. To obtain a robust stability condition, we first derive a new upper bound for the norm of Mittag-Leffler function associated with the nominal fractional-order system matrix. Then, by finding an upper bound for the norm of the uncertain fractional-order system solution, a sufficient non-Lyapunov robust stability condition is proposed. Unlike the previous methods for robust stability analysis of uncertain fractional-order systems, the proposed stability condition is applicable to systems with time-varying uncertainty. Moreover, the proposed condition depends on the fractional-order of the system and the upper bound of the uncertainty matrix norm. Finally, the offered stability criteria are examined on numerical uncertain linear fractional-order systems with 0<α<1 and 1<α<2 to verify the applicability of the proposed condition. Furthermore, the stability of an uncertain fractional-order Sallen–Key filter is checked via the offered condition.

Design and Characterization of a Low-Noise Front-End Readout ASIC in 0.18-<inline-formula> <tex-math notation="LaTeX">$\mu$ </tex-math> </inline-formula>m CMOS Technology for CZT/Si-PIN Detectors

In this paper, we report the recent development of a low-noise front-end readout application-specified integrated circuit (ASIC) for cadmium–zinc–telluride (CZT) and Si-p-i-n detectors. The readout chain consists of a charge sensitive amplifier, a CR–RC pulse shaper followed by a Sallen–Key low-pass filter, readout buffers, and a discriminator. The layout using deep n-well (DNW) is adopted to optimize the noise performance. A prototype ASIC is implemented in TSMC CMOS 0.18- $\mu \text{m}$ , 1.8 V/3.3 V mixed-signal technology. The die size of the prototype chip is 2.1 mm $\times$ 2.5 mm. At room temperature, the equivalent noise charge of the front-end readout channel using DNW implementation is 112 e− (rms) + 17 e− pF at the power consumption of less than 2 mW/channel. The linearity error is less than 3%. By connecting the readout ASIC to a CZT detector, we obtained that the energy resolutions of a $\gamma$ -ray spectrum are 3.9% and 5.5% (full-width at half-maximum), respectively, at the 59.5-keV line of 241Am source. The ASIC is a good solution of front-end electronics for personal dosimeters.

1.2 V, 12.5 MHz fourth‐order low‐pass filter with 83 dB stopband attenuation using low output impedance source follower in 45 nm CMOS

A source follower with improved output resistance is proposed. This improvement is achieved using shunt–shunt feedback with the help of a voltage combiner in the feedback loop which helps not only enhancing the gain but achieving reduced distortion due to improved isolation. A high-performance Sallen–Key biquad is implemented using this improved source follower and two capacitors which offer 29.3 MHz of bandwidth and almost 50 dB of stopband attenuation with the power of 2.3 mW. A fourth-order Chebyshev low-pass filter prototype is designed with a cascade of two such biquads in 45 nm complementary metal–oxide–semiconductor (CMOS). A cut-off frequency of 12.4 MHz is obtained with a stopband rejection of more than 83 dB. The power dissipation of the filter is 5.1 mW, at 1.2 V supply, and achieves an in-band third-order intercept point of +26.8 dBm. The in-band input-referred noise is , resulting in a dynamic range of 78.1 dB.

Electronic Circuit Health Estimation Through Kernel Learning

Degradation of electronic components is typically accompanied by a deviation in their electrical parameters from their initial values, which can ultimately lead to parametric faults in electronic circuits. Existing approaches to predict parametric faults emphasize identifying monotonically deviating parameters and modeling their progression over time. However, in practical applications, where the components are integrated into a complex electronic circuit assembly, product, or system, it is generally not feasible to monitor component-level parameters. To address this problem, a circuit health estimation method was developed using a kernel-based machine-learning technique. This method exploits features that are extracted from responses of circuit-comprising components exhibiting parametric faults, instead of the component-level parameters. The method was evaluated using data from simulation experiments on a benchmark Sallen–Key filter circuit and a dc–dc converter system.

Analog Circuit Incipient Fault Diagnosis Method Using DBN Based Features Extraction

Correct identifying analog circuit incipient faults is useful to the circuit’s health monitoring, and yet it is very hard. In this paper, an analog circuit incipient fault diagnosis method using deep belief network (DBN) based features extraction is presented. In the diagnosis scheme, time responses of analog circuits are measured, and then features are extracted by using the DBN method. Meanwhile, the learning rates of DBN are produced by using quantum-behaved particle swarm optimization (QPSO) algorithm, which is beneficial to optimizing the structure parameters of DBN. Afterward, a support vector machine (SVM) based incipient fault diagnosis model is constructed on basis of the extracted features to classify incipient faulty components, where the regularization parameter and width factor of SVM are yielded by using the QPSO algorithm. Sallen–Key bandpass filter and four-op-amp biquad high pass filter incipient fault diagnosis simulations are conducted to demonstrate the proposed diagnosis method, and comparisons verify that the proposed diagnosis method can produce higher diagnosis accuracy than other typical analog circuit fault diagnosis methods.

Numerical and experimental confirmations of quasi-periodic behavior and chaotic bursting in third-order autonomous memristive oscillator

This paper presents a novel third-order autonomous memristive chaotic oscillator, which is accomplished by parallelly coupling a simple memristive diode bridge emulator into a Sallen–Key low-pass filter (LPF). With the modeling of this oscillator, stability analyses of the equilibrium point and numerical simulations of the phase plane orbit, time-domain sequence, bifurcation diagram, and finite-time Lyapunov exponent spectrum are performed, from which period, quasi-period, chaos, and quasi-period to chaos route are found. Particularly, two types of dynamical phenomena of quasi-periodic behavior and point-cycle chaotic bursting that are further identified by using 0–1 test are observed in such a third-order autonomous memristive oscillator, which have been rarely reported in the previous literatures. Additionally, hardware experiments are implemented and the quasi-periodic behavior and point-cycle chaotic bursting are well confirmed.

OBIST methodology incorporating modified sensitivity of pulses for active analogue filter components

ABSTRACTIn this paper, oscillation-based built-in self-test method is used to diagnose catastrophic and parametric faults in integrated circuits. Sallen–Key low pass filter and high pass filter circuits with different gains are used to investigate defects. Variation in seven parameters of operational amplifier (OP-AMP) like gain, input impedance, output impedance, slew rate, input bias current, input offset current, input offset voltage and catastrophic as well as parametric defects in components outside OP-AMP are introduced in the circuit and simulation results are analysed. Oscillator output signal is converted to pulses which are used to generate a signature of the circuit. The signature and pulse count changes with the type of fault present in the circuit under test (CUT). The change in oscillation frequency is observed for fault detection. Designer has flexibility to predefine tolerance band of cut-off frequency and range of pulses for which circuit should be accepted. The fault coverage depends upon the required tolerance band of the CUT. We propose a modification of sensitivity of parameter (pulses) to avoid test escape and enhance yield. Result shows that the method provides 100% fault coverage for catastrophic faults.

Sallen–Key low‐pass filter‐based inductor‐free simplified Chua's circuit

This present study reports a new type of inductor-free simplified Chua's circuit only using two-op-amps-based realisation, which is implemented by cascading a Sallen–Key low-pass filter with a simplified Chua's diode. With mathematical model-based numerical simulations and hardware circuit-based experimental measurements, it is demonstrated that the reported circuit exhibits the similar dynamical behaviours of the classical Chua's circuit such as point attractor, limit cycles, period doubling route, chaotic spiral attractors, double-scroll chaotic attractor, boundary crisis, coexisting bifurcation modes, and so on. Furthermore, the proposed circuit enriches the realisation forms of Chua's circuit family.

Fully‐balanced four‐terminal floating nullor for ultra‐low voltage analogue filter design

This study presents a new complementary metal–oxide–semiconductor (CMOS) structure for a fully balanced four-terminal floating nullor (FBFTFN) which is suitable for ultra-low-voltage and low-power applications. This structure employs a bulk-driven quasi-floating-gate (BD-QFG) metal–oxide–semiconductor transistor technique to provide the capability of ultra-low-voltage, low-power operations as well as extended input voltage range. The functionality of the proposed circuits is demonstrated through simulations using SPICE and TSMC 0.18 µm n-well CMOS technology with supply voltage of 0.5 V and dissipation power of 9.4 µW. To confirm the attractive features of the proposed circuit, the fully balanced filters such as band-pass Sallen–Key filter, voltage-mode universal biquadratic filter and current-mode sixth-order low-pass filter using proposed BD-QFG FBFTFN as active elements have been designed.

A 28.8-MHz 23-dBm-IIP3 3.2-mW Sallen-Key Fourth-Order Filter With Out-of-Band Zeros Cancellation

In this brief, a 28.8-MHz −3-dB frequency low-pass analog filter is presented. The filter synthesizes a fourth-order Butterworth transfer function, exploiting the well-known Sallen-Key (SK) biquadratic cell. The out-of-band zeros typically present in SK implementations are hereby completely canceled by using a low-power auxiliary path. This leads to a significant improvement of the stop-band rejection, at the cost of a small power for the same auxiliary path biasing. The design exhibits very large in-band IIP3 over the entire filter bandwidth (20 dBm at 10 MHz and 11 MHz), at 3.2-mW power consumption. The filter prototype has been designed in CMOS 0.18- $ {\mu }\text{m}$ technological node. The total area occupancy is 0.12 mm $^{ {2}}$ and the in-band integrated noise is $101~ {\mu }{\mathrm{V}}_{\mathrm{RMS}}$ .

Estimation method for parameters of overlapping nuclear pulse signal

Identification of nuclear pulse signal is of importance in radioactive measurements, especially in recognizing adjacent overlapping nuclear pulses. In this article, we propose an estimation method for parameters of typical overlapping nuclear pulse signals. First, the nuclear pulses are regarded as individual genes and the norm is set as the fitness function. Second, the global optimal solution is found by searching the population of genetic algorithm, so as to estimate the parameters of nuclear pulse. With high precision, this method can identify parameters of overlapping nuclear pulses in the Sallen–Key Gaussian signal decomposition experiments. This pulse recognition method is of great significance to improve the precision of radioactive measurement and is suitable for serious overlap of nuclear pluses.

An improved SVM classifier based on double chains quantum genetic algorithm and its application in analogue circuit diagnosis

Support Vector Machine (SVM) classifier is widely used in analogue circuit diagnosis. However, the penalty parameter C and the kernel parameter γ of SVM classifier with the radial basis function (RBF) affect the classification performance seriously. A double-chains-quantum-genetic-algorithm (DCQGA) based method is proposed to optimize C and γ. In DCQGA, each chromosome carries two gene chains, and each of gene chains represents an optimization solution, which can accelerate the search process and help to find the global solution. Thereafter, the optimal parameters C and γ are obtained by optimizing the parameter searching process with DCQGA. Two common datasets named Iris and Wine from UCI Machine Learning Repository are used to test the performance of the presented SVM classifier. The simulation results illustrate that the population's best fitness and the classifying accuracy of the proposed DCQGA-SVM are higher than that of the Particle-Swarm-Optimization based SVM (PSO-SVM), the Quantum Genetic Algorithm based SVM (QGA-SVM) and the classifier based on grid search method (GS-SVM). Finally, the proposed DCQGA-SVM is applied to analogue circuit diagnosis, a Sallen–Key bandpass filter circuit and a four-opamp biquad high-pass filter are chosen as circuits under test (CUT). Wavelet packet analysis is performed to extract the fault features before classifying. The experimental results show that the SVM parameters selected by DCQGA-SVM contribute to higher diagnosis accuracy than other methods referred in this paper.

Role of Optimization Techniques in Engineering

By virtue of Optimization one can minimize or maximize a particular function in a finite dimensional Euclidean space over a subset of that space, which is generally determined by functional inequalities. It is the result of continuous research that Optimization has been evolve into an established field and had expanded in many branches like linear conic optimization, convex optimization, global optimization, discrete optimization, etc. Each of such branches has a sound theoretical foundation and is featured by an extensive collection of sophisticated algorithms and software. Optimization, as a powerful modeling and problem solving methodology, has a broad range of applications in management science, industry and engineering. The main concern of optimized design is the finding of optimum parameters according to a given optimality standard. To cope up with the current development in engineering and other fields we must have to update over optimization techniques which can be use for the non-differentiable, not continuous objective functions. Every optimization techniques have its own merits and demerits and may be good for any particular purpose and may be worst for some other purpose. Like application of global optimization algorithm is sometimes a very time consuming task. The best local optimization methods for this purpose are the gradient methods. So in this work an intelligent way of using these optimization techniques is being presented which illustrate the fact that which techniques or a combination of techniques may be efficiently used for a given purpose. For that we have demonstrated the use of global optimization in two different tasks one is optimization of step size of LMS algorithm using Ant Colony Optimization (ACO) & Particle swarm optimization (PSO) and the other is designing of an Analog Sallen Key Band Pass filter using ACO. Simulation of each case using MATLAB is done to prove the validity of optimized result and optimized designing.

Active filter driver for piezo-actuators for flapping-wing micro air vehicles

Piezoelectrically actuated flapping-wing micro air vehicle (MAV) is an emerging technology. This paper discusses limitations of presently used voltage drivers for the piezoelectric actuators used in such applications and suggests an active filter-based unipolar high-voltage driver. A Chebyshev polynomial has been used to extract a unipolar sinusoidal high voltage signal from a unipolar square wave signal for driving the piezoelectric actuators at low frequency in flapping-wing MAV applications. The filter is based on Sallen–Key topology and is suitable for connecting a piezo-bimorph in series or parallel electrical connection. We have considered an application-specific piezoelectric bimorph actuator of 40 Hz flapping frequency and 32 nF capacitance in each piezoelectric layer to design a driver. The driver circuit in verified by simulation results of OrCAD® software. The driver circuit can control the frequency of the sinusoidal driving voltage, which causes wing-flapping, by radio control communication.

A 50–450 MHz Tunable RF Biquad Filter Based on a Wideband Source Follower With > 26 dBm IIP$_{3}$, +12 dBm P$_{1{\rm dB}}$, and 15 dB Noise Figure

This paper reports a source follower-based active RC filter topology for RF front-ends in wideband systems. In the proposed active RC filter, the noise figure and bandwidth are improved through adopting the proposed sub-1 $\Omega$ $Z _{\rm out}$ source follower, which replaces the conventional operational amplifier-based unity gain buffer and through simply changing its location in the filter. Applying the proposed scheme to the conventional Sallen–Key filter also improves the stopband rejection performance. Furthermore, the proposed filter topology ultimately suppresses the DC offset voltage and flicker noise of the unity gain buffer, which is the only active circuit in the filter. The proposed biquad filter is implemented in 0.18 $\mu\hbox{m}$ CMOS and the measurements exhibit $>$ 26 dBm IIP $_{3}$ , +12 dBm input $P _{1{\rm dB}}$ , and ${ 15 dB noise figure over 50–450 MHz of a 6 bit tunable frequency range. The proposed biquad filter consumes 14 mA from a 1.8 V supply and the chip occupies 1000 $\times$ 500 $\mu \hbox{m} ^{2}$ .

Fractional Order Sallen–Key and KHN Filters: Stability and Poles Allocation

This paper presents the analysis for allocating the system poles and hence controlling the system stability for KHN and Sallen---Key fractional order filters. The stability analysis and stability contours for two different fractional order transfer functions with two different fractional order elements are presented. The effect of the transfer function parameters on the singularities of the system is demonstrated where the number of poles becomes dependent on the transfer function parameters as well as the fractional orders. Numerical, circuit simulation, and experimental work are used in the design to test the proposed stability contours.

A 2.1-Channel Class-D Amplifier Exploited Coupling Virtual-Audio-Image to Enhance Stereo

This brief presents a novel 2.1-channel stereo-enhanced class-D audio amplifier to improve the quality of stereophonic sound in portable devices. By a way of cross coupling, the input audio signal from one channel can be amplified at the same time, with different gains in the two channels. The ratio of gains in the two channels can be adjusted by changing the resistance and then making the position of the virtual-audio-image change, which improves the stereo effect. The bass signals from different channels, which frequency range between 30 and 300 Hz, are superimposed and then amplified in the independent bass channel by using the Sallen–Key bandpass filter. A practical implementation in the SMIC 0.18- $\mu\hbox{m}$ CMOS process has been done to validate the theoretical results. When a 200- $\hbox{mV}_{\rm PP}$ sinusoidal signal at 1 kHz is applied in one channel and a dc signal applied in the other channel, the amplifier demonstrates a gain difference of $-$ 9.4 dB. The simulation and experiment results show that the amplifier can deliver 2.5 W $\times$ 2 into 4- $\Omega$ loads at 3.6-V supply in the left or right channel, with the total harmonic distortion plus noise (THD $+$ N) of less than 0.1%. The gain in the bass channel is up to 30 dB at 3.6-V power supply, with the THD $+$ N of about 0.05%.

A single op amp differential Sallen–Key biquad

This work reports a fully differential architecture of a Sallen–Key biquad realised with a single op amp. The proposed implementation is beneficial for suppressing common-mode and supply noise. The circuit was designed and simulated using ON Semiconductor's 0.5- technology.